ARM: shmobile: armadillo800eva-reference: fix compiler warning
[deliverable/linux.git] / arch / arm / mach-shmobile / setup-r8a7779.c
CommitLineData
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1/*
2 * r8a7779 processor support
3 *
dace48d0 4 * Copyright (C) 2011, 2013 Renesas Solutions Corp.
f411fade 5 * Copyright (C) 2011 Magnus Damm
dace48d0 6 * Copyright (C) 2013 Cogent Embedded, Inc.
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7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
10e8d4f6 25#include <linux/of_platform.h>
37a72d07 26#include <linux/platform_data/gpio-rcar.h>
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27#include <linux/platform_device.h>
28#include <linux/delay.h>
29#include <linux/input.h>
30#include <linux/io.h>
31#include <linux/serial_sci.h>
32#include <linux/sh_intc.h>
33#include <linux/sh_timer.h>
a7b9837c 34#include <linux/dma-mapping.h>
2c8788bf 35#include <linux/usb/otg.h>
84a812da 36#include <linux/usb/hcd.h>
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37#include <linux/usb/ehci_pdriver.h>
38#include <linux/usb/ohci_pdriver.h>
39#include <linux/pm_runtime.h>
f411fade 40#include <mach/hardware.h>
250a2723 41#include <mach/irqs.h>
f411fade 42#include <mach/r8a7779.h>
a662c082 43#include <mach/common.h>
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44#include <asm/mach-types.h>
45#include <asm/mach/arch.h>
df27a2d8 46#include <asm/mach/time.h>
3e353b87 47#include <asm/mach/map.h>
8bac13f5 48#include <asm/hardware/cache-l2x0.h>
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49
50static struct map_desc r8a7779_io_desc[] __initdata = {
51 /* 2M entity map for 0xf0000000 (MPCORE) */
52 {
53 .virtual = 0xf0000000,
54 .pfn = __phys_to_pfn(0xf0000000),
55 .length = SZ_2M,
56 .type = MT_DEVICE_NONSHARED
57 },
58 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
59 {
60 .virtual = 0xfe000000,
61 .pfn = __phys_to_pfn(0xfe000000),
62 .length = SZ_16M,
63 .type = MT_DEVICE_NONSHARED
64 },
65};
66
67void __init r8a7779_map_io(void)
68{
69 iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
70}
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8b6edf36 72static struct resource r8a7779_pfc_resources[] = {
0ccaf5bb 73 DEFINE_RES_MEM(0xfffc0000, 0x023c),
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74};
75
76static struct platform_device r8a7779_pfc_device = {
77 .name = "pfc-r8a7779",
78 .id = -1,
79 .resource = r8a7779_pfc_resources,
80 .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
81};
82
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83#define R8A7779_GPIO(idx, npins) \
84static struct resource r8a7779_gpio##idx##_resources[] = { \
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85 DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \
86 DEFINE_RES_IRQ(gic_iid(0xad + (idx))), \
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87}; \
88 \
89static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
90 .gpio_base = 32 * (idx), \
91 .irq_base = 0, \
92 .number_of_pins = npins, \
93 .pctl_name = "pfc-r8a7779", \
94}; \
95 \
96static struct platform_device r8a7779_gpio##idx##_device = { \
97 .name = "gpio_rcar", \
98 .id = idx, \
99 .resource = r8a7779_gpio##idx##_resources, \
100 .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \
101 .dev = { \
102 .platform_data = &r8a7779_gpio##idx##_platform_data, \
103 }, \
104}
105
106R8A7779_GPIO(0, 32);
107R8A7779_GPIO(1, 32);
108R8A7779_GPIO(2, 32);
109R8A7779_GPIO(3, 32);
110R8A7779_GPIO(4, 32);
111R8A7779_GPIO(5, 32);
112R8A7779_GPIO(6, 9);
113
114static struct platform_device *r8a7779_pinctrl_devices[] __initdata = {
115 &r8a7779_pfc_device,
116 &r8a7779_gpio0_device,
117 &r8a7779_gpio1_device,
118 &r8a7779_gpio2_device,
119 &r8a7779_gpio3_device,
120 &r8a7779_gpio4_device,
121 &r8a7779_gpio5_device,
122 &r8a7779_gpio6_device,
123};
124
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125void __init r8a7779_pinmux_init(void)
126{
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127 platform_add_devices(r8a7779_pinctrl_devices,
128 ARRAY_SIZE(r8a7779_pinctrl_devices));
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129}
130
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131static struct plat_sci_port scif0_platform_data = {
132 .mapbase = 0xffe40000,
133 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
134 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
135 .scbrr_algo_id = SCBRR_ALGO_2,
136 .type = PORT_SCIF,
dbe95ad0 137 .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
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138};
139
140static struct platform_device scif0_device = {
141 .name = "sh-sci",
142 .id = 0,
143 .dev = {
144 .platform_data = &scif0_platform_data,
145 },
146};
147
148static struct plat_sci_port scif1_platform_data = {
149 .mapbase = 0xffe41000,
150 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
151 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
152 .scbrr_algo_id = SCBRR_ALGO_2,
153 .type = PORT_SCIF,
dbe95ad0 154 .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
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155};
156
157static struct platform_device scif1_device = {
158 .name = "sh-sci",
159 .id = 1,
160 .dev = {
161 .platform_data = &scif1_platform_data,
162 },
163};
164
165static struct plat_sci_port scif2_platform_data = {
166 .mapbase = 0xffe42000,
167 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
168 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
169 .scbrr_algo_id = SCBRR_ALGO_2,
170 .type = PORT_SCIF,
dbe95ad0 171 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
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172};
173
174static struct platform_device scif2_device = {
175 .name = "sh-sci",
176 .id = 2,
177 .dev = {
178 .platform_data = &scif2_platform_data,
179 },
180};
181
182static struct plat_sci_port scif3_platform_data = {
183 .mapbase = 0xffe43000,
184 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
185 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
186 .scbrr_algo_id = SCBRR_ALGO_2,
187 .type = PORT_SCIF,
dbe95ad0 188 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
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189};
190
191static struct platform_device scif3_device = {
192 .name = "sh-sci",
193 .id = 3,
194 .dev = {
195 .platform_data = &scif3_platform_data,
196 },
197};
198
199static struct plat_sci_port scif4_platform_data = {
200 .mapbase = 0xffe44000,
201 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
202 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
203 .scbrr_algo_id = SCBRR_ALGO_2,
204 .type = PORT_SCIF,
dbe95ad0 205 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
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206};
207
208static struct platform_device scif4_device = {
209 .name = "sh-sci",
210 .id = 4,
211 .dev = {
212 .platform_data = &scif4_platform_data,
213 },
214};
215
216static struct plat_sci_port scif5_platform_data = {
217 .mapbase = 0xffe45000,
218 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
219 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
220 .scbrr_algo_id = SCBRR_ALGO_2,
221 .type = PORT_SCIF,
dbe95ad0 222 .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
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223};
224
225static struct platform_device scif5_device = {
226 .name = "sh-sci",
227 .id = 5,
228 .dev = {
229 .platform_data = &scif5_platform_data,
230 },
231};
232
233/* TMU */
234static struct sh_timer_config tmu00_platform_data = {
235 .name = "TMU00",
236 .channel_offset = 0x4,
237 .timer_bit = 0,
238 .clockevent_rating = 200,
239};
240
241static struct resource tmu00_resources[] = {
242 [0] = {
243 .name = "TMU00",
244 .start = 0xffd80008,
245 .end = 0xffd80013,
246 .flags = IORESOURCE_MEM,
247 },
248 [1] = {
dbe95ad0 249 .start = gic_iid(0x40),
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250 .flags = IORESOURCE_IRQ,
251 },
252};
253
254static struct platform_device tmu00_device = {
255 .name = "sh_tmu",
256 .id = 0,
257 .dev = {
258 .platform_data = &tmu00_platform_data,
259 },
260 .resource = tmu00_resources,
261 .num_resources = ARRAY_SIZE(tmu00_resources),
262};
263
264static struct sh_timer_config tmu01_platform_data = {
265 .name = "TMU01",
266 .channel_offset = 0x10,
267 .timer_bit = 1,
268 .clocksource_rating = 200,
269};
270
271static struct resource tmu01_resources[] = {
272 [0] = {
273 .name = "TMU01",
274 .start = 0xffd80014,
275 .end = 0xffd8001f,
276 .flags = IORESOURCE_MEM,
277 },
278 [1] = {
dbe95ad0 279 .start = gic_iid(0x41),
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280 .flags = IORESOURCE_IRQ,
281 },
282};
283
284static struct platform_device tmu01_device = {
285 .name = "sh_tmu",
286 .id = 1,
287 .dev = {
288 .platform_data = &tmu01_platform_data,
289 },
290 .resource = tmu01_resources,
291 .num_resources = ARRAY_SIZE(tmu01_resources),
292};
293
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294/* I2C */
295static struct resource rcar_i2c0_res[] = {
296 {
297 .start = 0xffc70000,
298 .end = 0xffc70fff,
299 .flags = IORESOURCE_MEM,
300 }, {
dbe95ad0 301 .start = gic_iid(0x6f),
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302 .flags = IORESOURCE_IRQ,
303 },
304};
305
306static struct platform_device i2c0_device = {
307 .name = "i2c-rcar",
308 .id = 0,
309 .resource = rcar_i2c0_res,
310 .num_resources = ARRAY_SIZE(rcar_i2c0_res),
311};
312
313static struct resource rcar_i2c1_res[] = {
314 {
315 .start = 0xffc71000,
316 .end = 0xffc71fff,
317 .flags = IORESOURCE_MEM,
318 }, {
dbe95ad0 319 .start = gic_iid(0x72),
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320 .flags = IORESOURCE_IRQ,
321 },
322};
323
324static struct platform_device i2c1_device = {
325 .name = "i2c-rcar",
326 .id = 1,
327 .resource = rcar_i2c1_res,
328 .num_resources = ARRAY_SIZE(rcar_i2c1_res),
329};
330
331static struct resource rcar_i2c2_res[] = {
332 {
333 .start = 0xffc72000,
334 .end = 0xffc72fff,
335 .flags = IORESOURCE_MEM,
336 }, {
dbe95ad0 337 .start = gic_iid(0x70),
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338 .flags = IORESOURCE_IRQ,
339 },
340};
341
342static struct platform_device i2c2_device = {
343 .name = "i2c-rcar",
344 .id = 2,
345 .resource = rcar_i2c2_res,
346 .num_resources = ARRAY_SIZE(rcar_i2c2_res),
347};
348
349static struct resource rcar_i2c3_res[] = {
350 {
351 .start = 0xffc73000,
352 .end = 0xffc73fff,
353 .flags = IORESOURCE_MEM,
354 }, {
dbe95ad0 355 .start = gic_iid(0x71),
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356 .flags = IORESOURCE_IRQ,
357 },
358};
359
360static struct platform_device i2c3_device = {
361 .name = "i2c-rcar",
362 .id = 3,
363 .resource = rcar_i2c3_res,
364 .num_resources = ARRAY_SIZE(rcar_i2c3_res),
365};
366
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367static struct resource sata_resources[] = {
368 [0] = {
369 .name = "rcar-sata",
370 .start = 0xfc600000,
371 .end = 0xfc601fff,
372 .flags = IORESOURCE_MEM,
373 },
374 [1] = {
d60cd5f1 375 .start = gic_iid(0x84),
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376 .flags = IORESOURCE_IRQ,
377 },
378};
379
380static struct platform_device sata_device = {
381 .name = "sata_rcar",
382 .id = -1,
383 .resource = sata_resources,
384 .num_resources = ARRAY_SIZE(sata_resources),
385 .dev = {
386 .dma_mask = &sata_device.dev.coherent_dma_mask,
387 .coherent_dma_mask = DMA_BIT_MASK(32),
388 },
389};
390
2c8788bf 391/* USB PHY */
2437b27c 392static struct resource usb_phy_resources[] __initdata = {
2c8788bf 393 [0] = {
725bf9dc 394 .start = 0xffe70800,
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395 .end = 0xffe70900 - 1,
396 .flags = IORESOURCE_MEM,
397 },
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398};
399
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400/* USB */
401static struct usb_phy *phy;
402
403static int usb_power_on(struct platform_device *pdev)
404{
405 if (IS_ERR(phy))
406 return PTR_ERR(phy);
407
408 pm_runtime_enable(&pdev->dev);
409 pm_runtime_get_sync(&pdev->dev);
410
411 usb_phy_init(phy);
412
413 return 0;
414}
415
416static void usb_power_off(struct platform_device *pdev)
417{
418 if (IS_ERR(phy))
419 return;
420
421 usb_phy_shutdown(phy);
422
423 pm_runtime_put_sync(&pdev->dev);
424 pm_runtime_disable(&pdev->dev);
425}
426
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427static int ehci_init_internal_buffer(struct usb_hcd *hcd)
428{
429 /*
430 * Below are recommended values from the datasheet;
431 * see [USB :: Setting of EHCI Internal Buffer].
432 */
433 /* EHCI IP internal buffer setting */
434 iowrite32(0x00ff0040, hcd->regs + 0x0094);
435 /* EHCI IP internal buffer enable */
436 iowrite32(0x00000001, hcd->regs + 0x009C);
437
438 return 0;
439}
440
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441static struct usb_ehci_pdata ehcix_pdata = {
442 .power_on = usb_power_on,
443 .power_off = usb_power_off,
444 .power_suspend = usb_power_off,
84a812da 445 .pre_setup = ehci_init_internal_buffer,
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446};
447
448static struct resource ehci0_resources[] = {
449 [0] = {
450 .start = 0xffe70000,
451 .end = 0xffe70400 - 1,
452 .flags = IORESOURCE_MEM,
453 },
454 [1] = {
455 .start = gic_iid(0x4c),
456 .flags = IORESOURCE_IRQ,
457 },
458};
459
460static struct platform_device ehci0_device = {
461 .name = "ehci-platform",
462 .id = 0,
463 .dev = {
464 .dma_mask = &ehci0_device.dev.coherent_dma_mask,
465 .coherent_dma_mask = 0xffffffff,
466 .platform_data = &ehcix_pdata,
467 },
468 .num_resources = ARRAY_SIZE(ehci0_resources),
469 .resource = ehci0_resources,
470};
471
472static struct resource ehci1_resources[] = {
473 [0] = {
474 .start = 0xfff70000,
475 .end = 0xfff70400 - 1,
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .start = gic_iid(0x4d),
480 .flags = IORESOURCE_IRQ,
481 },
482};
483
484static struct platform_device ehci1_device = {
485 .name = "ehci-platform",
486 .id = 1,
487 .dev = {
488 .dma_mask = &ehci1_device.dev.coherent_dma_mask,
489 .coherent_dma_mask = 0xffffffff,
490 .platform_data = &ehcix_pdata,
491 },
492 .num_resources = ARRAY_SIZE(ehci1_resources),
493 .resource = ehci1_resources,
494};
495
496static struct usb_ohci_pdata ohcix_pdata = {
497 .power_on = usb_power_on,
498 .power_off = usb_power_off,
499 .power_suspend = usb_power_off,
500};
501
502static struct resource ohci0_resources[] = {
503 [0] = {
504 .start = 0xffe70400,
505 .end = 0xffe70800 - 1,
506 .flags = IORESOURCE_MEM,
507 },
508 [1] = {
509 .start = gic_iid(0x4c),
510 .flags = IORESOURCE_IRQ,
511 },
512};
513
514static struct platform_device ohci0_device = {
515 .name = "ohci-platform",
516 .id = 0,
517 .dev = {
518 .dma_mask = &ohci0_device.dev.coherent_dma_mask,
519 .coherent_dma_mask = 0xffffffff,
520 .platform_data = &ohcix_pdata,
521 },
522 .num_resources = ARRAY_SIZE(ohci0_resources),
523 .resource = ohci0_resources,
524};
525
526static struct resource ohci1_resources[] = {
527 [0] = {
528 .start = 0xfff70400,
529 .end = 0xfff70800 - 1,
530 .flags = IORESOURCE_MEM,
531 },
532 [1] = {
533 .start = gic_iid(0x4d),
534 .flags = IORESOURCE_IRQ,
535 },
536};
537
538static struct platform_device ohci1_device = {
539 .name = "ohci-platform",
540 .id = 1,
541 .dev = {
542 .dma_mask = &ohci1_device.dev.coherent_dma_mask,
543 .coherent_dma_mask = 0xffffffff,
544 .platform_data = &ohcix_pdata,
545 },
546 .num_resources = ARRAY_SIZE(ohci1_resources),
547 .resource = ohci1_resources,
548};
549
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550/* Ether */
551static struct resource ether_resources[] = {
552 {
553 .start = 0xfde00000,
554 .end = 0xfde003ff,
555 .flags = IORESOURCE_MEM,
556 }, {
557 .start = gic_iid(0xb4),
558 .flags = IORESOURCE_IRQ,
559 },
560};
561
916ddc35 562static struct platform_device *r8a7779_devices_dt[] __initdata = {
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563 &scif0_device,
564 &scif1_device,
565 &scif2_device,
566 &scif3_device,
567 &scif4_device,
568 &scif5_device,
569 &tmu00_device,
570 &tmu01_device,
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571};
572
2c8788bf 573static struct platform_device *r8a7779_standard_devices[] __initdata = {
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574 &i2c0_device,
575 &i2c1_device,
576 &i2c2_device,
577 &i2c3_device,
a7b9837c 578 &sata_device,
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579};
580
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581void __init r8a7779_add_standard_devices(void)
582{
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583#ifdef CONFIG_CACHE_L2X0
584 /* Early BRESP enable, Shared attribute override enable, 64K*16way */
ed7d132a 585 l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
8bac13f5 586#endif
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587 r8a7779_pm_init();
588
45e5ca57 589 r8a7779_init_pm_domains();
a662c082 590
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591 platform_add_devices(r8a7779_devices_dt,
592 ARRAY_SIZE(r8a7779_devices_dt));
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593 platform_add_devices(r8a7779_standard_devices,
594 ARRAY_SIZE(r8a7779_standard_devices));
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595}
596
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597void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
598{
4c370abb 599 platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
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600 ether_resources,
601 ARRAY_SIZE(ether_resources),
602 pdata, sizeof(*pdata));
603}
604
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605void __init r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
606{
607 platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
608 usb_phy_resources,
609 ARRAY_SIZE(usb_phy_resources),
610 pdata, sizeof(*pdata));
611}
612
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613/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
614void __init __weak r8a7779_register_twd(void) { }
615
6bb27d73 616void __init r8a7779_earlytimer_init(void)
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617{
618 r8a7779_clock_init();
619 shmobile_earlytimer_init();
b759bd11 620 r8a7779_register_twd();
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621}
622
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623void __init r8a7779_add_early_devices(void)
624{
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625 early_platform_add_devices(r8a7779_devices_dt,
626 ARRAY_SIZE(r8a7779_devices_dt));
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627
628 /* Early serial console setup is not included here due to
629 * memory map collisions. The SCIF serial ports in r8a7779
630 * are difficult to entity map 1:1 due to collision with the
631 * virtual memory range used by the coherent DMA code on ARM.
632 *
633 * Anyone wanting to debug early can remove UPF_IOREMAP from
634 * the sh-sci serial console platform data, adjust mapbase
635 * to a static M:N virt:phys mapping that needs to be added to
636 * the mappings passed with iotable_init() above.
637 *
638 * Then add a call to shmobile_setup_console() from this function.
639 *
640 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
641 * command line in case of the marzen board.
642 */
f411fade 643}
10e8d4f6 644
2c8788bf
SS
645static struct platform_device *r8a7779_late_devices[] __initdata = {
646 &ehci0_device,
647 &ehci1_device,
648 &ohci0_device,
649 &ohci1_device,
650};
651
652void __init r8a7779_init_late(void)
653{
654 /* get USB PHY */
655 phy = usb_get_phy(USB_PHY_TYPE_USB2);
656
657 shmobile_init_late();
658 platform_add_devices(r8a7779_late_devices,
659 ARRAY_SIZE(r8a7779_late_devices));
660}
661
10e8d4f6 662#ifdef CONFIG_USE_OF
916ddc35 663void __init r8a7779_init_delay(void)
10e8d4f6
SH
664{
665 shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
10e8d4f6
SH
666}
667
668static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
669 {},
670};
671
672void __init r8a7779_add_standard_devices_dt(void)
673{
674 /* clocks are setup late during boot in the case of DT */
675 r8a7779_clock_init();
676
916ddc35
SH
677 platform_add_devices(r8a7779_devices_dt,
678 ARRAY_SIZE(r8a7779_devices_dt));
10e8d4f6
SH
679 of_platform_populate(NULL, of_default_bus_match_table,
680 r8a7779_auxdata_lookup, NULL);
681}
682
683static const char *r8a7779_compat_dt[] __initdata = {
684 "renesas,r8a7779",
685 NULL,
686};
687
abe0e14b 688DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
10e8d4f6 689 .map_io = r8a7779_map_io,
916ddc35 690 .init_early = r8a7779_init_delay,
10e8d4f6
SH
691 .nr_irqs = NR_IRQS_LEGACY,
692 .init_irq = r8a7779_init_irq_dt,
693 .init_machine = r8a7779_add_standard_devices_dt,
694 .init_time = shmobile_timer_init,
2c8788bf 695 .init_late = r8a7779_init_late,
10e8d4f6
SH
696 .dt_compat = r8a7779_compat_dt,
697MACHINE_END
698#endif /* CONFIG_USE_OF */
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