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bc4e814e | 1 | /* |
2 | * arch/arm/mach-spear3xx/spear310.c | |
3 | * | |
4 | * SPEAr310 machine source file | |
5 | * | |
c5fa4fdc | 6 | * Copyright (C) 2009-2012 ST Microelectronics |
10d8935f | 7 | * Viresh Kumar <viresh.linux@gmail.com> |
bc4e814e | 8 | * |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without any | |
11 | * warranty of any kind, whether express or implied. | |
12 | */ | |
13 | ||
5fb00f96 VK |
14 | #define pr_fmt(fmt) "SPEAr310: " fmt |
15 | ||
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16 | #include <linux/amba/pl08x.h> |
17 | #include <linux/amba/serial.h> | |
18 | #include <linux/of_platform.h> | |
c5fa4fdc | 19 | #include <asm/mach/arch.h> |
2b9c613c | 20 | #include "generic.h" |
5019f0b1 AB |
21 | #include <mach/spear.h> |
22 | ||
23 | #define SPEAR310_UART1_BASE UL(0xB2000000) | |
24 | #define SPEAR310_UART2_BASE UL(0xB2080000) | |
25 | #define SPEAR310_UART3_BASE UL(0xB2100000) | |
26 | #define SPEAR310_UART4_BASE UL(0xB2180000) | |
27 | #define SPEAR310_UART5_BASE UL(0xB2200000) | |
4c18e77f | 28 | |
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29 | /* DMAC platform data's slave info */ |
30 | struct pl08x_channel_data spear310_dma_info[] = { | |
31 | { | |
32 | .bus_id = "uart0_rx", | |
33 | .min_signal = 2, | |
34 | .max_signal = 2, | |
35 | .muxval = 0, | |
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36 | .periph_buses = PL08X_AHB1, |
37 | }, { | |
38 | .bus_id = "uart0_tx", | |
39 | .min_signal = 3, | |
40 | .max_signal = 3, | |
41 | .muxval = 0, | |
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42 | .periph_buses = PL08X_AHB1, |
43 | }, { | |
44 | .bus_id = "ssp0_rx", | |
45 | .min_signal = 8, | |
46 | .max_signal = 8, | |
47 | .muxval = 0, | |
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48 | .periph_buses = PL08X_AHB1, |
49 | }, { | |
50 | .bus_id = "ssp0_tx", | |
51 | .min_signal = 9, | |
52 | .max_signal = 9, | |
53 | .muxval = 0, | |
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54 | .periph_buses = PL08X_AHB1, |
55 | }, { | |
56 | .bus_id = "i2c_rx", | |
57 | .min_signal = 10, | |
58 | .max_signal = 10, | |
59 | .muxval = 0, | |
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60 | .periph_buses = PL08X_AHB1, |
61 | }, { | |
62 | .bus_id = "i2c_tx", | |
63 | .min_signal = 11, | |
64 | .max_signal = 11, | |
65 | .muxval = 0, | |
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66 | .periph_buses = PL08X_AHB1, |
67 | }, { | |
68 | .bus_id = "irda", | |
69 | .min_signal = 12, | |
70 | .max_signal = 12, | |
71 | .muxval = 0, | |
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72 | .periph_buses = PL08X_AHB1, |
73 | }, { | |
74 | .bus_id = "adc", | |
75 | .min_signal = 13, | |
76 | .max_signal = 13, | |
77 | .muxval = 0, | |
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78 | .periph_buses = PL08X_AHB1, |
79 | }, { | |
80 | .bus_id = "to_jpeg", | |
81 | .min_signal = 14, | |
82 | .max_signal = 14, | |
83 | .muxval = 0, | |
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84 | .periph_buses = PL08X_AHB1, |
85 | }, { | |
86 | .bus_id = "from_jpeg", | |
87 | .min_signal = 15, | |
88 | .max_signal = 15, | |
89 | .muxval = 0, | |
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90 | .periph_buses = PL08X_AHB1, |
91 | }, { | |
92 | .bus_id = "uart1_rx", | |
93 | .min_signal = 0, | |
94 | .max_signal = 0, | |
95 | .muxval = 1, | |
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96 | .periph_buses = PL08X_AHB1, |
97 | }, { | |
98 | .bus_id = "uart1_tx", | |
99 | .min_signal = 1, | |
100 | .max_signal = 1, | |
101 | .muxval = 1, | |
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102 | .periph_buses = PL08X_AHB1, |
103 | }, { | |
104 | .bus_id = "uart2_rx", | |
105 | .min_signal = 2, | |
106 | .max_signal = 2, | |
107 | .muxval = 1, | |
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108 | .periph_buses = PL08X_AHB1, |
109 | }, { | |
110 | .bus_id = "uart2_tx", | |
111 | .min_signal = 3, | |
112 | .max_signal = 3, | |
113 | .muxval = 1, | |
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114 | .periph_buses = PL08X_AHB1, |
115 | }, { | |
116 | .bus_id = "uart3_rx", | |
117 | .min_signal = 4, | |
118 | .max_signal = 4, | |
119 | .muxval = 1, | |
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120 | .periph_buses = PL08X_AHB1, |
121 | }, { | |
122 | .bus_id = "uart3_tx", | |
123 | .min_signal = 5, | |
124 | .max_signal = 5, | |
125 | .muxval = 1, | |
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126 | .periph_buses = PL08X_AHB1, |
127 | }, { | |
128 | .bus_id = "uart4_rx", | |
129 | .min_signal = 6, | |
130 | .max_signal = 6, | |
131 | .muxval = 1, | |
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132 | .periph_buses = PL08X_AHB1, |
133 | }, { | |
134 | .bus_id = "uart4_tx", | |
135 | .min_signal = 7, | |
136 | .max_signal = 7, | |
137 | .muxval = 1, | |
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138 | .periph_buses = PL08X_AHB1, |
139 | }, { | |
140 | .bus_id = "uart5_rx", | |
141 | .min_signal = 8, | |
142 | .max_signal = 8, | |
143 | .muxval = 1, | |
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144 | .periph_buses = PL08X_AHB1, |
145 | }, { | |
146 | .bus_id = "uart5_tx", | |
147 | .min_signal = 9, | |
148 | .max_signal = 9, | |
149 | .muxval = 1, | |
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150 | .periph_buses = PL08X_AHB1, |
151 | }, { | |
152 | .bus_id = "ras5_rx", | |
153 | .min_signal = 10, | |
154 | .max_signal = 10, | |
155 | .muxval = 1, | |
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156 | .periph_buses = PL08X_AHB1, |
157 | }, { | |
158 | .bus_id = "ras5_tx", | |
159 | .min_signal = 11, | |
160 | .max_signal = 11, | |
161 | .muxval = 1, | |
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162 | .periph_buses = PL08X_AHB1, |
163 | }, { | |
164 | .bus_id = "ras6_rx", | |
165 | .min_signal = 12, | |
166 | .max_signal = 12, | |
167 | .muxval = 1, | |
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168 | .periph_buses = PL08X_AHB1, |
169 | }, { | |
170 | .bus_id = "ras6_tx", | |
171 | .min_signal = 13, | |
172 | .max_signal = 13, | |
173 | .muxval = 1, | |
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174 | .periph_buses = PL08X_AHB1, |
175 | }, { | |
176 | .bus_id = "ras7_rx", | |
177 | .min_signal = 14, | |
178 | .max_signal = 14, | |
179 | .muxval = 1, | |
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180 | .periph_buses = PL08X_AHB1, |
181 | }, { | |
182 | .bus_id = "ras7_tx", | |
183 | .min_signal = 15, | |
184 | .max_signal = 15, | |
185 | .muxval = 1, | |
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186 | .periph_buses = PL08X_AHB1, |
187 | }, | |
188 | }; | |
189 | ||
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190 | /* uart devices plat data */ |
191 | static struct amba_pl011_data spear310_uart_data[] = { | |
192 | { | |
193 | .dma_filter = pl08x_filter_id, | |
194 | .dma_tx_param = "uart1_tx", | |
195 | .dma_rx_param = "uart1_rx", | |
196 | }, { | |
197 | .dma_filter = pl08x_filter_id, | |
198 | .dma_tx_param = "uart2_tx", | |
199 | .dma_rx_param = "uart2_rx", | |
200 | }, { | |
201 | .dma_filter = pl08x_filter_id, | |
202 | .dma_tx_param = "uart3_tx", | |
203 | .dma_rx_param = "uart3_rx", | |
204 | }, { | |
205 | .dma_filter = pl08x_filter_id, | |
206 | .dma_tx_param = "uart4_tx", | |
207 | .dma_rx_param = "uart4_rx", | |
208 | }, { | |
209 | .dma_filter = pl08x_filter_id, | |
210 | .dma_tx_param = "uart5_tx", | |
211 | .dma_rx_param = "uart5_rx", | |
212 | }, | |
213 | }; | |
c2c07831 | 214 | |
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215 | /* Add SPEAr310 auxdata to pass platform data */ |
216 | static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { | |
217 | OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, | |
218 | &pl022_plat_data), | |
d42799b7 | 219 | OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL, |
0b7ee717 | 220 | &pl080_plat_data), |
c5fa4fdc VK |
221 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, |
222 | &spear310_uart_data[0]), | |
223 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL, | |
224 | &spear310_uart_data[1]), | |
225 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL, | |
226 | &spear310_uart_data[2]), | |
227 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL, | |
228 | &spear310_uart_data[3]), | |
229 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL, | |
230 | &spear310_uart_data[4]), | |
231 | {} | |
232 | }; | |
233 | ||
234 | static void __init spear310_dt_init(void) | |
bc4e814e | 235 | { |
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236 | pl080_plat_data.slave_channels = spear310_dma_info; |
237 | pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info); | |
238 | ||
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239 | of_platform_populate(NULL, of_default_bus_match_table, |
240 | spear310_auxdata_lookup, NULL); | |
70f4c0bf | 241 | } |
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242 | |
243 | static const char * const spear310_dt_board_compat[] = { | |
244 | "st,spear310", | |
245 | "st,spear310-evb", | |
246 | NULL, | |
247 | }; | |
248 | ||
249 | static void __init spear310_map_io(void) | |
250 | { | |
251 | spear3xx_map_io(); | |
c5fa4fdc VK |
252 | } |
253 | ||
254 | DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree") | |
255 | .map_io = spear310_map_io, | |
6bb27d73 | 256 | .init_time = spear3xx_timer_init, |
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257 | .init_machine = spear310_dt_init, |
258 | .restart = spear_restart, | |
259 | .dt_compat = spear310_dt_board_compat, | |
260 | MACHINE_END |