[deliverable/linux.git] / arch / arm / mach-spear3xx / spear300.c

/*
 * arch/arm/mach-spear3xx/spear300.c
 *
 * SPEAr300 machine source file
 *
 * Copyright (C) 2009-2012 ST Microelectronics
 * Viresh Kumar <viresh.kumar@st.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#define pr_fmt(fmt) "SPEAr300: " fmt

#include <linux/amba/pl08x.h>
#include <linux/of_platform.h>
#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <plat/shirq.h>
#include <mach/generic.h>
#include <mach/hardware.h>

/* pad multiplexing support */
/* muxing registers */
#define PAD_MUX_CONFIG_REG	0x00
#define MODE_CONFIG_REG		0x04

/* modes */
#define NAND_MODE			(1 << 0)
#define NOR_MODE			(1 << 1)
#define PHOTO_FRAME_MODE		(1 << 2)
#define LEND_IP_PHONE_MODE		(1 << 3)
#define HEND_IP_PHONE_MODE		(1 << 4)
#define LEND_WIFI_PHONE_MODE		(1 << 5)
#define HEND_WIFI_PHONE_MODE		(1 << 6)
#define ATA_PABX_WI2S_MODE		(1 << 7)
#define ATA_PABX_I2S_MODE		(1 << 8)
#define CAML_LCDW_MODE			(1 << 9)
#define CAMU_LCD_MODE			(1 << 10)
#define CAMU_WLCD_MODE			(1 << 11)
#define CAML_LCD_MODE			(1 << 12)
#define ALL_MODES			0x1FFF

struct pmx_mode spear300_nand_mode = {
	.id = NAND_MODE,
	.name = "nand mode",
	.mask = 0x00,
};

struct pmx_mode spear300_nor_mode = {
	.id = NOR_MODE,
	.name = "nor mode",
	.mask = 0x01,
};

struct pmx_mode spear300_photo_frame_mode = {
	.id = PHOTO_FRAME_MODE,
	.name = "photo frame mode",
	.mask = 0x02,
};

struct pmx_mode spear300_lend_ip_phone_mode = {
	.id = LEND_IP_PHONE_MODE,
	.name = "lend ip phone mode",
	.mask = 0x03,
};

struct pmx_mode spear300_hend_ip_phone_mode = {
	.id = HEND_IP_PHONE_MODE,
	.name = "hend ip phone mode",
	.mask = 0x04,
};

struct pmx_mode spear300_lend_wifi_phone_mode = {
	.id = LEND_WIFI_PHONE_MODE,
	.name = "lend wifi phone mode",
	.mask = 0x05,
};

struct pmx_mode spear300_hend_wifi_phone_mode = {
	.id = HEND_WIFI_PHONE_MODE,
	.name = "hend wifi phone mode",
	.mask = 0x06,
};

struct pmx_mode spear300_ata_pabx_wi2s_mode = {
	.id = ATA_PABX_WI2S_MODE,
	.name = "ata pabx wi2s mode",
	.mask = 0x07,
};

struct pmx_mode spear300_ata_pabx_i2s_mode = {
	.id = ATA_PABX_I2S_MODE,
	.name = "ata pabx i2s mode",
	.mask = 0x08,
};

struct pmx_mode spear300_caml_lcdw_mode = {
	.id = CAML_LCDW_MODE,
	.name = "caml lcdw mode",
	.mask = 0x0C,
};

struct pmx_mode spear300_camu_lcd_mode = {
	.id = CAMU_LCD_MODE,
	.name = "camu lcd mode",
	.mask = 0x0D,
};

struct pmx_mode spear300_camu_wlcd_mode = {
	.id = CAMU_WLCD_MODE,
	.name = "camu wlcd mode",
	.mask = 0x0E,
};

struct pmx_mode spear300_caml_lcd_mode = {
	.id = CAML_LCD_MODE,
	.name = "caml lcd mode",
	.mask = 0x0F,
};

/* devices */
static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
	{
		.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
		.mask = PMX_FIRDA_MASK,
	},
};

struct pmx_dev spear300_pmx_fsmc_2_chips = {
	.name = "fsmc_2_chips",
	.modes = pmx_fsmc_2_chips_modes,
	.mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
	{
		.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
		.mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
	},
};

struct pmx_dev spear300_pmx_fsmc_4_chips = {
	.name = "fsmc_4_chips",
	.modes = pmx_fsmc_4_chips_modes,
	.mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_keyboard_modes[] = {
	{
		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
			LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
			CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
			CAML_LCD_MODE,
		.mask = 0x0,
	},
};

struct pmx_dev spear300_pmx_keyboard = {
	.name = "keyboard",
	.modes = pmx_keyboard_modes,
	.mode_count = ARRAY_SIZE(pmx_keyboard_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_clcd_modes[] = {
	{
		.ids = PHOTO_FRAME_MODE,
		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
	}, {
		.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
			CAMU_LCD_MODE | CAML_LCD_MODE,
		.mask = PMX_TIMER_3_4_MASK,
	},
};

struct pmx_dev spear300_pmx_clcd = {
	.name = "clcd",
	.modes = pmx_clcd_modes,
	.mode_count = ARRAY_SIZE(pmx_clcd_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
	{
		.ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
		.mask = PMX_MII_MASK,
	}, {
		.ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
		.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
	}, {
		.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
		.mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
	}, {
		.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
		.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
	}, {
		.ids = ATA_PABX_WI2S_MODE,
		.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
			| PMX_UART0_MODEM_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_gpio = {
	.name = "telecom_gpio",
	.modes = pmx_telecom_gpio_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
	{
		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
			| HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
			| ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
			| CAMU_WLCD_MODE | CAML_LCD_MODE,
		.mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_tdm = {
	.name = "telecom_tdm",
	.modes = pmx_telecom_tdm_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
	{
		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
			LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
			| ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
			CAML_LCDW_MODE | CAML_LCD_MODE,
		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
	.name = "telecom_spi_cs_i2c_clk",
	.modes = pmx_telecom_spi_cs_i2c_clk_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
	{
		.ids = CAML_LCDW_MODE | CAML_LCD_MODE,
		.mask = PMX_MII_MASK,
	}, {
		.ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_camera = {
	.name = "telecom_camera",
	.modes = pmx_telecom_camera_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
	{
		.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
			| CAMU_WLCD_MODE | CAML_LCD_MODE,
		.mask = PMX_TIMER_1_2_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_dac = {
	.name = "telecom_dac",
	.modes = pmx_telecom_dac_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
	{
		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
			| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
			ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
			| CAMU_WLCD_MODE | CAML_LCD_MODE,
		.mask = PMX_UART0_MODEM_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_i2s = {
	.name = "telecom_i2s",
	.modes = pmx_telecom_i2s_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
	{
		.ids = NAND_MODE | NOR_MODE,
		.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
			PMX_TIMER_3_4_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_boot_pins = {
	.name = "telecom_boot_pins",
	.modes = pmx_telecom_boot_pins_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
	{
		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
			HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
			CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
			ATA_PABX_I2S_MODE,
		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
			PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
			PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
	.name = "telecom_sdhci_4bit",
	.modes = pmx_telecom_sdhci_4bit_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
	{
		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
			HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
			CAMU_WLCD_MODE | CAML_LCD_MODE,
		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
			PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
			PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
	},
};

struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
	.name = "telecom_sdhci_8bit",
	.modes = pmx_telecom_sdhci_8bit_modes,
	.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
	.enb_on_reset = 1,
};

static struct pmx_dev_mode pmx_gpio1_modes[] = {
	{
		.ids = PHOTO_FRAME_MODE,
		.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
			PMX_TIMER_3_4_MASK,
	},
};

struct pmx_dev spear300_pmx_gpio1 = {
	.name = "arm gpio1",
	.modes = pmx_gpio1_modes,
	.mode_count = ARRAY_SIZE(pmx_gpio1_modes),
	.enb_on_reset = 1,
};

/* pmx driver structure */
static struct pmx_driver pmx_driver = {
	.mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
	.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
};

/* spear3xx shared irq */
static struct shirq_dev_config shirq_ras1_config[] = {
	{
		.virq = SPEAR300_VIRQ_IT_PERS_S,
		.enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
		.status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_IT_CHANGE_S,
		.enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
		.status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_I2S,
		.enb_mask = SPEAR300_I2S_IRQ_MASK,
		.status_mask = SPEAR300_I2S_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_TDM,
		.enb_mask = SPEAR300_TDM_IRQ_MASK,
		.status_mask = SPEAR300_TDM_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_CAMERA_L,
		.enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
		.status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_CAMERA_F,
		.enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
		.status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_CAMERA_V,
		.enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
		.status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_KEYBOARD,
		.enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
		.status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
	}, {
		.virq = SPEAR300_VIRQ_GPIO1,
		.enb_mask = SPEAR300_GPIO1_IRQ_MASK,
		.status_mask = SPEAR300_GPIO1_IRQ_MASK,
	},
};

static struct spear_shirq shirq_ras1 = {
	.irq = SPEAR3XX_IRQ_GEN_RAS_1,
	.dev_config = shirq_ras1_config,
	.dev_count = ARRAY_SIZE(shirq_ras1_config),
	.regs = {
		.enb_reg = SPEAR300_INT_ENB_MASK_REG,
		.status_reg = SPEAR300_INT_STS_MASK_REG,
		.status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
		.clear_reg = -1,
	},
};

/* padmux devices to enable */
static struct pmx_dev *spear300_evb_pmx_devs[] = {
	/* spear3xx specific devices */
	&spear3xx_pmx_i2c,
	&spear3xx_pmx_ssp_cs,
	&spear3xx_pmx_ssp,
	&spear3xx_pmx_mii,
	&spear3xx_pmx_uart0,

	/* spear300 specific devices */
	&spear300_pmx_fsmc_2_chips,
	&spear300_pmx_clcd,
	&spear300_pmx_telecom_sdhci_4bit,
	&spear300_pmx_gpio1,
};

/* DMAC platform data's slave info */
struct pl08x_channel_data spear300_dma_info[] = {
	{
		.bus_id = "uart0_rx",
		.min_signal = 2,
		.max_signal = 2,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "uart0_tx",
		.min_signal = 3,
		.max_signal = 3,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ssp0_rx",
		.min_signal = 8,
		.max_signal = 8,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ssp0_tx",
		.min_signal = 9,
		.max_signal = 9,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "i2c_rx",
		.min_signal = 10,
		.max_signal = 10,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "i2c_tx",
		.min_signal = 11,
		.max_signal = 11,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "irda",
		.min_signal = 12,
		.max_signal = 12,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "adc",
		.min_signal = 13,
		.max_signal = 13,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "to_jpeg",
		.min_signal = 14,
		.max_signal = 14,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "from_jpeg",
		.min_signal = 15,
		.max_signal = 15,
		.muxval = 0,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras0_rx",
		.min_signal = 0,
		.max_signal = 0,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras0_tx",
		.min_signal = 1,
		.max_signal = 1,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras1_rx",
		.min_signal = 2,
		.max_signal = 2,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras1_tx",
		.min_signal = 3,
		.max_signal = 3,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras2_rx",
		.min_signal = 4,
		.max_signal = 4,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras2_tx",
		.min_signal = 5,
		.max_signal = 5,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras3_rx",
		.min_signal = 6,
		.max_signal = 6,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras3_tx",
		.min_signal = 7,
		.max_signal = 7,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras4_rx",
		.min_signal = 8,
		.max_signal = 8,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras4_tx",
		.min_signal = 9,
		.max_signal = 9,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras5_rx",
		.min_signal = 10,
		.max_signal = 10,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras5_tx",
		.min_signal = 11,
		.max_signal = 11,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras6_rx",
		.min_signal = 12,
		.max_signal = 12,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras6_tx",
		.min_signal = 13,
		.max_signal = 13,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras7_rx",
		.min_signal = 14,
		.max_signal = 14,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	}, {
		.bus_id = "ras7_tx",
		.min_signal = 15,
		.max_signal = 15,
		.muxval = 1,
		.cctl = 0,
		.periph_buses = PL08X_AHB1,
	},
};

/* Add SPEAr300 auxdata to pass platform data */
static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
	OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
			&pl022_plat_data),
	OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
			&pl080_plat_data),
	{}
};

static void __init spear300_dt_init(void)
{
	int ret = -EINVAL;

	pl080_plat_data.slave_channels = spear300_dma_info;
	pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);

	of_platform_populate(NULL, of_default_bus_match_table,
			spear300_auxdata_lookup, NULL);

	/* shared irq registration */
	shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
	if (shirq_ras1.regs.base) {
		ret = spear_shirq_register(&shirq_ras1);
		if (ret)
			pr_err("Error registering Shared IRQ\n");
	}

	if (of_machine_is_compatible("st,spear300-evb")) {
		/* pmx initialization */
		pmx_driver.mode = &spear300_photo_frame_mode;
		pmx_driver.devs = spear300_evb_pmx_devs;
		pmx_driver.devs_count = ARRAY_SIZE(spear300_evb_pmx_devs);

		pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
		if (pmx_driver.base) {
			ret = pmx_register(&pmx_driver);
			if (ret)
				pr_err("padmux: registration failed. err no: %d\n",
						ret);
			/* Free Mapping, device selection already done */
			iounmap(pmx_driver.base);
		}

		if (ret)
			pr_err("Initialization Failed");
	}
}

static const char * const spear300_dt_board_compat[] = {
	"st,spear300",
	"st,spear300-evb",
	NULL,
};

static void __init spear300_map_io(void)
{
	spear3xx_map_io();
	spear300_clk_init();
}

DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
	.map_io		=	spear300_map_io,
	.init_irq	=	spear3xx_dt_init_irq,
	.handle_irq	=	vic_handle_irq,
	.timer		=	&spear3xx_timer,
	.init_machine	=	spear300_dt_init,
	.restart	=	spear_restart,
	.dt_compat	=	spear300_dt_board_compat,
MACHINE_END
Commit	Line	Data
bc4e814e	1	/*
	2	* arch/arm/mach-spear3xx/spear300.c
	3	*
	4	* SPEAr300 machine source file
	5	*
c5fa4fdc VK	6	* Copyright (C) 2009-2012 ST Microelectronics
c5fa4fdc VK	7	* Viresh Kumar <viresh.kumar@st.com>
bc4e814e	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2. This program is licensed "as is" without any
	11	* warranty of any kind, whether express or implied.
	12	*/
	13
5fb00f96 VK	14	#define pr_fmt(fmt) "SPEAr300: " fmt
5fb00f96 VK	15
0b7ee717	16	#include <linux/amba/pl08x.h>
c5fa4fdc VK	17	#include <linux/of_platform.h>
	18	#include <asm/hardware/vic.h>
	19	#include <asm/mach/arch.h>
410782be	20	#include <plat/shirq.h>
bc4e814e	21	#include <mach/generic.h>
02aa06bc	22	#include <mach/hardware.h>
bc4e814e	23
70f4c0bf	24	/* pad multiplexing support */
	25	/* muxing registers */
	26	#define PAD_MUX_CONFIG_REG 0x00
	27	#define MODE_CONFIG_REG 0x04
	28
	29	/* modes */
	30	#define NAND_MODE (1 << 0)
	31	#define NOR_MODE (1 << 1)
	32	#define PHOTO_FRAME_MODE (1 << 2)
	33	#define LEND_IP_PHONE_MODE (1 << 3)
	34	#define HEND_IP_PHONE_MODE (1 << 4)
	35	#define LEND_WIFI_PHONE_MODE (1 << 5)
	36	#define HEND_WIFI_PHONE_MODE (1 << 6)
	37	#define ATA_PABX_WI2S_MODE (1 << 7)
	38	#define ATA_PABX_I2S_MODE (1 << 8)
	39	#define CAML_LCDW_MODE (1 << 9)
	40	#define CAMU_LCD_MODE (1 << 10)
	41	#define CAMU_WLCD_MODE (1 << 11)
	42	#define CAML_LCD_MODE (1 << 12)
	43	#define ALL_MODES 0x1FFF
	44
6618c3ad	45	struct pmx_mode spear300_nand_mode = {
70f4c0bf	46	.id = NAND_MODE,
	47	.name = "nand mode",
	48	.mask = 0x00,
	49	};
	50
6618c3ad	51	struct pmx_mode spear300_nor_mode = {
70f4c0bf	52	.id = NOR_MODE,
	53	.name = "nor mode",
	54	.mask = 0x01,
	55	};
	56
6618c3ad	57	struct pmx_mode spear300_photo_frame_mode = {
70f4c0bf	58	.id = PHOTO_FRAME_MODE,
	59	.name = "photo frame mode",
	60	.mask = 0x02,
	61	};
	62
6618c3ad	63	struct pmx_mode spear300_lend_ip_phone_mode = {
70f4c0bf	64	.id = LEND_IP_PHONE_MODE,
	65	.name = "lend ip phone mode",
	66	.mask = 0x03,
	67	};
	68
6618c3ad	69	struct pmx_mode spear300_hend_ip_phone_mode = {
70f4c0bf	70	.id = HEND_IP_PHONE_MODE,
	71	.name = "hend ip phone mode",
	72	.mask = 0x04,
	73	};
	74
6618c3ad	75	struct pmx_mode spear300_lend_wifi_phone_mode = {
70f4c0bf	76	.id = LEND_WIFI_PHONE_MODE,
	77	.name = "lend wifi phone mode",
	78	.mask = 0x05,
	79	};
	80
6618c3ad	81	struct pmx_mode spear300_hend_wifi_phone_mode = {
70f4c0bf	82	.id = HEND_WIFI_PHONE_MODE,
	83	.name = "hend wifi phone mode",
	84	.mask = 0x06,
	85	};
	86
6618c3ad	87	struct pmx_mode spear300_ata_pabx_wi2s_mode = {
70f4c0bf	88	.id = ATA_PABX_WI2S_MODE,
	89	.name = "ata pabx wi2s mode",
	90	.mask = 0x07,
	91	};
	92
6618c3ad	93	struct pmx_mode spear300_ata_pabx_i2s_mode = {
70f4c0bf	94	.id = ATA_PABX_I2S_MODE,
	95	.name = "ata pabx i2s mode",
	96	.mask = 0x08,
	97	};
	98
6618c3ad	99	struct pmx_mode spear300_caml_lcdw_mode = {
70f4c0bf	100	.id = CAML_LCDW_MODE,
	101	.name = "caml lcdw mode",
	102	.mask = 0x0C,
	103	};
	104
6618c3ad	105	struct pmx_mode spear300_camu_lcd_mode = {
70f4c0bf	106	.id = CAMU_LCD_MODE,
	107	.name = "camu lcd mode",
	108	.mask = 0x0D,
	109	};
	110
6618c3ad	111	struct pmx_mode spear300_camu_wlcd_mode = {
70f4c0bf	112	.id = CAMU_WLCD_MODE,
	113	.name = "camu wlcd mode",
	114	.mask = 0x0E,
	115	};
	116
6618c3ad	117	struct pmx_mode spear300_caml_lcd_mode = {
70f4c0bf	118	.id = CAML_LCD_MODE,
	119	.name = "caml lcd mode",
	120	.mask = 0x0F,
	121	};
	122
	123	/* devices */
6618c3ad	124	static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
70f4c0bf	125	{
	126	.ids = NAND_MODE \| NOR_MODE \| PHOTO_FRAME_MODE \|
	127	ATA_PABX_WI2S_MODE \| ATA_PABX_I2S_MODE,
	128	.mask = PMX_FIRDA_MASK,
	129	},
	130	};
	131
6618c3ad	132	struct pmx_dev spear300_pmx_fsmc_2_chips = {
70f4c0bf	133	.name = "fsmc_2_chips",
	134	.modes = pmx_fsmc_2_chips_modes,
	135	.mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
	136	.enb_on_reset = 1,
	137	};
	138
6618c3ad	139	static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
70f4c0bf	140	{
	141	.ids = NAND_MODE \| NOR_MODE \| PHOTO_FRAME_MODE \|
	142	ATA_PABX_WI2S_MODE \| ATA_PABX_I2S_MODE,
	143	.mask = PMX_FIRDA_MASK \| PMX_UART0_MASK,
	144	},
	145	};
	146
6618c3ad	147	struct pmx_dev spear300_pmx_fsmc_4_chips = {
70f4c0bf	148	.name = "fsmc_4_chips",
	149	.modes = pmx_fsmc_4_chips_modes,
	150	.mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
	151	.enb_on_reset = 1,
	152	};
	153
6618c3ad	154	static struct pmx_dev_mode pmx_keyboard_modes[] = {
70f4c0bf	155	{
	156	.ids = LEND_IP_PHONE_MODE \| HEND_IP_PHONE_MODE \|
	157	LEND_WIFI_PHONE_MODE \| HEND_WIFI_PHONE_MODE \|
	158	CAML_LCDW_MODE \| CAMU_LCD_MODE \| CAMU_WLCD_MODE \|
	159	CAML_LCD_MODE,
	160	.mask = 0x0,
	161	},
	162	};
	163
6618c3ad	164	struct pmx_dev spear300_pmx_keyboard = {
70f4c0bf	165	.name = "keyboard",
	166	.modes = pmx_keyboard_modes,
	167	.mode_count = ARRAY_SIZE(pmx_keyboard_modes),
	168	.enb_on_reset = 1,
	169	};
	170
6618c3ad	171	static struct pmx_dev_mode pmx_clcd_modes[] = {
70f4c0bf	172	{
	173	.ids = PHOTO_FRAME_MODE,
	174	.mask = PMX_TIMER_1_2_MASK \| PMX_TIMER_3_4_MASK ,
	175	}, {
	176	.ids = HEND_IP_PHONE_MODE \| HEND_WIFI_PHONE_MODE \|
	177	CAMU_LCD_MODE \| CAML_LCD_MODE,
	178	.mask = PMX_TIMER_3_4_MASK,
	179	},
	180	};
	181
6618c3ad	182	struct pmx_dev spear300_pmx_clcd = {
70f4c0bf	183	.name = "clcd",
	184	.modes = pmx_clcd_modes,
	185	.mode_count = ARRAY_SIZE(pmx_clcd_modes),
	186	.enb_on_reset = 1,
	187	};
	188
6618c3ad	189	static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
70f4c0bf	190	{
	191	.ids = PHOTO_FRAME_MODE \| CAMU_LCD_MODE \| CAML_LCD_MODE,
	192	.mask = PMX_MII_MASK,
	193	}, {
	194	.ids = LEND_IP_PHONE_MODE \| LEND_WIFI_PHONE_MODE,
	195	.mask = PMX_MII_MASK \| PMX_TIMER_1_2_MASK \| PMX_TIMER_3_4_MASK,
	196	}, {
	197	.ids = ATA_PABX_I2S_MODE \| CAML_LCDW_MODE \| CAMU_WLCD_MODE,
	198	.mask = PMX_MII_MASK \| PMX_TIMER_3_4_MASK,
	199	}, {
	200	.ids = HEND_IP_PHONE_MODE \| HEND_WIFI_PHONE_MODE,
	201	.mask = PMX_MII_MASK \| PMX_TIMER_1_2_MASK,
	202	}, {
	203	.ids = ATA_PABX_WI2S_MODE,
	204	.mask = PMX_MII_MASK \| PMX_TIMER_1_2_MASK \| PMX_TIMER_3_4_MASK
	205	\| PMX_UART0_MODEM_MASK,
	206	},
	207	};
	208
6618c3ad	209	struct pmx_dev spear300_pmx_telecom_gpio = {
70f4c0bf	210	.name = "telecom_gpio",
	211	.modes = pmx_telecom_gpio_modes,
	212	.mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
	213	.enb_on_reset = 1,
	214	};
	215
6618c3ad	216	static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
70f4c0bf	217	{
	218	.ids = PHOTO_FRAME_MODE \| LEND_IP_PHONE_MODE \|
	219	HEND_IP_PHONE_MODE \| LEND_WIFI_PHONE_MODE
	220	\| HEND_WIFI_PHONE_MODE \| ATA_PABX_WI2S_MODE
	221	\| ATA_PABX_I2S_MODE \| CAML_LCDW_MODE \| CAMU_LCD_MODE
	222	\| CAMU_WLCD_MODE \| CAML_LCD_MODE,
	223	.mask = PMX_UART0_MODEM_MASK \| PMX_SSP_CS_MASK,
	224	},
	225	};
	226
6618c3ad	227	struct pmx_dev spear300_pmx_telecom_tdm = {
70f4c0bf	228	.name = "telecom_tdm",
	229	.modes = pmx_telecom_tdm_modes,
	230	.mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
	231	.enb_on_reset = 1,
	232	};
	233
6618c3ad	234	static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
70f4c0bf	235	{
	236	.ids = LEND_IP_PHONE_MODE \| HEND_IP_PHONE_MODE \|
	237	LEND_WIFI_PHONE_MODE \| HEND_WIFI_PHONE_MODE
	238	\| ATA_PABX_WI2S_MODE \| ATA_PABX_I2S_MODE \|
	239	CAML_LCDW_MODE \| CAML_LCD_MODE,
	240	.mask = PMX_TIMER_1_2_MASK \| PMX_TIMER_3_4_MASK,
	241	},
	242	};
	243
6618c3ad	244	struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
70f4c0bf	245	.name = "telecom_spi_cs_i2c_clk",
	246	.modes = pmx_telecom_spi_cs_i2c_clk_modes,
	247	.mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
	248	.enb_on_reset = 1,
	249	};
	250
6618c3ad	251	static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
70f4c0bf	252	{
	253	.ids = CAML_LCDW_MODE \| CAML_LCD_MODE,
	254	.mask = PMX_MII_MASK,
	255	}, {
	256	.ids = CAMU_LCD_MODE \| CAMU_WLCD_MODE,
	257	.mask = PMX_TIMER_1_2_MASK \| PMX_TIMER_3_4_MASK \| PMX_MII_MASK,
	258	},
	259	};
	260
6618c3ad	261	struct pmx_dev spear300_pmx_telecom_camera = {
70f4c0bf	262	.name = "telecom_camera",
	263	.modes = pmx_telecom_camera_modes,
	264	.mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
	265	.enb_on_reset = 1,
	266	};
	267
6618c3ad	268	static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
70f4c0bf	269	{
	270	.ids = ATA_PABX_I2S_MODE \| CAML_LCDW_MODE \| CAMU_LCD_MODE
	271	\| CAMU_WLCD_MODE \| CAML_LCD_MODE,
	272	.mask = PMX_TIMER_1_2_MASK,
	273	},
	274	};
	275
6618c3ad	276	struct pmx_dev spear300_pmx_telecom_dac = {
70f4c0bf	277	.name = "telecom_dac",
	278	.modes = pmx_telecom_dac_modes,
	279	.mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
	280	.enb_on_reset = 1,
	281	};
	282
6618c3ad	283	static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
70f4c0bf	284	{
	285	.ids = LEND_IP_PHONE_MODE \| HEND_IP_PHONE_MODE
	286	\| LEND_WIFI_PHONE_MODE \| HEND_WIFI_PHONE_MODE \|
	287	ATA_PABX_I2S_MODE \| CAML_LCDW_MODE \| CAMU_LCD_MODE
	288	\| CAMU_WLCD_MODE \| CAML_LCD_MODE,
	289	.mask = PMX_UART0_MODEM_MASK,
	290	},
	291	};
	292
6618c3ad	293	struct pmx_dev spear300_pmx_telecom_i2s = {
70f4c0bf	294	.name = "telecom_i2s",
	295	.modes = pmx_telecom_i2s_modes,
	296	.mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
	297	.enb_on_reset = 1,
	298	};
	299
6618c3ad	300	static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
70f4c0bf	301	{
	302	.ids = NAND_MODE \| NOR_MODE,
	303	.mask = PMX_UART0_MODEM_MASK \| PMX_TIMER_1_2_MASK \|
	304	PMX_TIMER_3_4_MASK,
	305	},
	306	};
	307
6618c3ad	308	struct pmx_dev spear300_pmx_telecom_boot_pins = {
70f4c0bf	309	.name = "telecom_boot_pins",
	310	.modes = pmx_telecom_boot_pins_modes,
	311	.mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
	312	.enb_on_reset = 1,
	313	};
	314
6618c3ad	315	static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
70f4c0bf	316	{
	317	.ids = PHOTO_FRAME_MODE \| LEND_IP_PHONE_MODE \|
	318	HEND_IP_PHONE_MODE \| LEND_WIFI_PHONE_MODE \|
	319	HEND_WIFI_PHONE_MODE \| CAML_LCDW_MODE \| CAMU_LCD_MODE \|
	320	CAMU_WLCD_MODE \| CAML_LCD_MODE \| ATA_PABX_WI2S_MODE \|
	321	ATA_PABX_I2S_MODE,
	322	.mask = PMX_GPIO_PIN0_MASK \| PMX_GPIO_PIN1_MASK \|
	323	PMX_GPIO_PIN2_MASK \| PMX_GPIO_PIN3_MASK \|
	324	PMX_GPIO_PIN4_MASK \| PMX_GPIO_PIN5_MASK,
	325	},
	326	};
	327
6618c3ad	328	struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
069580b8	329	.name = "telecom_sdhci_4bit",
	330	.modes = pmx_telecom_sdhci_4bit_modes,
	331	.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
70f4c0bf	332	.enb_on_reset = 1,
	333	};
	334
6618c3ad	335	static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
70f4c0bf	336	{
	337	.ids = PHOTO_FRAME_MODE \| LEND_IP_PHONE_MODE \|
	338	HEND_IP_PHONE_MODE \| LEND_WIFI_PHONE_MODE \|
	339	HEND_WIFI_PHONE_MODE \| CAML_LCDW_MODE \| CAMU_LCD_MODE \|
	340	CAMU_WLCD_MODE \| CAML_LCD_MODE,
	341	.mask = PMX_GPIO_PIN0_MASK \| PMX_GPIO_PIN1_MASK \|
	342	PMX_GPIO_PIN2_MASK \| PMX_GPIO_PIN3_MASK \|
	343	PMX_GPIO_PIN4_MASK \| PMX_GPIO_PIN5_MASK \| PMX_MII_MASK,
	344	},
	345	};
	346
6618c3ad	347	struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
069580b8	348	.name = "telecom_sdhci_8bit",
	349	.modes = pmx_telecom_sdhci_8bit_modes,
	350	.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
70f4c0bf	351	.enb_on_reset = 1,
	352	};
	353
6618c3ad	354	static struct pmx_dev_mode pmx_gpio1_modes[] = {
70f4c0bf	355	{
	356	.ids = PHOTO_FRAME_MODE,
	357	.mask = PMX_UART0_MODEM_MASK \| PMX_TIMER_1_2_MASK \|
	358	PMX_TIMER_3_4_MASK,
	359	},
	360	};
	361
6618c3ad	362	struct pmx_dev spear300_pmx_gpio1 = {
70f4c0bf	363	.name = "arm gpio1",
	364	.modes = pmx_gpio1_modes,
	365	.mode_count = ARRAY_SIZE(pmx_gpio1_modes),
	366	.enb_on_reset = 1,
	367	};
	368
	369	/* pmx driver structure */
6618c3ad	370	static struct pmx_driver pmx_driver = {
70f4c0bf	371	.mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
	372	.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
	373	};
	374
4c18e77f	375	/* spear3xx shared irq */
f6558bf9	376	static struct shirq_dev_config shirq_ras1_config[] = {
4c18e77f	377	{
61e72bca RM	378	.virq = SPEAR300_VIRQ_IT_PERS_S,
	379	.enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
	380	.status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
4c18e77f	381	}, {
61e72bca RM	382	.virq = SPEAR300_VIRQ_IT_CHANGE_S,
	383	.enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
	384	.status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
4c18e77f	385	}, {
61e72bca RM	386	.virq = SPEAR300_VIRQ_I2S,
	387	.enb_mask = SPEAR300_I2S_IRQ_MASK,
	388	.status_mask = SPEAR300_I2S_IRQ_MASK,
4c18e77f	389	}, {
61e72bca RM	390	.virq = SPEAR300_VIRQ_TDM,
	391	.enb_mask = SPEAR300_TDM_IRQ_MASK,
	392	.status_mask = SPEAR300_TDM_IRQ_MASK,
4c18e77f	393	}, {
61e72bca RM	394	.virq = SPEAR300_VIRQ_CAMERA_L,
	395	.enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
	396	.status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
4c18e77f	397	}, {
61e72bca RM	398	.virq = SPEAR300_VIRQ_CAMERA_F,
	399	.enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
	400	.status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
4c18e77f	401	}, {
61e72bca RM	402	.virq = SPEAR300_VIRQ_CAMERA_V,
	403	.enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
	404	.status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
4c18e77f	405	}, {
61e72bca RM	406	.virq = SPEAR300_VIRQ_KEYBOARD,
	407	.enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
	408	.status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
4c18e77f	409	}, {
61e72bca RM	410	.virq = SPEAR300_VIRQ_GPIO1,
	411	.enb_mask = SPEAR300_GPIO1_IRQ_MASK,
	412	.status_mask = SPEAR300_GPIO1_IRQ_MASK,
4c18e77f	413	},
	414	};
	415
f6558bf9	416	static struct spear_shirq shirq_ras1 = {
61e72bca	417	.irq = SPEAR3XX_IRQ_GEN_RAS_1,
4c18e77f	418	.dev_config = shirq_ras1_config,
	419	.dev_count = ARRAY_SIZE(shirq_ras1_config),
	420	.regs = {
61e72bca RM	421	.enb_reg = SPEAR300_INT_ENB_MASK_REG,
	422	.status_reg = SPEAR300_INT_STS_MASK_REG,
	423	.status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
4c18e77f	424	.clear_reg = -1,
4c18e77f	425	},
bc4e814e	426	};
bc4e814e	427
c5fa4fdc VK	428	/* padmux devices to enable */
	429	static struct pmx_dev *spear300_evb_pmx_devs[] = {
	430	/* spear3xx specific devices */
	431	&spear3xx_pmx_i2c,
	432	&spear3xx_pmx_ssp_cs,
	433	&spear3xx_pmx_ssp,
	434	&spear3xx_pmx_mii,
	435	&spear3xx_pmx_uart0,
	436
	437	/* spear300 specific devices */
	438	&spear300_pmx_fsmc_2_chips,
	439	&spear300_pmx_clcd,
	440	&spear300_pmx_telecom_sdhci_4bit,
	441	&spear300_pmx_gpio1,
c2c07831	442	};
c2c07831	443
0b7ee717 VK	444	/* DMAC platform data's slave info */
	445	struct pl08x_channel_data spear300_dma_info[] = {
	446	{
	447	.bus_id = "uart0_rx",
	448	.min_signal = 2,
	449	.max_signal = 2,
	450	.muxval = 0,
	451	.cctl = 0,
	452	.periph_buses = PL08X_AHB1,
	453	}, {
	454	.bus_id = "uart0_tx",
	455	.min_signal = 3,
	456	.max_signal = 3,
	457	.muxval = 0,
	458	.cctl = 0,
	459	.periph_buses = PL08X_AHB1,
	460	}, {
	461	.bus_id = "ssp0_rx",
	462	.min_signal = 8,
	463	.max_signal = 8,
	464	.muxval = 0,
	465	.cctl = 0,
	466	.periph_buses = PL08X_AHB1,
	467	}, {
	468	.bus_id = "ssp0_tx",
	469	.min_signal = 9,
	470	.max_signal = 9,
	471	.muxval = 0,
	472	.cctl = 0,
	473	.periph_buses = PL08X_AHB1,
	474	}, {
	475	.bus_id = "i2c_rx",
	476	.min_signal = 10,
	477	.max_signal = 10,
	478	.muxval = 0,
	479	.cctl = 0,
	480	.periph_buses = PL08X_AHB1,
	481	}, {
	482	.bus_id = "i2c_tx",
	483	.min_signal = 11,
	484	.max_signal = 11,
	485	.muxval = 0,
	486	.cctl = 0,
	487	.periph_buses = PL08X_AHB1,
	488	}, {
	489	.bus_id = "irda",
	490	.min_signal = 12,
	491	.max_signal = 12,
	492	.muxval = 0,
	493	.cctl = 0,
	494	.periph_buses = PL08X_AHB1,
	495	}, {
	496	.bus_id = "adc",
	497	.min_signal = 13,
	498	.max_signal = 13,
	499	.muxval = 0,
	500	.cctl = 0,
	501	.periph_buses = PL08X_AHB1,
	502	}, {
	503	.bus_id = "to_jpeg",
	504	.min_signal = 14,
	505	.max_signal = 14,
	506	.muxval = 0,
	507	.cctl = 0,
508	.periph_buses = PL08X_AHB1,
509	}, {
510	.bus_id = "from_jpeg",
511	.min_signal = 15,
512	.max_signal = 15,
513	.muxval = 0,
514	.cctl = 0,
515	.periph_buses = PL08X_AHB1,
516	}, {
517	.bus_id = "ras0_rx",
518	.min_signal = 0,
519	.max_signal = 0,
520	.muxval = 1,
521	.cctl = 0,
522	.periph_buses = PL08X_AHB1,
523	}, {
524	.bus_id = "ras0_tx",
525	.min_signal = 1,
526	.max_signal = 1,
527	.muxval = 1,
528	.cctl = 0,
529	.periph_buses = PL08X_AHB1,
530	}, {
531	.bus_id = "ras1_rx",
532	.min_signal = 2,
533	.max_signal = 2,
534	.muxval = 1,
535	.cctl = 0,
536	.periph_buses = PL08X_AHB1,
537	}, {
538	.bus_id = "ras1_tx",
539	.min_signal = 3,
540	.max_signal = 3,
541	.muxval = 1,
542	.cctl = 0,
543	.periph_buses = PL08X_AHB1,
544	}, {
545	.bus_id = "ras2_rx",
546	.min_signal = 4,
547	.max_signal = 4,
548	.muxval = 1,
549	.cctl = 0,
550	.periph_buses = PL08X_AHB1,
551	}, {
552	.bus_id = "ras2_tx",
553	.min_signal = 5,
554	.max_signal = 5,
555	.muxval = 1,
556	.cctl = 0,
557	.periph_buses = PL08X_AHB1,
558	}, {
559	.bus_id = "ras3_rx",
560	.min_signal = 6,
561	.max_signal = 6,
562	.muxval = 1,
563	.cctl = 0,
564	.periph_buses = PL08X_AHB1,
565	}, {
566	.bus_id = "ras3_tx",
567	.min_signal = 7,
568	.max_signal = 7,
569	.muxval = 1,
570	.cctl = 0,
571	.periph_buses = PL08X_AHB1,
572	}, {
573	.bus_id = "ras4_rx",
574	.min_signal = 8,
575	.max_signal = 8,
576	.muxval = 1,
577	.cctl = 0,
578	.periph_buses = PL08X_AHB1,
579	}, {
580	.bus_id = "ras4_tx",
581	.min_signal = 9,
582	.max_signal = 9,
583	.muxval = 1,
584	.cctl = 0,
585	.periph_buses = PL08X_AHB1,
586	}, {
587	.bus_id = "ras5_rx",
588	.min_signal = 10,
589	.max_signal = 10,
590	.muxval = 1,
591	.cctl = 0,
592	.periph_buses = PL08X_AHB1,
593	}, {
594	.bus_id = "ras5_tx",
595	.min_signal = 11,
596	.max_signal = 11,
597	.muxval = 1,
598	.cctl = 0,
599	.periph_buses = PL08X_AHB1,
600	}, {
601	.bus_id = "ras6_rx",
602	.min_signal = 12,
603	.max_signal = 12,
604	.muxval = 1,
605	.cctl = 0,
606	.periph_buses = PL08X_AHB1,
607	}, {
608	.bus_id = "ras6_tx",
609	.min_signal = 13,
610	.max_signal = 13,
611	.muxval = 1,
612	.cctl = 0,
613	.periph_buses = PL08X_AHB1,
614	}, {
615	.bus_id = "ras7_rx",
616	.min_signal = 14,
617	.max_signal = 14,
618	.muxval = 1,
619	.cctl = 0,
620	.periph_buses = PL08X_AHB1,
621	}, {
622	.bus_id = "ras7_tx",
623	.min_signal = 15,
624	.max_signal = 15,
625	.muxval = 1,
626	.cctl = 0,
627	.periph_buses = PL08X_AHB1,
628	},
629	};
630
c5fa4fdc VK	631	/* Add SPEAr300 auxdata to pass platform data */
	632	static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
	633	OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
	634	&pl022_plat_data),
0b7ee717 VK	635	OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
0b7ee717 VK	636	&pl080_plat_data),
c5fa4fdc VK	637	{}
c5fa4fdc VK	638	};
c2c07831	639
c5fa4fdc	640	static void __init spear300_dt_init(void)
bc4e814e	641	{
c5fa4fdc	642	int ret = -EINVAL;
4c18e77f	643
0b7ee717 VK	644	pl080_plat_data.slave_channels = spear300_dma_info;
	645	pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
	646
c5fa4fdc VK	647	of_platform_populate(NULL, of_default_bus_match_table,
c5fa4fdc VK	648	spear300_auxdata_lookup, NULL);
4c18e77f	649
b595076a	650	/* shared irq registration */
53821162	651	shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
4c18e77f	652	if (shirq_ras1.regs.base) {
	653	ret = spear_shirq_register(&shirq_ras1);
	654	if (ret)
5fb00f96	655	pr_err("Error registering Shared IRQ\n");
4c18e77f	656	}
70f4c0bf	657
c5fa4fdc VK	658	if (of_machine_is_compatible("st,spear300-evb")) {
	659	/* pmx initialization */
	660	pmx_driver.mode = &spear300_photo_frame_mode;
	661	pmx_driver.devs = spear300_evb_pmx_devs;
	662	pmx_driver.devs_count = ARRAY_SIZE(spear300_evb_pmx_devs);
	663
	664	pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
	665	if (pmx_driver.base) {
	666	ret = pmx_register(&pmx_driver);
	667	if (ret)
	668	pr_err("padmux: registration failed. err no: %d\n",
	669	ret);
	670	/* Free Mapping, device selection already done */
	671	iounmap(pmx_driver.base);
	672	}
6618c3ad	673
53688c51	674	if (ret)
c5fa4fdc	675	pr_err("Initialization Failed");
53688c51	676	}
70f4c0bf	677	}
c5fa4fdc VK	678
	679	static const char * const spear300_dt_board_compat[] = {
	680	"st,spear300",
	681	"st,spear300-evb",
	682	NULL,
	683	};
	684
	685	static void __init spear300_map_io(void)
	686	{
	687	spear3xx_map_io();
	688	spear300_clk_init();
	689	}
	690
	691	DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
	692	.map_io = spear300_map_io,
	693	.init_irq = spear3xx_dt_init_irq,
	694	.handle_irq = vic_handle_irq,
	695	.timer = &spear3xx_timer,
	696	.init_machine = spear300_dt_init,
	697	.restart = spear_restart,
	698	.dt_compat = spear300_dt_board_compat,
	699	MACHINE_END