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42a7bf4d CC |
1 | /* |
2 | * arch/arm/mach-tegra/board-harmony.c | |
3 | * | |
4 | * Copyright (C) 2010 Google, Inc. | |
ef2b1a0f | 5 | * Copyright (C) 2011 NVIDIA, Inc. |
42a7bf4d CC |
6 | * |
7 | * This software is licensed under the terms of the GNU General Public | |
8 | * License version 2, as published by the Free Software Foundation, and | |
9 | * may be copied, distributed, and modified under those terms. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/serial_8250.h> | |
22 | #include <linux/clk.h> | |
23 | #include <linux/dma-mapping.h> | |
24 | #include <linux/pda_power.h> | |
25 | #include <linux/io.h> | |
ef2b1a0f | 26 | #include <linux/gpio.h> |
de4855d9 OJ |
27 | #include <linux/i2c.h> |
28 | #include <linux/i2c-tegra.h> | |
42a7bf4d | 29 | |
fba3b2fc SW |
30 | #include <sound/wm8903.h> |
31 | ||
42a7bf4d CC |
32 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | |
34 | #include <asm/mach/time.h> | |
35 | #include <asm/setup.h> | |
36 | ||
ef2b1a0f | 37 | #include <mach/harmony_audio.h> |
42a7bf4d CC |
38 | #include <mach/iomap.h> |
39 | #include <mach/irqs.h> | |
875d4af6 | 40 | #include <mach/sdhci.h> |
42a7bf4d CC |
41 | |
42 | #include "board.h" | |
43 | #include "board-harmony.h" | |
44 | #include "clock.h" | |
875d4af6 OJ |
45 | #include "devices.h" |
46 | #include "gpio-names.h" | |
42a7bf4d | 47 | |
42a7bf4d CC |
48 | static struct plat_serial8250_port debug_uart_platform_data[] = { |
49 | { | |
50 | .membase = IO_ADDRESS(TEGRA_UARTD_BASE), | |
51 | .mapbase = TEGRA_UARTD_BASE, | |
52 | .irq = INT_UARTD, | |
53 | .flags = UPF_BOOT_AUTOCONF, | |
54 | .iotype = UPIO_MEM, | |
55 | .regshift = 2, | |
56 | .uartclk = 216000000, | |
57 | }, { | |
58 | .flags = 0 | |
59 | } | |
60 | }; | |
61 | ||
62 | static struct platform_device debug_uart = { | |
63 | .name = "serial8250", | |
64 | .id = PLAT8250_DEV_PLATFORM, | |
65 | .dev = { | |
66 | .platform_data = debug_uart_platform_data, | |
67 | }, | |
68 | }; | |
69 | ||
ef2b1a0f SW |
70 | static struct harmony_audio_platform_data harmony_audio_pdata = { |
71 | .gpio_spkr_en = TEGRA_GPIO_SPKR_EN, | |
72 | .gpio_hp_det = TEGRA_GPIO_HP_DET, | |
73 | .gpio_int_mic_en = TEGRA_GPIO_INT_MIC_EN, | |
74 | .gpio_ext_mic_en = TEGRA_GPIO_EXT_MIC_EN, | |
75 | }; | |
76 | ||
77 | static struct platform_device harmony_audio_device = { | |
78 | .name = "tegra-snd-harmony", | |
79 | .id = 0, | |
80 | .dev = { | |
81 | .platform_data = &harmony_audio_pdata, | |
82 | }, | |
83 | }; | |
84 | ||
de4855d9 OJ |
85 | static struct tegra_i2c_platform_data harmony_i2c1_platform_data = { |
86 | .bus_clk_rate = 400000, | |
87 | }; | |
88 | ||
89 | static struct tegra_i2c_platform_data harmony_i2c2_platform_data = { | |
90 | .bus_clk_rate = 400000, | |
91 | }; | |
92 | ||
93 | static struct tegra_i2c_platform_data harmony_i2c3_platform_data = { | |
94 | .bus_clk_rate = 400000, | |
95 | }; | |
96 | ||
97 | static struct tegra_i2c_platform_data harmony_dvc_platform_data = { | |
98 | .bus_clk_rate = 400000, | |
99 | }; | |
100 | ||
fba3b2fc SW |
101 | static struct wm8903_platform_data harmony_wm8903_pdata = { |
102 | .irq_active_low = 0, | |
103 | .micdet_cfg = 0, | |
104 | .micdet_delay = 100, | |
06fc9a30 | 105 | .gpio_base = HARMONY_GPIO_WM8903(0), |
fba3b2fc SW |
106 | .gpio_cfg = { |
107 | WM8903_GPIO_NO_CONFIG, | |
108 | WM8903_GPIO_NO_CONFIG, | |
109 | 0, | |
110 | WM8903_GPIO_NO_CONFIG, | |
111 | WM8903_GPIO_NO_CONFIG, | |
112 | }, | |
113 | }; | |
114 | ||
115 | static struct i2c_board_info __initdata wm8903_board_info = { | |
116 | I2C_BOARD_INFO("wm8903", 0x1a), | |
117 | .platform_data = &harmony_wm8903_pdata, | |
118 | .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ), | |
119 | }; | |
120 | ||
de4855d9 OJ |
121 | static void __init harmony_i2c_init(void) |
122 | { | |
123 | tegra_i2c_device1.dev.platform_data = &harmony_i2c1_platform_data; | |
124 | tegra_i2c_device2.dev.platform_data = &harmony_i2c2_platform_data; | |
125 | tegra_i2c_device3.dev.platform_data = &harmony_i2c3_platform_data; | |
126 | tegra_i2c_device4.dev.platform_data = &harmony_dvc_platform_data; | |
127 | ||
128 | platform_device_register(&tegra_i2c_device1); | |
129 | platform_device_register(&tegra_i2c_device2); | |
130 | platform_device_register(&tegra_i2c_device3); | |
131 | platform_device_register(&tegra_i2c_device4); | |
fba3b2fc SW |
132 | |
133 | i2c_register_board_info(0, &wm8903_board_info, 1); | |
de4855d9 OJ |
134 | } |
135 | ||
42a7bf4d CC |
136 | static struct platform_device *harmony_devices[] __initdata = { |
137 | &debug_uart, | |
875d4af6 OJ |
138 | &tegra_sdhci_device1, |
139 | &tegra_sdhci_device2, | |
140 | &tegra_sdhci_device4, | |
ef2b1a0f SW |
141 | &tegra_i2s_device1, |
142 | &tegra_das_device, | |
143 | &tegra_pcm_device, | |
144 | &harmony_audio_device, | |
42a7bf4d CC |
145 | }; |
146 | ||
147 | static void __init tegra_harmony_fixup(struct machine_desc *desc, | |
148 | struct tag *tags, char **cmdline, struct meminfo *mi) | |
149 | { | |
150 | mi->nr_banks = 2; | |
151 | mi->bank[0].start = PHYS_OFFSET; | |
42a7bf4d CC |
152 | mi->bank[0].size = 448 * SZ_1M; |
153 | mi->bank[1].start = SZ_512M; | |
42a7bf4d CC |
154 | mi->bank[1].size = SZ_512M; |
155 | } | |
156 | ||
157 | static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = { | |
158 | /* name parent rate enabled */ | |
159 | { "uartd", "pll_p", 216000000, true }, | |
ef2b1a0f SW |
160 | { "pll_a", "pll_p_out1", 56448000, true }, |
161 | { "pll_a_out0", "pll_a", 11289600, true }, | |
162 | { "cdev1", NULL, 0, true }, | |
163 | { "i2s1", "pll_a_out0", 11289600, false}, | |
42a7bf4d CC |
164 | { NULL, NULL, 0, 0}, |
165 | }; | |
166 | ||
875d4af6 OJ |
167 | |
168 | static struct tegra_sdhci_platform_data sdhci_pdata1 = { | |
169 | .cd_gpio = -1, | |
170 | .wp_gpio = -1, | |
171 | .power_gpio = -1, | |
172 | }; | |
173 | ||
174 | static struct tegra_sdhci_platform_data sdhci_pdata2 = { | |
986afbe4 SW |
175 | .cd_gpio = TEGRA_GPIO_SD2_CD, |
176 | .wp_gpio = TEGRA_GPIO_SD2_WP, | |
177 | .power_gpio = TEGRA_GPIO_SD2_POWER, | |
875d4af6 OJ |
178 | }; |
179 | ||
180 | static struct tegra_sdhci_platform_data sdhci_pdata4 = { | |
986afbe4 SW |
181 | .cd_gpio = TEGRA_GPIO_SD4_CD, |
182 | .wp_gpio = TEGRA_GPIO_SD4_WP, | |
183 | .power_gpio = TEGRA_GPIO_SD4_POWER, | |
875d4af6 OJ |
184 | .is_8bit = 1, |
185 | }; | |
186 | ||
42a7bf4d CC |
187 | static void __init tegra_harmony_init(void) |
188 | { | |
42a7bf4d CC |
189 | tegra_clk_init_from_table(harmony_clk_init_table); |
190 | ||
191 | harmony_pinmux_init(); | |
192 | ||
875d4af6 OJ |
193 | tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; |
194 | tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2; | |
195 | tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; | |
196 | ||
42a7bf4d | 197 | platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices)); |
de4855d9 | 198 | harmony_i2c_init(); |
6f168f2f | 199 | harmony_regulator_init(); |
42a7bf4d CC |
200 | } |
201 | ||
202 | MACHINE_START(HARMONY, "harmony") | |
203 | .boot_params = 0x00000100, | |
42a7bf4d | 204 | .fixup = tegra_harmony_fixup, |
42a7bf4d | 205 | .map_io = tegra_map_common_io, |
0cf6230a CC |
206 | .init_early = tegra_init_early, |
207 | .init_irq = tegra_init_irq, | |
42a7bf4d | 208 | .timer = &tegra_timer, |
0cf6230a | 209 | .init_machine = tegra_harmony_init, |
42a7bf4d | 210 | MACHINE_END |