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d9a51fe7 OJ |
1 | /* |
2 | * Copyright (c) 2010, 2011 NVIDIA Corporation. | |
3 | * Copyright (C) 2010, 2011 Google, Inc. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | */ | |
16 | ||
17 | #include <linux/kernel.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/serial_8250.h> | |
f9a795af | 21 | #include <linux/i2c.h> |
d9a51fe7 OJ |
22 | #include <linux/delay.h> |
23 | #include <linux/input.h> | |
24 | #include <linux/io.h> | |
f9a795af | 25 | #include <linux/gpio.h> |
d9a51fe7 OJ |
26 | #include <linux/gpio_keys.h> |
27 | ||
28 | #include <mach/iomap.h> | |
29 | #include <mach/irqs.h> | |
30 | #include <mach/sdhci.h> | |
31 | ||
32 | #include <asm/mach-types.h> | |
33 | #include <asm/mach/arch.h> | |
34 | ||
35 | #include "board.h" | |
36 | #include "board-seaboard.h" | |
37 | #include "clock.h" | |
38 | #include "devices.h" | |
39 | #include "gpio-names.h" | |
40 | ||
41 | static struct plat_serial8250_port debug_uart_platform_data[] = { | |
42 | { | |
43 | /* Memory and IRQ filled in before registration */ | |
44 | .flags = UPF_BOOT_AUTOCONF, | |
45 | .iotype = UPIO_MEM, | |
46 | .regshift = 2, | |
47 | .uartclk = 216000000, | |
48 | }, { | |
49 | .flags = 0, | |
50 | } | |
51 | }; | |
52 | ||
53 | static struct platform_device debug_uart = { | |
54 | .name = "serial8250", | |
55 | .id = PLAT8250_DEV_PLATFORM, | |
56 | .dev = { | |
57 | .platform_data = debug_uart_platform_data, | |
58 | }, | |
59 | }; | |
60 | ||
61 | static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = { | |
62 | /* name parent rate enabled */ | |
63 | { "uartb", "pll_p", 216000000, true}, | |
64 | { "uartd", "pll_p", 216000000, true}, | |
65 | { NULL, NULL, 0, 0}, | |
66 | }; | |
67 | ||
68 | static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { | |
69 | { | |
70 | .code = SW_LID, | |
71 | .gpio = TEGRA_GPIO_LIDSWITCH, | |
72 | .active_low = 0, | |
73 | .desc = "Lid", | |
74 | .type = EV_SW, | |
75 | .wakeup = 1, | |
76 | .debounce_interval = 1, | |
77 | }, | |
78 | { | |
79 | .code = KEY_POWER, | |
80 | .gpio = TEGRA_GPIO_POWERKEY, | |
81 | .active_low = 1, | |
82 | .desc = "Power", | |
83 | .type = EV_KEY, | |
84 | .wakeup = 1, | |
85 | }, | |
86 | }; | |
87 | ||
88 | static struct gpio_keys_platform_data seaboard_gpio_keys = { | |
89 | .buttons = seaboard_gpio_keys_buttons, | |
90 | .nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons), | |
91 | }; | |
92 | ||
93 | static struct platform_device seaboard_gpio_keys_device = { | |
94 | .name = "gpio-keys", | |
95 | .id = -1, | |
96 | .dev = { | |
97 | .platform_data = &seaboard_gpio_keys, | |
98 | } | |
99 | }; | |
100 | ||
101 | static struct tegra_sdhci_platform_data sdhci_pdata1 = { | |
102 | .cd_gpio = -1, | |
103 | .wp_gpio = -1, | |
104 | .power_gpio = -1, | |
105 | }; | |
106 | ||
107 | static struct tegra_sdhci_platform_data sdhci_pdata3 = { | |
986afbe4 SW |
108 | .cd_gpio = TEGRA_GPIO_SD2_CD, |
109 | .wp_gpio = TEGRA_GPIO_SD2_WP, | |
110 | .power_gpio = TEGRA_GPIO_SD2_POWER, | |
d9a51fe7 OJ |
111 | }; |
112 | ||
113 | static struct tegra_sdhci_platform_data sdhci_pdata4 = { | |
114 | .cd_gpio = -1, | |
115 | .wp_gpio = -1, | |
116 | .power_gpio = -1, | |
117 | .is_8bit = 1, | |
118 | }; | |
119 | ||
120 | static struct platform_device *seaboard_devices[] __initdata = { | |
121 | &debug_uart, | |
122 | &tegra_pmu_device, | |
d9a51fe7 | 123 | &tegra_sdhci_device4, |
cfeb34ed SW |
124 | &tegra_sdhci_device3, |
125 | &tegra_sdhci_device1, | |
d9a51fe7 OJ |
126 | &seaboard_gpio_keys_device, |
127 | }; | |
128 | ||
f9a795af OJ |
129 | static struct i2c_board_info __initdata isl29018_device = { |
130 | I2C_BOARD_INFO("isl29018", 0x44), | |
131 | .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ), | |
132 | }; | |
133 | ||
134 | static struct i2c_board_info __initdata adt7461_device = { | |
135 | I2C_BOARD_INFO("adt7461", 0x4c), | |
136 | }; | |
137 | ||
138 | static void __init seaboard_i2c_init(void) | |
139 | { | |
140 | gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018"); | |
141 | gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ); | |
142 | ||
143 | i2c_register_board_info(0, &isl29018_device, 1); | |
144 | ||
29e9c68a | 145 | i2c_register_board_info(3, &adt7461_device, 1); |
f9a795af | 146 | |
f9a795af OJ |
147 | platform_device_register(&tegra_i2c_device1); |
148 | platform_device_register(&tegra_i2c_device2); | |
149 | platform_device_register(&tegra_i2c_device3); | |
150 | platform_device_register(&tegra_i2c_device4); | |
151 | } | |
152 | ||
153 | static void __init seaboard_common_init(void) | |
d9a51fe7 OJ |
154 | { |
155 | seaboard_pinmux_init(); | |
156 | ||
157 | tegra_clk_init_from_table(seaboard_clk_init_table); | |
158 | ||
159 | tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; | |
160 | tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3; | |
161 | tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; | |
162 | ||
163 | platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices)); | |
164 | } | |
165 | ||
166 | static void __init tegra_seaboard_init(void) | |
167 | { | |
168 | /* Seaboard uses UARTD for the debug port. */ | |
169 | debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE); | |
170 | debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE; | |
171 | debug_uart_platform_data[0].irq = INT_UARTD; | |
172 | ||
f9a795af OJ |
173 | seaboard_common_init(); |
174 | ||
175 | seaboard_i2c_init(); | |
d9a51fe7 OJ |
176 | } |
177 | ||
178 | static void __init tegra_kaen_init(void) | |
179 | { | |
180 | /* Kaen uses UARTB for the debug port. */ | |
181 | debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE); | |
182 | debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; | |
183 | debug_uart_platform_data[0].irq = INT_UARTB; | |
184 | ||
f9a795af OJ |
185 | seaboard_common_init(); |
186 | ||
187 | seaboard_i2c_init(); | |
d9a51fe7 OJ |
188 | } |
189 | ||
190 | static void __init tegra_wario_init(void) | |
191 | { | |
192 | /* Wario uses UARTB for the debug port. */ | |
193 | debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE); | |
194 | debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; | |
195 | debug_uart_platform_data[0].irq = INT_UARTB; | |
196 | ||
f9a795af OJ |
197 | seaboard_common_init(); |
198 | ||
199 | seaboard_i2c_init(); | |
d9a51fe7 OJ |
200 | } |
201 | ||
202 | ||
203 | MACHINE_START(SEABOARD, "seaboard") | |
204 | .boot_params = 0x00000100, | |
205 | .map_io = tegra_map_common_io, | |
206 | .init_early = tegra_init_early, | |
207 | .init_irq = tegra_init_irq, | |
208 | .timer = &tegra_timer, | |
209 | .init_machine = tegra_seaboard_init, | |
210 | MACHINE_END | |
211 | ||
212 | MACHINE_START(KAEN, "kaen") | |
213 | .boot_params = 0x00000100, | |
214 | .map_io = tegra_map_common_io, | |
215 | .init_early = tegra_init_early, | |
216 | .init_irq = tegra_init_irq, | |
217 | .timer = &tegra_timer, | |
218 | .init_machine = tegra_kaen_init, | |
219 | MACHINE_END | |
220 | ||
221 | MACHINE_START(WARIO, "wario") | |
222 | .boot_params = 0x00000100, | |
223 | .map_io = tegra_map_common_io, | |
224 | .init_early = tegra_init_early, | |
225 | .init_irq = tegra_init_irq, | |
226 | .timer = &tegra_timer, | |
227 | .init_machine = tegra_wario_init, | |
228 | MACHINE_END |