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22b8b85d PDS |
1 | /* |
2 | * arch/arm/mach-tegra/cpuidle.c | |
3 | * | |
4 | * CPU idle driver for Tegra CPUs | |
5 | * | |
6 | * Copyright (c) 2010-2012, NVIDIA Corporation. | |
7 | * Copyright (c) 2011 Google, Inc. | |
8 | * Author: Colin Cross <ccross@android.com> | |
9 | * Gary King <gking@nvidia.com> | |
10 | * | |
11 | * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com> | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2 of the License, or | |
16 | * (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
19 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
20 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
21 | * more details. | |
22 | */ | |
23 | ||
24 | #include <linux/kernel.h> | |
25 | #include <linux/module.h> | |
22b8b85d | 26 | |
304664ea TR |
27 | #include <soc/tegra/fuse.h> |
28 | ||
0b25e25b | 29 | #include "cpuidle.h" |
22b8b85d | 30 | |
e22dc2b2 | 31 | void __init tegra_cpuidle_init(void) |
22b8b85d | 32 | { |
304664ea | 33 | switch (tegra_get_chip_id()) { |
0b25e25b | 34 | case TEGRA20: |
b046a65f JL |
35 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) |
36 | tegra20_cpuidle_init(); | |
0b25e25b JL |
37 | break; |
38 | case TEGRA30: | |
b046a65f JL |
39 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) |
40 | tegra30_cpuidle_init(); | |
0b25e25b | 41 | break; |
51dc5259 | 42 | case TEGRA114: |
24036fdc JL |
43 | case TEGRA124: |
44 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || | |
45 | IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) | |
b046a65f | 46 | tegra114_cpuidle_init(); |
0b25e25b | 47 | break; |
22b8b85d | 48 | } |
22b8b85d | 49 | } |
b4f17375 SW |
50 | |
51 | void tegra_cpuidle_pcie_irqs_in_use(void) | |
52 | { | |
304664ea | 53 | switch (tegra_get_chip_id()) { |
b4f17375 SW |
54 | case TEGRA20: |
55 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) | |
56 | tegra20_cpuidle_pcie_irqs_in_use(); | |
57 | break; | |
58 | } | |
59 | } |