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aa44ef4d SK |
1 | /* |
2 | * Copyright (C) 2008-2009 ST-Ericsson | |
3 | * | |
4 | * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2, as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/io.h> | |
b8410a15 | 16 | #include <linux/i2c.h> |
ea05a57f | 17 | #include <linux/gpio.h> |
aa44ef4d SK |
18 | #include <linux/amba/bus.h> |
19 | #include <linux/amba/pl022.h> | |
5d7b8467 | 20 | #include <linux/amba/serial.h> |
aa44ef4d | 21 | #include <linux/spi/spi.h> |
ee66e653 | 22 | #include <linux/mfd/abx500/ab8500.h> |
79568b94 | 23 | #include <linux/regulator/ab8500.h> |
20406ebf | 24 | #include <linux/mfd/tc3589x.h> |
fe67dfc8 | 25 | #include <linux/mfd/tps6105x.h> |
ee66e653 | 26 | #include <linux/mfd/abx500/ab8500-gpio.h> |
dd7b2a05 | 27 | #include <linux/leds-lp5521.h> |
a71b819b | 28 | #include <linux/input.h> |
350abe03 | 29 | #include <linux/smsc911x.h> |
a71b819b | 30 | #include <linux/gpio_keys.h> |
1a7d4369 | 31 | #include <linux/delay.h> |
aa44ef4d | 32 | |
350abe03 | 33 | #include <linux/leds.h> |
aa44ef4d SK |
34 | #include <asm/mach-types.h> |
35 | #include <asm/mach/arch.h> | |
bbf5f385 | 36 | #include <asm/hardware/gic.h> |
aa44ef4d | 37 | |
d48a41c1 | 38 | #include <plat/i2c.h> |
5d7b8467 | 39 | #include <plat/ste_dma40.h> |
1a7d4369 | 40 | #include <plat/pincfg.h> |
0f332861 | 41 | #include <plat/gpio-nomadik.h> |
aa44ef4d SK |
42 | |
43 | #include <mach/hardware.h> | |
44 | #include <mach/setup.h> | |
9e4e7fe1 | 45 | #include <mach/devices.h> |
29aeb3cf | 46 | #include <mach/irqs.h> |
aa44ef4d | 47 | |
1a7d4369 | 48 | #include "pins-db8500.h" |
5d7b8467 | 49 | #include "ste-dma40-db8500.h" |
fbf1eadf | 50 | #include "devices-db8500.h" |
008f8a2f | 51 | #include "board-mop500.h" |
a1e516e3 | 52 | #include "board-mop500-regulators.h" |
ea05a57f | 53 | |
350abe03 RM |
54 | static struct gpio_led snowball_led_array[] = { |
55 | { | |
56 | .name = "user_led", | |
57 | .default_trigger = "none", | |
58 | .gpio = 142, | |
59 | }, | |
60 | }; | |
61 | ||
62 | static struct gpio_led_platform_data snowball_led_data = { | |
63 | .leds = snowball_led_array, | |
64 | .num_leds = ARRAY_SIZE(snowball_led_array), | |
65 | }; | |
66 | ||
67 | static struct platform_device snowball_led_dev = { | |
68 | .name = "leds-gpio", | |
69 | .dev = { | |
70 | .platform_data = &snowball_led_data, | |
71 | }, | |
72 | }; | |
73 | ||
3ef374a2 BB |
74 | static struct ab8500_gpio_platform_data ab8500_gpio_pdata = { |
75 | .gpio_base = MOP500_AB8500_GPIO(0), | |
76 | .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE, | |
77 | /* config_reg is the initial configuration of ab8500 pins. | |
78 | * The pins can be configured as GPIO or alt functions based | |
79 | * on value present in GpioSel1 to GpioSel6 and AlternatFunction | |
80 | * register. This is the array of 7 configuration settings. | |
81 | * One has to compile time decide these settings. Below is the | |
25985edc | 82 | * explanation of these setting |
3ef374a2 BB |
83 | * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO |
84 | * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO | |
85 | * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO | |
86 | * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO | |
87 | * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO | |
88 | * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO | |
89 | * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured | |
90 | * as GPIO then this register selectes the alternate fucntions | |
91 | */ | |
92 | .config_reg = {0x00, 0x1E, 0x80, 0x01, | |
93 | 0x7A, 0x00, 0x00}, | |
94 | }; | |
95 | ||
350abe03 RM |
96 | static struct gpio_keys_button snowball_key_array[] = { |
97 | { | |
98 | .gpio = 32, | |
99 | .type = EV_KEY, | |
100 | .code = KEY_1, | |
101 | .desc = "userpb", | |
102 | .active_low = 1, | |
103 | .debounce_interval = 50, | |
104 | .wakeup = 1, | |
105 | }, | |
106 | { | |
107 | .gpio = 151, | |
108 | .type = EV_KEY, | |
109 | .code = KEY_2, | |
110 | .desc = "extkb1", | |
111 | .active_low = 1, | |
112 | .debounce_interval = 50, | |
113 | .wakeup = 1, | |
114 | }, | |
115 | { | |
116 | .gpio = 152, | |
117 | .type = EV_KEY, | |
118 | .code = KEY_3, | |
119 | .desc = "extkb2", | |
120 | .active_low = 1, | |
121 | .debounce_interval = 50, | |
122 | .wakeup = 1, | |
123 | }, | |
124 | { | |
125 | .gpio = 161, | |
126 | .type = EV_KEY, | |
127 | .code = KEY_4, | |
128 | .desc = "extkb3", | |
129 | .active_low = 1, | |
130 | .debounce_interval = 50, | |
131 | .wakeup = 1, | |
132 | }, | |
133 | { | |
134 | .gpio = 162, | |
135 | .type = EV_KEY, | |
136 | .code = KEY_5, | |
137 | .desc = "extkb4", | |
138 | .active_low = 1, | |
139 | .debounce_interval = 50, | |
140 | .wakeup = 1, | |
141 | }, | |
142 | }; | |
143 | ||
144 | static struct gpio_keys_platform_data snowball_key_data = { | |
145 | .buttons = snowball_key_array, | |
146 | .nbuttons = ARRAY_SIZE(snowball_key_array), | |
147 | }; | |
148 | ||
149 | static struct platform_device snowball_key_dev = { | |
150 | .name = "gpio-keys", | |
151 | .id = -1, | |
152 | .dev = { | |
153 | .platform_data = &snowball_key_data, | |
154 | } | |
155 | }; | |
156 | ||
157 | static struct smsc911x_platform_config snowball_sbnet_cfg = { | |
158 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | |
159 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
160 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | |
161 | .shift = 1, | |
162 | }; | |
163 | ||
164 | static struct resource sbnet_res[] = { | |
165 | { | |
166 | .name = "smsc911x-memory", | |
167 | .start = (0x5000 << 16), | |
168 | .end = (0x5000 << 16) + 0xffff, | |
169 | .flags = IORESOURCE_MEM, | |
170 | }, | |
171 | { | |
172 | .start = NOMADIK_GPIO_TO_IRQ(140), | |
173 | .end = NOMADIK_GPIO_TO_IRQ(140), | |
174 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
175 | }, | |
176 | }; | |
177 | ||
178 | static struct platform_device snowball_sbnet_dev = { | |
179 | .name = "smsc911x", | |
180 | .num_resources = ARRAY_SIZE(sbnet_res), | |
181 | .resource = sbnet_res, | |
182 | .dev = { | |
183 | .platform_data = &snowball_sbnet_cfg, | |
184 | }, | |
185 | }; | |
186 | ||
39ae702c RV |
187 | static struct ab8500_platform_data ab8500_platdata = { |
188 | .irq_base = MOP500_AB8500_IRQ_BASE, | |
dfa3a824 BJ |
189 | .regulator_reg_init = ab8500_regulator_reg_init, |
190 | .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init), | |
a1e516e3 BJ |
191 | .regulator = ab8500_regulators, |
192 | .num_regulator = ARRAY_SIZE(ab8500_regulators), | |
3ef374a2 | 193 | .gpio = &ab8500_gpio_pdata, |
39ae702c RV |
194 | }; |
195 | ||
29aeb3cf LW |
196 | static struct resource ab8500_resources[] = { |
197 | [0] = { | |
22039b7c RV |
198 | .start = IRQ_DB8500_AB8500, |
199 | .end = IRQ_DB8500_AB8500, | |
200 | .flags = IORESOURCE_IRQ | |
29aeb3cf LW |
201 | } |
202 | }; | |
203 | ||
204 | struct platform_device ab8500_device = { | |
205 | .name = "ab8500-i2c", | |
206 | .id = 0, | |
207 | .dev = { | |
208 | .platform_data = &ab8500_platdata, | |
209 | }, | |
210 | .num_resources = 1, | |
211 | .resource = ab8500_resources, | |
212 | }; | |
213 | ||
fe67dfc8 LW |
214 | /* |
215 | * TPS61052 | |
216 | */ | |
217 | ||
218 | static struct tps6105x_platform_data mop500_tps61052_data = { | |
219 | .mode = TPS6105X_MODE_VOLTAGE, | |
220 | .regulator_data = &tps61052_regulator, | |
221 | }; | |
222 | ||
b8410a15 RV |
223 | /* |
224 | * TC35892 | |
225 | */ | |
226 | ||
20406ebf | 227 | static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base) |
b8410a15 | 228 | { |
18403424 LJ |
229 | struct device *parent = NULL; |
230 | #if 0 | |
231 | /* FIXME: Is the sdi actually part of tc3589x? */ | |
232 | parent = tc3589x->dev; | |
233 | #endif | |
234 | mop500_sdi_tc35892_init(parent); | |
b8410a15 RV |
235 | } |
236 | ||
20406ebf | 237 | static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = { |
b8410a15 RV |
238 | .gpio_base = MOP500_EGPIO(0), |
239 | .setup = mop500_tc35892_init, | |
240 | }; | |
241 | ||
20406ebf | 242 | static struct tc3589x_platform_data mop500_tc35892_data = { |
611b7590 | 243 | .block = TC3589x_BLOCK_GPIO, |
b8410a15 RV |
244 | .gpio = &mop500_tc35892_gpio_data, |
245 | .irq_base = MOP500_EGPIO_IRQ_BASE, | |
246 | }; | |
247 | ||
dd7b2a05 PL |
248 | static struct lp5521_led_config lp5521_pri_led[] = { |
249 | [0] = { | |
250 | .chan_nr = 0, | |
251 | .led_current = 0x2f, | |
252 | .max_current = 0x5f, | |
253 | }, | |
254 | [1] = { | |
255 | .chan_nr = 1, | |
256 | .led_current = 0x2f, | |
257 | .max_current = 0x5f, | |
258 | }, | |
259 | [2] = { | |
260 | .chan_nr = 2, | |
261 | .led_current = 0x2f, | |
262 | .max_current = 0x5f, | |
263 | }, | |
264 | }; | |
265 | ||
266 | static struct lp5521_platform_data __initdata lp5521_pri_data = { | |
267 | .label = "lp5521_pri", | |
268 | .led_config = &lp5521_pri_led[0], | |
269 | .num_channels = 3, | |
270 | .clock_mode = LP5521_CLOCK_EXT, | |
271 | }; | |
272 | ||
273 | static struct lp5521_led_config lp5521_sec_led[] = { | |
274 | [0] = { | |
275 | .chan_nr = 0, | |
276 | .led_current = 0x2f, | |
277 | .max_current = 0x5f, | |
278 | }, | |
279 | [1] = { | |
280 | .chan_nr = 1, | |
281 | .led_current = 0x2f, | |
282 | .max_current = 0x5f, | |
283 | }, | |
284 | [2] = { | |
285 | .chan_nr = 2, | |
286 | .led_current = 0x2f, | |
287 | .max_current = 0x5f, | |
288 | }, | |
289 | }; | |
290 | ||
291 | static struct lp5521_platform_data __initdata lp5521_sec_data = { | |
292 | .label = "lp5521_sec", | |
293 | .led_config = &lp5521_sec_led[0], | |
294 | .num_channels = 3, | |
295 | .clock_mode = LP5521_CLOCK_EXT, | |
296 | }; | |
297 | ||
fe67dfc8 | 298 | static struct i2c_board_info __initdata mop500_i2c0_devices[] = { |
b8410a15 | 299 | { |
20406ebf | 300 | I2C_BOARD_INFO("tc3589x", 0x42), |
dd7b2a05 | 301 | .irq = NOMADIK_GPIO_TO_IRQ(217), |
b8410a15 RV |
302 | .platform_data = &mop500_tc35892_data, |
303 | }, | |
cf568c58 | 304 | /* I2C0 devices only available prior to HREFv60 */ |
fe67dfc8 LW |
305 | { |
306 | I2C_BOARD_INFO("tps61052", 0x33), | |
307 | .platform_data = &mop500_tps61052_data, | |
308 | }, | |
309 | }; | |
310 | ||
cf568c58 LW |
311 | #define NUM_PRE_V60_I2C0_DEVICES 1 |
312 | ||
dd7b2a05 PL |
313 | static struct i2c_board_info __initdata mop500_i2c2_devices[] = { |
314 | { | |
315 | /* lp5521 LED driver, 1st device */ | |
316 | I2C_BOARD_INFO("lp5521", 0x33), | |
317 | .platform_data = &lp5521_pri_data, | |
318 | }, | |
319 | { | |
320 | /* lp5521 LED driver, 2st device */ | |
321 | I2C_BOARD_INFO("lp5521", 0x34), | |
322 | .platform_data = &lp5521_sec_data, | |
323 | }, | |
bb3b2187 LJ |
324 | { |
325 | /* Light sensor Rohm BH1780GLI */ | |
326 | I2C_BOARD_INFO("bh1780", 0x29), | |
327 | }, | |
dd7b2a05 PL |
328 | }; |
329 | ||
2b030bda | 330 | #define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \ |
f9faf237 | 331 | static struct nmk_i2c_controller u8500_i2c##id##_data = { \ |
d48a41c1 SK |
332 | /* \ |
333 | * slave data setup time, which is \ | |
334 | * 250 ns,100ns,10ns which is 14,6,2 \ | |
335 | * respectively for a 48 Mhz \ | |
336 | * i2c clock \ | |
337 | */ \ | |
338 | .slsu = _slsu, \ | |
339 | /* Tx FIFO threshold */ \ | |
340 | .tft = _tft, \ | |
341 | /* Rx FIFO threshold */ \ | |
342 | .rft = _rft, \ | |
343 | /* std. mode operation */ \ | |
344 | .clk_freq = clk, \ | |
2b030bda LW |
345 | /* Slave response timeout(ms) */\ |
346 | .timeout = t_out, \ | |
d48a41c1 SK |
347 | .sm = _sm, \ |
348 | } | |
349 | ||
350 | /* | |
351 | * The board uses 4 i2c controllers, initialize all of | |
352 | * them with slave data setup time of 250 ns, | |
2b030bda | 353 | * Tx & Rx FIFO threshold values as 8 and standard |
d48a41c1 SK |
354 | * mode of operation |
355 | */ | |
2b030bda LW |
356 | U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); |
357 | U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); | |
358 | U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); | |
359 | U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); | |
d48a41c1 | 360 | |
18403424 | 361 | static void __init mop500_i2c_init(struct device *parent) |
fbf1eadf | 362 | { |
18403424 LJ |
363 | db8500_add_i2c0(parent, &u8500_i2c0_data); |
364 | db8500_add_i2c1(parent, &u8500_i2c1_data); | |
365 | db8500_add_i2c2(parent, &u8500_i2c2_data); | |
366 | db8500_add_i2c3(parent, &u8500_i2c3_data); | |
fbf1eadf | 367 | } |
aa44ef4d | 368 | |
a71b819b PL |
369 | static struct gpio_keys_button mop500_gpio_keys[] = { |
370 | { | |
371 | .desc = "SFH7741 Proximity Sensor", | |
372 | .type = EV_SW, | |
373 | .code = SW_FRONT_PROXIMITY, | |
a71b819b PL |
374 | .active_low = 0, |
375 | .can_disable = 1, | |
376 | } | |
377 | }; | |
378 | ||
379 | static struct regulator *prox_regulator; | |
380 | static int mop500_prox_activate(struct device *dev); | |
381 | static void mop500_prox_deactivate(struct device *dev); | |
382 | ||
383 | static struct gpio_keys_platform_data mop500_gpio_keys_data = { | |
384 | .buttons = mop500_gpio_keys, | |
385 | .nbuttons = ARRAY_SIZE(mop500_gpio_keys), | |
386 | .enable = mop500_prox_activate, | |
387 | .disable = mop500_prox_deactivate, | |
388 | }; | |
389 | ||
390 | static struct platform_device mop500_gpio_keys_device = { | |
391 | .name = "gpio-keys", | |
392 | .id = 0, | |
393 | .dev = { | |
394 | .platform_data = &mop500_gpio_keys_data, | |
395 | }, | |
396 | }; | |
397 | ||
398 | static int mop500_prox_activate(struct device *dev) | |
399 | { | |
400 | prox_regulator = regulator_get(&mop500_gpio_keys_device.dev, | |
401 | "vcc"); | |
402 | if (IS_ERR(prox_regulator)) { | |
403 | dev_err(&mop500_gpio_keys_device.dev, | |
404 | "no regulator\n"); | |
405 | return PTR_ERR(prox_regulator); | |
406 | } | |
407 | regulator_enable(prox_regulator); | |
408 | return 0; | |
409 | } | |
410 | ||
411 | static void mop500_prox_deactivate(struct device *dev) | |
412 | { | |
413 | regulator_disable(prox_regulator); | |
414 | regulator_put(prox_regulator); | |
415 | } | |
416 | ||
d48a41c1 | 417 | /* add any platform devices here - TODO */ |
350abe03 | 418 | static struct platform_device *mop500_platform_devs[] __initdata = { |
a71b819b | 419 | &mop500_gpio_keys_device, |
350abe03 | 420 | &ab8500_device, |
d48a41c1 SK |
421 | }; |
422 | ||
5d7b8467 LW |
423 | #ifdef CONFIG_STE_DMA40 |
424 | static struct stedma40_chan_cfg ssp0_dma_cfg_rx = { | |
425 | .mode = STEDMA40_MODE_LOGICAL, | |
426 | .dir = STEDMA40_PERIPH_TO_MEM, | |
427 | .src_dev_type = DB8500_DMA_DEV8_SSP0_RX, | |
428 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
429 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
430 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
431 | }; | |
432 | ||
433 | static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { | |
434 | .mode = STEDMA40_MODE_LOGICAL, | |
435 | .dir = STEDMA40_MEM_TO_PERIPH, | |
436 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
437 | .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX, | |
438 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
439 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
440 | }; | |
441 | #endif | |
442 | ||
443 | static struct pl022_ssp_controller ssp0_platform_data = { | |
444 | .bus_id = 0, | |
445 | #ifdef CONFIG_STE_DMA40 | |
446 | .enable_dma = 1, | |
447 | .dma_filter = stedma40_filter, | |
448 | .dma_rx_param = &ssp0_dma_cfg_rx, | |
449 | .dma_tx_param = &ssp0_dma_cfg_tx, | |
450 | #else | |
451 | .enable_dma = 0, | |
452 | #endif | |
453 | /* on this platform, gpio 31,142,144,214 & | |
454 | * 224 are connected as chip selects | |
455 | */ | |
456 | .num_chipselect = 5, | |
457 | }; | |
458 | ||
18403424 | 459 | static void __init mop500_spi_init(struct device *parent) |
aa44ef4d | 460 | { |
18403424 | 461 | db8500_add_ssp0(parent, &ssp0_platform_data); |
fbf1eadf | 462 | } |
aa44ef4d | 463 | |
5d7b8467 LW |
464 | #ifdef CONFIG_STE_DMA40 |
465 | static struct stedma40_chan_cfg uart0_dma_cfg_rx = { | |
466 | .mode = STEDMA40_MODE_LOGICAL, | |
467 | .dir = STEDMA40_PERIPH_TO_MEM, | |
468 | .src_dev_type = DB8500_DMA_DEV13_UART0_RX, | |
469 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
470 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
471 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
472 | }; | |
473 | ||
474 | static struct stedma40_chan_cfg uart0_dma_cfg_tx = { | |
475 | .mode = STEDMA40_MODE_LOGICAL, | |
476 | .dir = STEDMA40_MEM_TO_PERIPH, | |
477 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
478 | .dst_dev_type = DB8500_DMA_DEV13_UART0_TX, | |
479 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
480 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
481 | }; | |
482 | ||
483 | static struct stedma40_chan_cfg uart1_dma_cfg_rx = { | |
484 | .mode = STEDMA40_MODE_LOGICAL, | |
485 | .dir = STEDMA40_PERIPH_TO_MEM, | |
486 | .src_dev_type = DB8500_DMA_DEV12_UART1_RX, | |
487 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
488 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
489 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
490 | }; | |
491 | ||
492 | static struct stedma40_chan_cfg uart1_dma_cfg_tx = { | |
493 | .mode = STEDMA40_MODE_LOGICAL, | |
494 | .dir = STEDMA40_MEM_TO_PERIPH, | |
495 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
496 | .dst_dev_type = DB8500_DMA_DEV12_UART1_TX, | |
497 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
498 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
499 | }; | |
500 | ||
501 | static struct stedma40_chan_cfg uart2_dma_cfg_rx = { | |
502 | .mode = STEDMA40_MODE_LOGICAL, | |
503 | .dir = STEDMA40_PERIPH_TO_MEM, | |
504 | .src_dev_type = DB8500_DMA_DEV11_UART2_RX, | |
505 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
506 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
507 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
508 | }; | |
509 | ||
510 | static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | |
511 | .mode = STEDMA40_MODE_LOGICAL, | |
512 | .dir = STEDMA40_MEM_TO_PERIPH, | |
513 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
514 | .dst_dev_type = DB8500_DMA_DEV11_UART2_TX, | |
515 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
516 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
517 | }; | |
518 | #endif | |
519 | ||
1a7d4369 SKS |
520 | |
521 | static pin_cfg_t mop500_pins_uart0[] = { | |
522 | GPIO0_U0_CTSn | PIN_INPUT_PULLUP, | |
523 | GPIO1_U0_RTSn | PIN_OUTPUT_HIGH, | |
524 | GPIO2_U0_RXD | PIN_INPUT_PULLUP, | |
525 | GPIO3_U0_TXD | PIN_OUTPUT_HIGH, | |
526 | }; | |
527 | ||
528 | #define PRCC_K_SOFTRST_SET 0x18 | |
529 | #define PRCC_K_SOFTRST_CLEAR 0x1C | |
530 | static void ux500_uart0_reset(void) | |
531 | { | |
532 | void __iomem *prcc_rst_set, *prcc_rst_clr; | |
533 | ||
534 | prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | |
535 | PRCC_K_SOFTRST_SET); | |
536 | prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | |
537 | PRCC_K_SOFTRST_CLEAR); | |
538 | ||
539 | /* Activate soft reset PRCC_K_SOFTRST_CLEAR */ | |
540 | writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr); | |
541 | udelay(1); | |
542 | ||
543 | /* Release soft reset PRCC_K_SOFTRST_SET */ | |
544 | writel((readl(prcc_rst_set) | 0x1), prcc_rst_set); | |
545 | udelay(1); | |
546 | } | |
547 | ||
548 | static void ux500_uart0_init(void) | |
549 | { | |
550 | int ret; | |
551 | ||
552 | ret = nmk_config_pins(mop500_pins_uart0, | |
553 | ARRAY_SIZE(mop500_pins_uart0)); | |
554 | if (ret < 0) | |
555 | pr_err("pl011: uart pins_enable failed\n"); | |
556 | } | |
557 | ||
558 | static void ux500_uart0_exit(void) | |
559 | { | |
560 | int ret; | |
561 | ||
562 | ret = nmk_config_pins_sleep(mop500_pins_uart0, | |
563 | ARRAY_SIZE(mop500_pins_uart0)); | |
564 | if (ret < 0) | |
565 | pr_err("pl011: uart pins_disable failed\n"); | |
566 | } | |
567 | ||
5d7b8467 LW |
568 | static struct amba_pl011_data uart0_plat = { |
569 | #ifdef CONFIG_STE_DMA40 | |
570 | .dma_filter = stedma40_filter, | |
571 | .dma_rx_param = &uart0_dma_cfg_rx, | |
572 | .dma_tx_param = &uart0_dma_cfg_tx, | |
573 | #endif | |
1a7d4369 SKS |
574 | .init = ux500_uart0_init, |
575 | .exit = ux500_uart0_exit, | |
576 | .reset = ux500_uart0_reset, | |
5d7b8467 LW |
577 | }; |
578 | ||
579 | static struct amba_pl011_data uart1_plat = { | |
580 | #ifdef CONFIG_STE_DMA40 | |
581 | .dma_filter = stedma40_filter, | |
582 | .dma_rx_param = &uart1_dma_cfg_rx, | |
583 | .dma_tx_param = &uart1_dma_cfg_tx, | |
584 | #endif | |
585 | }; | |
586 | ||
587 | static struct amba_pl011_data uart2_plat = { | |
588 | #ifdef CONFIG_STE_DMA40 | |
589 | .dma_filter = stedma40_filter, | |
590 | .dma_rx_param = &uart2_dma_cfg_rx, | |
591 | .dma_tx_param = &uart2_dma_cfg_tx, | |
592 | #endif | |
593 | }; | |
594 | ||
18403424 | 595 | static void __init mop500_uart_init(struct device *parent) |
fbf1eadf | 596 | { |
18403424 LJ |
597 | db8500_add_uart0(parent, &uart0_plat); |
598 | db8500_add_uart1(parent, &uart1_plat); | |
599 | db8500_add_uart2(parent, &uart2_plat); | |
fbf1eadf RV |
600 | } |
601 | ||
350abe03 RM |
602 | static struct platform_device *snowball_platform_devs[] __initdata = { |
603 | &snowball_led_dev, | |
604 | &snowball_key_dev, | |
605 | &snowball_sbnet_dev, | |
606 | &ab8500_device, | |
607 | }; | |
608 | ||
4b4f757c | 609 | static void __init mop500_init_machine(void) |
fbf1eadf | 610 | { |
18403424 | 611 | struct device *parent = NULL; |
cf568c58 | 612 | int i2c0_devs; |
b024a0c8 | 613 | int i; |
cf568c58 | 614 | |
110c2c2f LJ |
615 | mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; |
616 | ||
18403424 | 617 | parent = u8500_init_devices(); |
110c2c2f LJ |
618 | |
619 | mop500_pins_init(); | |
620 | ||
b024a0c8 LJ |
621 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
622 | mop500_platform_devs[i]->dev.parent = parent; | |
623 | ||
110c2c2f LJ |
624 | platform_add_devices(mop500_platform_devs, |
625 | ARRAY_SIZE(mop500_platform_devs)); | |
626 | ||
18403424 LJ |
627 | mop500_i2c_init(parent); |
628 | mop500_sdi_init(parent); | |
629 | mop500_spi_init(parent); | |
630 | mop500_uart_init(parent); | |
110c2c2f LJ |
631 | |
632 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); | |
633 | ||
634 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
635 | i2c_register_board_info(2, mop500_i2c2_devices, | |
636 | ARRAY_SIZE(mop500_i2c2_devices)); | |
637 | ||
638 | /* This board has full regulator constraints */ | |
639 | regulator_has_full_constraints(); | |
640 | } | |
641 | ||
642 | static void __init snowball_init_machine(void) | |
643 | { | |
18403424 | 644 | struct device *parent = NULL; |
110c2c2f | 645 | int i2c0_devs; |
b024a0c8 | 646 | int i; |
110c2c2f | 647 | |
18403424 | 648 | parent = u8500_init_devices(); |
110c2c2f LJ |
649 | |
650 | snowball_pins_init(); | |
651 | ||
b024a0c8 LJ |
652 | for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++) |
653 | snowball_platform_devs[i]->dev.parent = parent; | |
654 | ||
110c2c2f LJ |
655 | platform_add_devices(snowball_platform_devs, |
656 | ARRAY_SIZE(snowball_platform_devs)); | |
657 | ||
18403424 LJ |
658 | mop500_i2c_init(parent); |
659 | snowball_sdi_init(parent); | |
660 | mop500_spi_init(parent); | |
661 | mop500_uart_init(parent); | |
110c2c2f LJ |
662 | |
663 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); | |
664 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
665 | i2c_register_board_info(2, mop500_i2c2_devices, | |
666 | ARRAY_SIZE(mop500_i2c2_devices)); | |
667 | ||
668 | /* This board has full regulator constraints */ | |
669 | regulator_has_full_constraints(); | |
670 | } | |
671 | ||
672 | static void __init hrefv60_init_machine(void) | |
673 | { | |
18403424 | 674 | struct device *parent = NULL; |
110c2c2f | 675 | int i2c0_devs; |
b024a0c8 | 676 | int i; |
110c2c2f | 677 | |
4b4f757c LW |
678 | /* |
679 | * The HREFv60 board removed a GPIO expander and routed | |
680 | * all these GPIO pins to the internal GPIO controller | |
681 | * instead. | |
682 | */ | |
110c2c2f | 683 | mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; |
4b4f757c | 684 | |
18403424 | 685 | parent = u8500_init_devices(); |
ea05a57f | 686 | |
110c2c2f | 687 | hrefv60_pins_init(); |
ea05a57f | 688 | |
b024a0c8 LJ |
689 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
690 | mop500_platform_devs[i]->dev.parent = parent; | |
691 | ||
110c2c2f LJ |
692 | platform_add_devices(mop500_platform_devs, |
693 | ARRAY_SIZE(mop500_platform_devs)); | |
d48a41c1 | 694 | |
18403424 LJ |
695 | mop500_i2c_init(parent); |
696 | hrefv60_sdi_init(parent); | |
697 | mop500_spi_init(parent); | |
698 | mop500_uart_init(parent); | |
008f8a2f | 699 | |
cf568c58 | 700 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); |
110c2c2f LJ |
701 | |
702 | i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES; | |
cf568c58 LW |
703 | |
704 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
dd7b2a05 PL |
705 | i2c_register_board_info(2, mop500_i2c2_devices, |
706 | ARRAY_SIZE(mop500_i2c2_devices)); | |
db24520f LW |
707 | |
708 | /* This board has full regulator constraints */ | |
709 | regulator_has_full_constraints(); | |
aa44ef4d SK |
710 | } |
711 | ||
712 | MACHINE_START(U8500, "ST-Ericsson MOP500 platform") | |
713 | /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */ | |
bc77b1aa | 714 | .atag_offset = 0x100, |
aa44ef4d | 715 | .map_io = u8500_map_io, |
178980f9 | 716 | .init_irq = ux500_init_irq, |
aa44ef4d | 717 | /* we re-use nomadik timer here */ |
41ac329f | 718 | .timer = &ux500_timer, |
bbf5f385 | 719 | .handle_irq = gic_handle_irq, |
4b4f757c LW |
720 | .init_machine = mop500_init_machine, |
721 | MACHINE_END | |
722 | ||
723 | MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+") | |
bc77b1aa | 724 | .atag_offset = 0x100, |
4b4f757c LW |
725 | .map_io = u8500_map_io, |
726 | .init_irq = ux500_init_irq, | |
727 | .timer = &ux500_timer, | |
bbf5f385 | 728 | .handle_irq = gic_handle_irq, |
110c2c2f | 729 | .init_machine = hrefv60_init_machine, |
aa44ef4d | 730 | MACHINE_END |
350abe03 RM |
731 | |
732 | MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") | |
bc77b1aa | 733 | .atag_offset = 0x100, |
350abe03 RM |
734 | .map_io = u8500_map_io, |
735 | .init_irq = ux500_init_irq, | |
736 | /* we re-use nomadik timer here */ | |
737 | .timer = &ux500_timer, | |
bbf5f385 | 738 | .handle_irq = gic_handle_irq, |
110c2c2f | 739 | .init_machine = snowball_init_machine, |
350abe03 | 740 | MACHINE_END |