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ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree
[deliverable/linux.git] / arch / arm / mach-ux500 / board-mop500.c
CommitLineData
aa44ef4d
SK		 1/*
2 * Copyright (C) 2008-2009 ST-Ericsson
3 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
b8410a15 16#include <linux/i2c.h>
ea05a57f 17#include <linux/gpio.h>
aa44ef4d
SK		 18#include <linux/amba/bus.h>
19#include <linux/amba/pl022.h>
5d7b8467 20#include <linux/amba/serial.h>
aa44ef4d 21#include <linux/spi/spi.h>
ee66e653 22#include <linux/mfd/abx500/ab8500.h>
79568b94 23#include <linux/regulator/ab8500.h>
20406ebf 24#include <linux/mfd/tc3589x.h>
fe67dfc8 25#include <linux/mfd/tps6105x.h>
ee66e653 26#include <linux/mfd/abx500/ab8500-gpio.h>
dd7b2a05 27#include <linux/leds-lp5521.h>
a71b819b 28#include <linux/input.h>
350abe03 29#include <linux/smsc911x.h>
a71b819b 30#include <linux/gpio_keys.h>
1a7d4369 31#include <linux/delay.h>
aa44ef4d 32
2d334297
AB		 33#include <linux/of.h>
34#include <linux/of_platform.h>
35
350abe03 36#include <linux/leds.h>
aa44ef4d
SK		 37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
bbf5f385 39#include <asm/hardware/gic.h>
aa44ef4d 40
d48a41c1 41#include <plat/i2c.h>
5d7b8467 42#include <plat/ste_dma40.h>
1a7d4369 43#include <plat/pincfg.h>
0f332861 44#include <plat/gpio-nomadik.h>
aa44ef4d
SK		 45
46#include <mach/hardware.h>
47#include <mach/setup.h>
9e4e7fe1 48#include <mach/devices.h>
29aeb3cf 49#include <mach/irqs.h>
aa44ef4d 50
1a7d4369 51#include "pins-db8500.h"
5d7b8467 52#include "ste-dma40-db8500.h"
fbf1eadf 53#include "devices-db8500.h"
008f8a2f 54#include "board-mop500.h"
a1e516e3 55#include "board-mop500-regulators.h"
ea05a57f 56
350abe03
RM		 57static struct gpio_led snowball_led_array[] = {
58 {
59 .name = "user_led",
60 .default_trigger = "none",
61 .gpio = 142,
62 },
63};
64
65static struct gpio_led_platform_data snowball_led_data = {
66 .leds = snowball_led_array,
67 .num_leds = ARRAY_SIZE(snowball_led_array),
68};
69
70static struct platform_device snowball_led_dev = {
71 .name = "leds-gpio",
72 .dev = {
73 .platform_data = &snowball_led_data,
74 },
75};
76
3ef374a2
BB		 77static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
78 .gpio_base = MOP500_AB8500_GPIO(0),
79 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
80 /* config_reg is the initial configuration of ab8500 pins.
81 * The pins can be configured as GPIO or alt functions based
82 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
83 * register. This is the array of 7 configuration settings.
84 * One has to compile time decide these settings. Below is the
25985edc 85 * explanation of these setting
3ef374a2
BB		 86 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
87 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
88 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
89 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
90 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
91 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
92 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
93 * as GPIO then this register selectes the alternate fucntions
94 */
95 .config_reg = {0x00, 0x1E, 0x80, 0x01,
96 0x7A, 0x00, 0x00},
97};
98
350abe03
RM		 99static struct gpio_keys_button snowball_key_array[] = {
100 {
101 .gpio = 32,
102 .type = EV_KEY,
103 .code = KEY_1,
104 .desc = "userpb",
105 .active_low = 1,
106 .debounce_interval = 50,
107 .wakeup = 1,
108 },
109 {
110 .gpio = 151,
111 .type = EV_KEY,
112 .code = KEY_2,
113 .desc = "extkb1",
114 .active_low = 1,
115 .debounce_interval = 50,
116 .wakeup = 1,
117 },
118 {
119 .gpio = 152,
120 .type = EV_KEY,
121 .code = KEY_3,
122 .desc = "extkb2",
123 .active_low = 1,
124 .debounce_interval = 50,
125 .wakeup = 1,
126 },
127 {
128 .gpio = 161,
129 .type = EV_KEY,
130 .code = KEY_4,
131 .desc = "extkb3",
132 .active_low = 1,
133 .debounce_interval = 50,
134 .wakeup = 1,
135 },
136 {
137 .gpio = 162,
138 .type = EV_KEY,
139 .code = KEY_5,
140 .desc = "extkb4",
141 .active_low = 1,
142 .debounce_interval = 50,
143 .wakeup = 1,
144 },
145};
146
147static struct gpio_keys_platform_data snowball_key_data = {
148 .buttons = snowball_key_array,
149 .nbuttons = ARRAY_SIZE(snowball_key_array),
150};
151
152static struct platform_device snowball_key_dev = {
153 .name = "gpio-keys",
154 .id = -1,
155 .dev = {
156 .platform_data = &snowball_key_data,
157 }
158};
159
160static struct smsc911x_platform_config snowball_sbnet_cfg = {
161 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
162 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
163 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
164 .shift = 1,
165};
166
167static struct resource sbnet_res[] = {
168 {
169 .name = "smsc911x-memory",
170 .start = (0x5000 << 16),
171 .end = (0x5000 << 16) + 0xffff,
172 .flags = IORESOURCE_MEM,
173 },
174 {
175 .start = NOMADIK_GPIO_TO_IRQ(140),
176 .end = NOMADIK_GPIO_TO_IRQ(140),
177 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
178 },
179};
180
181static struct platform_device snowball_sbnet_dev = {
182 .name = "smsc911x",
183 .num_resources = ARRAY_SIZE(sbnet_res),
184 .resource = sbnet_res,
185 .dev = {
186 .platform_data = &snowball_sbnet_cfg,
187 },
188};
189
39ae702c
RV		 190static struct ab8500_platform_data ab8500_platdata = {
191 .irq_base = MOP500_AB8500_IRQ_BASE,
dfa3a824
BJ		 192 .regulator_reg_init = ab8500_regulator_reg_init,
193 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
a1e516e3
BJ		 194 .regulator = ab8500_regulators,
195 .num_regulator = ARRAY_SIZE(ab8500_regulators),
3ef374a2 196 .gpio = &ab8500_gpio_pdata,
39ae702c
RV		 197};
198
29aeb3cf
LW		 199static struct resource ab8500_resources[] = {
200 [0] = {
22039b7c
RV		 201 .start = IRQ_DB8500_AB8500,
202 .end = IRQ_DB8500_AB8500,
203 .flags = IORESOURCE_IRQ
29aeb3cf
LW		 204 }
205};
206
207struct platform_device ab8500_device = {
208 .name = "ab8500-i2c",
209 .id = 0,
210 .dev = {
211 .platform_data = &ab8500_platdata,
212 },
213 .num_resources = 1,
214 .resource = ab8500_resources,
215};
216
fe67dfc8
LW		 217/*
218 * TPS61052
219 */
220
221static struct tps6105x_platform_data mop500_tps61052_data = {
222 .mode = TPS6105X_MODE_VOLTAGE,
223 .regulator_data = &tps61052_regulator,
224};
225
b8410a15
RV		 226/*
227 * TC35892
228 */
229
20406ebf 230static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
b8410a15 231{
18403424
LJ		 232 struct device *parent = NULL;
233#if 0
234 /* FIXME: Is the sdi actually part of tc3589x? */
235 parent = tc3589x->dev;
236#endif
237 mop500_sdi_tc35892_init(parent);
b8410a15
RV		 238}
239
20406ebf 240static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
b8410a15
RV		 241 .gpio_base = MOP500_EGPIO(0),
242 .setup = mop500_tc35892_init,
243};
244
20406ebf 245static struct tc3589x_platform_data mop500_tc35892_data = {
611b7590 246 .block = TC3589x_BLOCK_GPIO,
b8410a15
RV		 247 .gpio = &mop500_tc35892_gpio_data,
248 .irq_base = MOP500_EGPIO_IRQ_BASE,
249};
250
dd7b2a05
PL		 251static struct lp5521_led_config lp5521_pri_led[] = {
252 [0] = {
253 .chan_nr = 0,
254 .led_current = 0x2f,
255 .max_current = 0x5f,
256 },
257 [1] = {
258 .chan_nr = 1,
259 .led_current = 0x2f,
260 .max_current = 0x5f,
261 },
262 [2] = {
263 .chan_nr = 2,
264 .led_current = 0x2f,
265 .max_current = 0x5f,
266 },
267};
268
269static struct lp5521_platform_data __initdata lp5521_pri_data = {
270 .label = "lp5521_pri",
271 .led_config = &lp5521_pri_led[0],
272 .num_channels = 3,
273 .clock_mode = LP5521_CLOCK_EXT,
274};
275
276static struct lp5521_led_config lp5521_sec_led[] = {
277 [0] = {
278 .chan_nr = 0,
279 .led_current = 0x2f,
280 .max_current = 0x5f,
281 },
282 [1] = {
283 .chan_nr = 1,
284 .led_current = 0x2f,
285 .max_current = 0x5f,
286 },
287 [2] = {
288 .chan_nr = 2,
289 .led_current = 0x2f,
290 .max_current = 0x5f,
291 },
292};
293
294static struct lp5521_platform_data __initdata lp5521_sec_data = {
295 .label = "lp5521_sec",
296 .led_config = &lp5521_sec_led[0],
297 .num_channels = 3,
298 .clock_mode = LP5521_CLOCK_EXT,
299};
300
fe67dfc8 301static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
b8410a15 302 {
20406ebf 303 I2C_BOARD_INFO("tc3589x", 0x42),
dd7b2a05 304 .irq = NOMADIK_GPIO_TO_IRQ(217),
b8410a15
RV		 305 .platform_data = &mop500_tc35892_data,
306 },
cf568c58 307 /* I2C0 devices only available prior to HREFv60 */
fe67dfc8
LW		 308 {
309 I2C_BOARD_INFO("tps61052", 0x33),
310 .platform_data = &mop500_tps61052_data,
311 },
312};
313
cf568c58
LW		 314#define NUM_PRE_V60_I2C0_DEVICES 1
315
dd7b2a05
PL		 316static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
317 {
318 /* lp5521 LED driver, 1st device */
319 I2C_BOARD_INFO("lp5521", 0x33),
320 .platform_data = &lp5521_pri_data,
321 },
322 {
323 /* lp5521 LED driver, 2st device */
324 I2C_BOARD_INFO("lp5521", 0x34),
325 .platform_data = &lp5521_sec_data,
326 },
bb3b2187
LJ		 327 {
328 /* Light sensor Rohm BH1780GLI */
329 I2C_BOARD_INFO("bh1780", 0x29),
330 },
dd7b2a05
PL		 331};
332
2b030bda 333#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \
f9faf237 334static struct nmk_i2c_controller u8500_i2c##id##_data = { \
d48a41c1
SK		 335 /* \
336 * slave data setup time, which is \
337 * 250 ns,100ns,10ns which is 14,6,2 \
338 * respectively for a 48 Mhz \
339 * i2c clock \
340 */ \
341 .slsu = _slsu, \
342 /* Tx FIFO threshold */ \
343 .tft = _tft, \
344 /* Rx FIFO threshold */ \
345 .rft = _rft, \
346 /* std. mode operation */ \
347 .clk_freq = clk, \
2b030bda
LW		 348 /* Slave response timeout(ms) */\
349 .timeout = t_out, \
d48a41c1
SK		 350 .sm = _sm, \
351}
352
353/*
354 * The board uses 4 i2c controllers, initialize all of
355 * them with slave data setup time of 250 ns,
2b030bda 356 * Tx & Rx FIFO threshold values as 8 and standard
d48a41c1
SK		 357 * mode of operation
358 */
2b030bda
LW		 359U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
360U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
361U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
362U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
d48a41c1 363
18403424 364static void __init mop500_i2c_init(struct device *parent)
fbf1eadf 365{
18403424
LJ		 366 db8500_add_i2c0(parent, &u8500_i2c0_data);
367 db8500_add_i2c1(parent, &u8500_i2c1_data);
368 db8500_add_i2c2(parent, &u8500_i2c2_data);
369 db8500_add_i2c3(parent, &u8500_i2c3_data);
fbf1eadf 370}
aa44ef4d 371
a71b819b
PL		 372static struct gpio_keys_button mop500_gpio_keys[] = {
373 {
374 .desc = "SFH7741 Proximity Sensor",
375 .type = EV_SW,
376 .code = SW_FRONT_PROXIMITY,
a71b819b
PL		 377 .active_low = 0,
378 .can_disable = 1,
379 }
380};
381
382static struct regulator *prox_regulator;
383static int mop500_prox_activate(struct device *dev);
384static void mop500_prox_deactivate(struct device *dev);
385
386static struct gpio_keys_platform_data mop500_gpio_keys_data = {
387 .buttons = mop500_gpio_keys,
388 .nbuttons = ARRAY_SIZE(mop500_gpio_keys),
389 .enable = mop500_prox_activate,
390 .disable = mop500_prox_deactivate,
391};
392
393static struct platform_device mop500_gpio_keys_device = {
394 .name = "gpio-keys",
395 .id = 0,
396 .dev = {
397 .platform_data = &mop500_gpio_keys_data,
398 },
399};
400
401static int mop500_prox_activate(struct device *dev)
402{
403 prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
404 "vcc");
405 if (IS_ERR(prox_regulator)) {
406 dev_err(&mop500_gpio_keys_device.dev,
407 "no regulator\n");
408 return PTR_ERR(prox_regulator);
409 }
410 regulator_enable(prox_regulator);
411 return 0;
412}
413
414static void mop500_prox_deactivate(struct device *dev)
415{
416 regulator_disable(prox_regulator);
417 regulator_put(prox_regulator);
418}
419
d48a41c1 420/* add any platform devices here - TODO */
350abe03 421static struct platform_device *mop500_platform_devs[] __initdata = {
a71b819b 422 &mop500_gpio_keys_device,
350abe03 423 &ab8500_device,
d48a41c1
SK		 424};
425
5d7b8467
LW		 426#ifdef CONFIG_STE_DMA40
427static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
428 .mode = STEDMA40_MODE_LOGICAL,
429 .dir = STEDMA40_PERIPH_TO_MEM,
430 .src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
431 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
432 .src_info.data_width = STEDMA40_BYTE_WIDTH,
433 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
434};
435
436static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
437 .mode = STEDMA40_MODE_LOGICAL,
438 .dir = STEDMA40_MEM_TO_PERIPH,
439 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
440 .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
441 .src_info.data_width = STEDMA40_BYTE_WIDTH,
442 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
443};
444#endif
445
446static struct pl022_ssp_controller ssp0_platform_data = {
447 .bus_id = 0,
448#ifdef CONFIG_STE_DMA40
449 .enable_dma = 1,
450 .dma_filter = stedma40_filter,
451 .dma_rx_param = &ssp0_dma_cfg_rx,
452 .dma_tx_param = &ssp0_dma_cfg_tx,
453#else
454 .enable_dma = 0,
455#endif
456 /* on this platform, gpio 31,142,144,214 &
457 * 224 are connected as chip selects
458 */
459 .num_chipselect = 5,
460};
461
18403424 462static void __init mop500_spi_init(struct device *parent)
aa44ef4d 463{
18403424 464 db8500_add_ssp0(parent, &ssp0_platform_data);
fbf1eadf 465}
aa44ef4d 466
5d7b8467
LW		 467#ifdef CONFIG_STE_DMA40
468static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
469 .mode = STEDMA40_MODE_LOGICAL,
470 .dir = STEDMA40_PERIPH_TO_MEM,
471 .src_dev_type = DB8500_DMA_DEV13_UART0_RX,
472 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
473 .src_info.data_width = STEDMA40_BYTE_WIDTH,
474 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
475};
476
477static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
478 .mode = STEDMA40_MODE_LOGICAL,
479 .dir = STEDMA40_MEM_TO_PERIPH,
480 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
481 .dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
482 .src_info.data_width = STEDMA40_BYTE_WIDTH,
483 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
484};
485
486static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
487 .mode = STEDMA40_MODE_LOGICAL,
488 .dir = STEDMA40_PERIPH_TO_MEM,
489 .src_dev_type = DB8500_DMA_DEV12_UART1_RX,
490 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
491 .src_info.data_width = STEDMA40_BYTE_WIDTH,
492 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
493};
494
495static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
496 .mode = STEDMA40_MODE_LOGICAL,
497 .dir = STEDMA40_MEM_TO_PERIPH,
498 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
499 .dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
500 .src_info.data_width = STEDMA40_BYTE_WIDTH,
501 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
502};
503
504static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
505 .mode = STEDMA40_MODE_LOGICAL,
506 .dir = STEDMA40_PERIPH_TO_MEM,
507 .src_dev_type = DB8500_DMA_DEV11_UART2_RX,
508 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
509 .src_info.data_width = STEDMA40_BYTE_WIDTH,
510 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
511};
512
513static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
514 .mode = STEDMA40_MODE_LOGICAL,
515 .dir = STEDMA40_MEM_TO_PERIPH,
516 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
517 .dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
518 .src_info.data_width = STEDMA40_BYTE_WIDTH,
519 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
520};
521#endif
522
1a7d4369
SKS		 523
524static pin_cfg_t mop500_pins_uart0[] = {
525 GPIO0_U0_CTSn | PIN_INPUT_PULLUP,
526 GPIO1_U0_RTSn | PIN_OUTPUT_HIGH,
527 GPIO2_U0_RXD | PIN_INPUT_PULLUP,
528 GPIO3_U0_TXD | PIN_OUTPUT_HIGH,
529};
530
531#define PRCC_K_SOFTRST_SET 0x18
532#define PRCC_K_SOFTRST_CLEAR 0x1C
533static void ux500_uart0_reset(void)
534{
535 void __iomem *prcc_rst_set, *prcc_rst_clr;
536
537 prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
538 PRCC_K_SOFTRST_SET);
539 prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
540 PRCC_K_SOFTRST_CLEAR);
541
542 /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
543 writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
544 udelay(1);
545
546 /* Release soft reset PRCC_K_SOFTRST_SET */
547 writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
548 udelay(1);
549}
550
551static void ux500_uart0_init(void)
552{
553 int ret;
554
555 ret = nmk_config_pins(mop500_pins_uart0,
556 ARRAY_SIZE(mop500_pins_uart0));
557 if (ret < 0)
558 pr_err("pl011: uart pins_enable failed\n");
559}
560
561static void ux500_uart0_exit(void)
562{
563 int ret;
564
565 ret = nmk_config_pins_sleep(mop500_pins_uart0,
566 ARRAY_SIZE(mop500_pins_uart0));
567 if (ret < 0)
568 pr_err("pl011: uart pins_disable failed\n");
569}
570
5d7b8467
LW		 571static struct amba_pl011_data uart0_plat = {
572#ifdef CONFIG_STE_DMA40
573 .dma_filter = stedma40_filter,
574 .dma_rx_param = &uart0_dma_cfg_rx,
575 .dma_tx_param = &uart0_dma_cfg_tx,
576#endif
1a7d4369
SKS		 577 .init = ux500_uart0_init,
578 .exit = ux500_uart0_exit,
579 .reset = ux500_uart0_reset,
5d7b8467
LW		 580};
581
582static struct amba_pl011_data uart1_plat = {
583#ifdef CONFIG_STE_DMA40
584 .dma_filter = stedma40_filter,
585 .dma_rx_param = &uart1_dma_cfg_rx,
586 .dma_tx_param = &uart1_dma_cfg_tx,
587#endif
588};
589
590static struct amba_pl011_data uart2_plat = {
591#ifdef CONFIG_STE_DMA40
592 .dma_filter = stedma40_filter,
593 .dma_rx_param = &uart2_dma_cfg_rx,
594 .dma_tx_param = &uart2_dma_cfg_tx,
595#endif
596};
597
18403424 598static void __init mop500_uart_init(struct device *parent)
fbf1eadf 599{
18403424
LJ		 600 db8500_add_uart0(parent, &uart0_plat);
601 db8500_add_uart1(parent, &uart1_plat);
602 db8500_add_uart2(parent, &uart2_plat);
fbf1eadf
RV		 603}
604
350abe03
RM		 605static struct platform_device *snowball_platform_devs[] __initdata = {
606 &snowball_led_dev,
607 &snowball_key_dev,
608 &snowball_sbnet_dev,
609 &ab8500_device,
610};
611
4b4f757c 612static void __init mop500_init_machine(void)
fbf1eadf 613{
18403424 614 struct device *parent = NULL;
cf568c58 615 int i2c0_devs;
b024a0c8 616 int i;
cf568c58 617
110c2c2f
LJ		 618 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
619
18403424 620 parent = u8500_init_devices();
110c2c2f
LJ		 621
622 mop500_pins_init();
623
7e0ce270 624 /* FIXME: parent of ab8500 should be prcmu */
b024a0c8
LJ		 625 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
626 mop500_platform_devs[i]->dev.parent = parent;
627
110c2c2f
LJ		 628 platform_add_devices(mop500_platform_devs,
629 ARRAY_SIZE(mop500_platform_devs));
630
18403424
LJ		 631 mop500_i2c_init(parent);
632 mop500_sdi_init(parent);
633 mop500_spi_init(parent);
634 mop500_uart_init(parent);
110c2c2f
LJ		 635
636 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
637
638 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
639 i2c_register_board_info(2, mop500_i2c2_devices,
640 ARRAY_SIZE(mop500_i2c2_devices));
641
642 /* This board has full regulator constraints */
643 regulator_has_full_constraints();
644}
645
646static void __init snowball_init_machine(void)
647{
18403424 648 struct device *parent = NULL;
110c2c2f 649 int i2c0_devs;
b024a0c8 650 int i;
110c2c2f 651
18403424 652 parent = u8500_init_devices();
110c2c2f
LJ		 653
654 snowball_pins_init();
655
b024a0c8
LJ		 656 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
657 snowball_platform_devs[i]->dev.parent = parent;
658
110c2c2f
LJ		 659 platform_add_devices(snowball_platform_devs,
660 ARRAY_SIZE(snowball_platform_devs));
661
18403424
LJ		 662 mop500_i2c_init(parent);
663 snowball_sdi_init(parent);
664 mop500_spi_init(parent);
665 mop500_uart_init(parent);
110c2c2f
LJ		 666
667 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
668 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
669 i2c_register_board_info(2, mop500_i2c2_devices,
670 ARRAY_SIZE(mop500_i2c2_devices));
671
672 /* This board has full regulator constraints */
673 regulator_has_full_constraints();
674}
675
676static void __init hrefv60_init_machine(void)
677{
18403424 678 struct device *parent = NULL;
110c2c2f 679 int i2c0_devs;
b024a0c8 680 int i;
110c2c2f 681
4b4f757c
LW		 682 /*
683 * The HREFv60 board removed a GPIO expander and routed
684 * all these GPIO pins to the internal GPIO controller
685 * instead.
686 */
110c2c2f 687 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
4b4f757c 688
18403424 689 parent = u8500_init_devices();
ea05a57f 690
110c2c2f 691 hrefv60_pins_init();
ea05a57f 692
b024a0c8
LJ		 693 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
694 mop500_platform_devs[i]->dev.parent = parent;
695
110c2c2f
LJ		 696 platform_add_devices(mop500_platform_devs,
697 ARRAY_SIZE(mop500_platform_devs));
d48a41c1 698
18403424
LJ		 699 mop500_i2c_init(parent);
700 hrefv60_sdi_init(parent);
701 mop500_spi_init(parent);
702 mop500_uart_init(parent);
008f8a2f 703
cf568c58 704 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
110c2c2f
LJ		 705
706 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
cf568c58
LW		 707
708 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
dd7b2a05
PL		 709 i2c_register_board_info(2, mop500_i2c2_devices,
710 ARRAY_SIZE(mop500_i2c2_devices));
db24520f
LW		 711
712 /* This board has full regulator constraints */
713 regulator_has_full_constraints();
aa44ef4d
SK		 714}
715
716MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
717 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
bc77b1aa 718 .atag_offset = 0x100,
aa44ef4d 719 .map_io = u8500_map_io,
178980f9 720 .init_irq = ux500_init_irq,
aa44ef4d 721 /* we re-use nomadik timer here */
41ac329f 722 .timer = &ux500_timer,
bbf5f385 723 .handle_irq = gic_handle_irq,
4b4f757c
LW		 724 .init_machine = mop500_init_machine,
725MACHINE_END
726
727MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
bc77b1aa 728 .atag_offset = 0x100,
4b4f757c
LW		 729 .map_io = u8500_map_io,
730 .init_irq = ux500_init_irq,
731 .timer = &ux500_timer,
bbf5f385 732 .handle_irq = gic_handle_irq,
110c2c2f 733 .init_machine = hrefv60_init_machine,
aa44ef4d 734MACHINE_END
350abe03
RM		 735
736MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
bc77b1aa 737 .atag_offset = 0x100,
350abe03
RM		 738 .map_io = u8500_map_io,
739 .init_irq = ux500_init_irq,
740 /* we re-use nomadik timer here */
741 .timer = &ux500_timer,
bbf5f385 742 .handle_irq = gic_handle_irq,
110c2c2f 743 .init_machine = snowball_init_machine,
350abe03 744MACHINE_END
2d334297
AB		 745
746#ifdef CONFIG_MACH_UX500_DT
7e0ce270
LJ		 747
748struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
4905af0e
LJ		 749 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
750 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
751 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
7e0ce270
LJ		 752 {},
753};
754
755static const struct of_device_id u8500_soc_node[] = {
756 /* only create devices below soc node */
757 { .compatible = "stericsson,db8500", },
758 { },
759};
760
2d334297
AB		 761static void __init u8500_init_machine(void)
762{
7734fed8
AB		 763 struct device *parent = NULL;
764 int i2c0_devs;
765 int i;
766
767 parent = u8500_init_devices();
768 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
769
770 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
771 mop500_platform_devs[i]->dev.parent = parent;
772 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
773 snowball_platform_devs[i]->dev.parent = parent;
774
7e0ce270
LJ		 775 /* automatically probe child nodes of db8500 device */
776 of_platform_populate(NULL, u8500_soc_node, u8500_auxdata_lookup, parent);
7734fed8
AB		 777
778 if (of_machine_is_compatible("st-ericsson,mop500")) {
779 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
780 mop500_pins_init();
781
782 platform_add_devices(mop500_platform_devs,
783 ARRAY_SIZE(mop500_platform_devs));
784
785 mop500_sdi_init(parent);
786 } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
787 snowball_pins_init();
788 platform_add_devices(snowball_platform_devs,
789 ARRAY_SIZE(snowball_platform_devs));
790
791 snowball_sdi_init(parent);
792 } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
793 /*
794 * The HREFv60 board removed a GPIO expander and routed
795 * all these GPIO pins to the internal GPIO controller
796 * instead.
797 */
798 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
799 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
800 hrefv60_pins_init();
801 platform_add_devices(mop500_platform_devs,
802 ARRAY_SIZE(mop500_platform_devs));
803
804 hrefv60_sdi_init(parent);
805 }
806 mop500_i2c_init(parent);
807 mop500_spi_init(parent);
7734fed8
AB		 808
809 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
810 i2c_register_board_info(2, mop500_i2c2_devices,
811 ARRAY_SIZE(mop500_i2c2_devices));
812
813 /* This board has full regulator constraints */
814 regulator_has_full_constraints();
2d334297
AB		 815}
816
817static const char * u8500_dt_board_compat[] = {
818 "calaosystems,snowball-a9500",
819 "st-ericsson,hrefv60+",
820 "st-ericsson,u8500",
821 "st-ericsson,mop500",
822 NULL,
823};
824
825
826DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
827 .map_io = u8500_map_io,
828 .init_irq = ux500_init_irq,
829 /* we re-use nomadik timer here */
830 .timer = &ux500_timer,
831 .handle_irq = gic_handle_irq,
832 .init_machine = u8500_init_machine,
833 .dt_compat = u8500_dt_board_compat,
834MACHINE_END
835#endif
Linux kernel - Deliverables
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