Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / mach-ux500 / cpu.c
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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
eda413c2 5 * Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson
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6 * License terms: GNU General Public License (GPL) version 2
7 */
8
9#include <linux/platform_device.h>
178980f9 10#include <linux/io.h>
9a47a8dc 11#include <linux/mfd/dbx500-prcmu.h>
7ed00af7 12#include <linux/clksrc-dbx500-prcmu.h>
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13#include <linux/sys_soc.h>
14#include <linux/err.h>
15#include <linux/slab.h>
16#include <linux/stat.h>
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17#include <linux/of.h>
18#include <linux/of_irq.h>
1ae32557 19#include <linux/irq.h>
0529e315 20#include <linux/irqchip.h>
520f7bd7 21#include <linux/irqchip/arm-gic.h>
ebc96db7 22#include <linux/platform_data/clk-ux500.h>
1e22a8c6 23#include <linux/platform_data/arm-ux500-pm.h>
178980f9 24
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25#include <asm/mach/map.h>
26
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27#include "setup.h"
28#include "devices.h"
178980f9 29
0ddf855a 30#include "board-mop500.h"
174e7796 31#include "db8500-regs.h"
7a4f2609 32#include "id.h"
0ddf855a 33
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34void ux500_restart(enum reboot_mode mode, const char *cmd)
35{
36 local_irq_disable();
37 local_fiq_disable();
38
39 prcmu_system_reset(0);
40}
41
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42/*
43 * FIXME: Should we set up the GPIO domain here?
44 *
45 * The problem is that we cannot put the interrupt resources into the platform
46 * device until the irqdomain has been added. Right now, we set the GIC interrupt
47 * domain from init_irq(), then load the gpio driver from
48 * core_initcall(nmk_gpio_init) and add the platform devices from
49 * arch_initcall(customize_machine).
50 *
51 * This feels fragile because it depends on the gpio device getting probed
52 * _before_ any device uses the gpio interrupts.
53*/
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54void __init ux500_init_irq(void)
55{
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56 void __iomem *dist_base;
57 void __iomem *cpu_base;
58
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59 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
60
e1bbb55d 61 if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
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62 dist_base = __io_address(U8500_GIC_DIST_BASE);
63 cpu_base = __io_address(U8500_GIC_CPU_BASE);
64 } else
65 ux500_unknown_soc();
66
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67#ifdef CONFIG_OF
68 if (of_have_populated_dt())
0529e315 69 irqchip_init();
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70 else
71#endif
72 gic_init(0, 29, dist_base, cpu_base);
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73
74 /*
75 * Init clocks here so that they are available for system timer
76 * initialization.
77 */
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78 if (cpu_is_u8500_family()) {
79 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
1e22a8c6 80 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
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81
82 if (of_have_populated_dt())
83 u8500_of_clk_init(U8500_CLKRST1_BASE,
84 U8500_CLKRST2_BASE,
85 U8500_CLKRST3_BASE,
86 U8500_CLKRST5_BASE,
87 U8500_CLKRST6_BASE);
88 else
89 u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
90 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
91 U8500_CLKRST6_BASE);
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92 } else if (cpu_is_u9540()) {
93 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
1e22a8c6 94 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
1237e598 95 u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
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96 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
97 U8500_CLKRST6_BASE);
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98 } else if (cpu_is_u8540()) {
99 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
1e22a8c6 100 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
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101 u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
102 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
103 U8500_CLKRST6_BASE);
9a47a8dc 104 }
178980f9 105}
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106
107static const char * __init ux500_get_machine(void)
108{
109 return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
110}
111
112static const char * __init ux500_get_family(void)
113{
114 return kasprintf(GFP_KERNEL, "ux500");
115}
116
117static const char * __init ux500_get_revision(void)
118{
119 unsigned int rev = dbx500_revision();
120
121 if (rev == 0x01)
122 return kasprintf(GFP_KERNEL, "%s", "ED");
123 else if (rev >= 0xA0)
124 return kasprintf(GFP_KERNEL, "%d.%d",
125 (rev >> 4) - 0xA + 1, rev & 0xf);
126
127 return kasprintf(GFP_KERNEL, "%s", "Unknown");
128}
129
130static ssize_t ux500_get_process(struct device *dev,
131 struct device_attribute *attr,
132 char *buf)
133{
134 if (dbx500_id.process == 0x00)
135 return sprintf(buf, "Standard\n");
136
137 return sprintf(buf, "%02xnm\n", dbx500_id.process);
138}
139
140static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr,
141 const char *soc_id)
142{
143 soc_dev_attr->soc_id = soc_id;
144 soc_dev_attr->machine = ux500_get_machine();
145 soc_dev_attr->family = ux500_get_family();
146 soc_dev_attr->revision = ux500_get_revision();
147}
148
149struct device_attribute ux500_soc_attr =
150 __ATTR(process, S_IRUGO, ux500_get_process, NULL);
151
152struct device * __init ux500_soc_device_init(const char *soc_id)
153{
154 struct device *parent;
155 struct soc_device *soc_dev;
156 struct soc_device_attribute *soc_dev_attr;
157
158 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
159 if (!soc_dev_attr)
160 return ERR_PTR(-ENOMEM);
161
162 soc_info_populate(soc_dev_attr, soc_id);
163
164 soc_dev = soc_device_register(soc_dev_attr);
b269b170 165 if (IS_ERR(soc_dev)) {
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166 kfree(soc_dev_attr);
167 return NULL;
168 }
169
170 parent = soc_device_to_device(soc_dev);
b269b170 171 device_create_file(parent, &ux500_soc_attr);
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172
173 return parent;
174}
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