ARM: ux500: enable AB8500 GPIO for HREF
[deliverable/linux.git] / arch / arm / mach-ux500 / devices-db8500.h
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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL), version 2.
6 */
7
8#ifndef __DEVICES_DB8500_H
9#define __DEVICES_DB8500_H
10
2cdda350 11#include <linux/platform_data/usb-musb-ux500.h>
c3b9d1db 12#include <mach/irqs.h>
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13#include "devices-common.h"
14
15struct ske_keypad_platform_data;
16struct pl022_ssp_controller;
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17struct platform_device;
18
19extern struct ab8500_platform_data ab8500_platdata;
20extern struct prcmu_pdata db8500_prcmu_pdata;
21extern struct platform_device db8500_prcmu_device;
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22
23static inline struct platform_device *
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24db8500_add_ske_keypad(struct device *parent,
25 struct ske_keypad_platform_data *pdata,
26 size_t size)
fbf1eadf 27{
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28 struct resource resources[] = {
29 DEFINE_RES_MEM(U8500_SKE_BASE, SZ_4K),
30 DEFINE_RES_IRQ(IRQ_DB8500_KB),
31 };
32
33 return platform_device_register_resndata(parent, "nmk-ske-keypad", -1,
34 resources, 2, pdata, size);
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35}
36
37static inline struct amba_device *
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38db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
39 int irq, struct pl022_ssp_controller *pdata)
fbf1eadf 40{
08956a0e 41 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
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42}
43
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44#define db8500_add_i2c0(parent, pdata) \
45 dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
46#define db8500_add_i2c1(parent, pdata) \
47 dbx500_add_i2c(parent, 1, U8500_I2C1_BASE, IRQ_DB8500_I2C1, pdata)
48#define db8500_add_i2c2(parent, pdata) \
49 dbx500_add_i2c(parent, 2, U8500_I2C2_BASE, IRQ_DB8500_I2C2, pdata)
50#define db8500_add_i2c3(parent, pdata) \
51 dbx500_add_i2c(parent, 3, U8500_I2C3_BASE, IRQ_DB8500_I2C3, pdata)
52#define db8500_add_i2c4(parent, pdata) \
53 dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
54
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55#define db8500_add_msp0_spi(parent, pdata) \
56 dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \
57 IRQ_DB8500_MSP0, pdata)
58#define db8500_add_msp1_spi(parent, pdata) \
59 dbx500_add_msp_spi(parent, "msp1", U8500_MSP1_BASE, \
60 IRQ_DB8500_MSP1, pdata)
61#define db8500_add_msp2_spi(parent, pdata) \
62 dbx500_add_msp_spi(parent, "msp2", U8500_MSP2_BASE, \
63 IRQ_DB8500_MSP2, pdata)
64#define db8500_add_msp3_spi(parent, pdata) \
65 dbx500_add_msp_spi(parent, "msp3", U8500_MSP3_BASE, \
66 IRQ_DB8500_MSP1, pdata)
67
68#define db8500_add_rtc(parent) \
69 dbx500_add_rtc(parent, U8500_RTC_BASE, IRQ_DB8500_RTC);
70
71#define db8500_add_usb(parent, rx_cfg, tx_cfg) \
72 ux500_add_usb(parent, U8500_USBOTG_BASE, \
73 IRQ_DB8500_USBOTG, rx_cfg, tx_cfg)
74
75#define db8500_add_sdi0(parent, pdata, pid) \
76 dbx500_add_sdi(parent, "sdi0", U8500_SDI0_BASE, \
77 IRQ_DB8500_SDMMC0, pdata, pid)
78#define db8500_add_sdi1(parent, pdata, pid) \
79 dbx500_add_sdi(parent, "sdi1", U8500_SDI1_BASE, \
80 IRQ_DB8500_SDMMC1, pdata, pid)
81#define db8500_add_sdi2(parent, pdata, pid) \
82 dbx500_add_sdi(parent, "sdi2", U8500_SDI2_BASE, \
83 IRQ_DB8500_SDMMC2, pdata, pid)
84#define db8500_add_sdi3(parent, pdata, pid) \
85 dbx500_add_sdi(parent, "sdi3", U8500_SDI3_BASE, \
86 IRQ_DB8500_SDMMC3, pdata, pid)
87#define db8500_add_sdi4(parent, pdata, pid) \
88 dbx500_add_sdi(parent, "sdi4", U8500_SDI4_BASE, \
89 IRQ_DB8500_SDMMC4, pdata, pid)
90#define db8500_add_sdi5(parent, pdata, pid) \
91 dbx500_add_sdi(parent, "sdi5", U8500_SDI5_BASE, \
92 IRQ_DB8500_SDMMC5, pdata, pid)
93
94#define db8500_add_ssp0(parent, pdata) \
95 db8500_add_ssp(parent, "ssp0", U8500_SSP0_BASE, \
96 IRQ_DB8500_SSP0, pdata)
97#define db8500_add_ssp1(parent, pdata) \
98 db8500_add_ssp(parent, "ssp1", U8500_SSP1_BASE, \
99 IRQ_DB8500_SSP1, pdata)
100
101#define db8500_add_spi0(parent, pdata) \
102 dbx500_add_spi(parent, "spi0", U8500_SPI0_BASE, \
103 IRQ_DB8500_SPI0, pdata, 0)
104#define db8500_add_spi1(parent, pdata) \
105 dbx500_add_spi(parent, "spi1", U8500_SPI1_BASE, \
106 IRQ_DB8500_SPI1, pdata, 0)
107#define db8500_add_spi2(parent, pdata) \
108 dbx500_add_spi(parent, "spi2", U8500_SPI2_BASE, \
109 IRQ_DB8500_SPI2, pdata, 0)
110#define db8500_add_spi3(parent, pdata) \
111 dbx500_add_spi(parent, "spi3", U8500_SPI3_BASE, \
112 IRQ_DB8500_SPI3, pdata, 0)
113
114#define db8500_add_uart0(parent, pdata) \
115 dbx500_add_uart(parent, "uart0", U8500_UART0_BASE, \
116 IRQ_DB8500_UART0, pdata)
117#define db8500_add_uart1(parent, pdata) \
118 dbx500_add_uart(parent, "uart1", U8500_UART1_BASE, \
119 IRQ_DB8500_UART1, pdata)
120#define db8500_add_uart2(parent, pdata) \
121 dbx500_add_uart(parent, "uart2", U8500_UART2_BASE, \
122 IRQ_DB8500_UART2, pdata)
fbf1eadf 123
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124#define db8500_add_cryp1(parent, pdata) \
125 dbx500_add_cryp1(parent, -1, U8500_CRYP1_BASE, IRQ_DB8500_CRYP1, pdata)
126#define db8500_add_hash1(parent, pdata) \
127 dbx500_add_hash1(parent, -1, U8500_HASH1_BASE, pdata)
fbf1eadf 128#endif
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