Commit | Line | Data |
---|---|---|
21278aea | 1 | menuconfig ARCH_VEXPRESS |
e3246542 MY |
2 | bool "ARM Ltd. Versatile Express family" |
3 | depends on ARCH_MULTI_V7 | |
98dec91f | 4 | select ARCH_SUPPORTS_BIG_ENDIAN |
61727630 | 5 | select ARM_AMBA |
fef88f10 | 6 | select ARM_GIC |
7e13c654 | 7 | select ARM_GLOBAL_TIMER |
61727630 | 8 | select ARM_TIMER_SP804 |
38669e04 | 9 | select COMMON_CLK_VERSATILE |
5c34a4e8 | 10 | select GPIOLIB |
4c3ffffd | 11 | select HAVE_ARM_SCU if SMP |
a894fcc2 | 12 | select HAVE_ARM_TWD if SMP |
61727630 | 13 | select HAVE_PATA_PLATFORM |
61727630 | 14 | select ICST |
ce816fa8 | 15 | select NO_IOPORT_MAP |
61727630 | 16 | select PLAT_VERSATILE |
2655f51d CM |
17 | select POWER_RESET |
18 | select POWER_RESET_VEXPRESS | |
19 | select POWER_SUPPLY | |
1f1dd588 | 20 | select REGULATOR if MMC_ARMMMCI |
61727630 | 21 | select REGULATOR_FIXED_VOLTAGE if REGULATOR |
38669e04 | 22 | select VEXPRESS_CONFIG |
b33cdd28 AB |
23 | select VEXPRESS_SYSCFG |
24 | select MFD_VEXPRESS_SYSREG | |
8deed178 | 25 | help |
8deed178 PM |
26 | This option enables support for systems using Cortex processor based |
27 | ARM core and logic (FPGA) tiles on the Versatile Express motherboard, | |
28 | for example: | |
29 | ||
30 | - CoreTile Express A5x2 (V2P-CA5s) | |
31 | - CoreTile Express A9x4 (V2P-CA9) | |
32 | - CoreTile Express A15x2 (V2P-CA15) | |
33 | - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs | |
34 | (Soft Macrocell Models) | |
35 | - Versatile Express RTSMs (Models) | |
36 | ||
37 | You must boot using a Flattened Device Tree in order to use these | |
38 | platforms. The traditional (ATAGs) boot method is not usable on | |
39 | these boards with this option. | |
40 | ||
21278aea | 41 | if ARCH_VEXPRESS |
61727630 RH |
42 | |
43 | config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA | |
44 | bool "Enable A5 and A9 only errata work-arounds" | |
45 | default y | |
f6ac49ba | 46 | select ARM_ERRATA_643719 if SMP |
61727630 | 47 | select ARM_ERRATA_720789 |
a641f3a6 | 48 | select PL310_ERRATA_753970 if CACHE_L2X0 |
61727630 RH |
49 | help |
50 | Provides common dependencies for Versatile Express platforms | |
51 | based on Cortex-A5 and Cortex-A9 processors. In order to | |
52 | build a working kernel, you must also enable relevant core | |
53 | tile support or Flattened Device Tree based support options. | |
54 | ||
1e904e1b NP |
55 | config ARCH_VEXPRESS_DCSCB |
56 | bool "Dual Cluster System Control Block (DCSCB) support" | |
57 | depends on MCPM | |
ee8e5d5f | 58 | select ARM_CCI400_PORT_CTRL |
1e904e1b NP |
59 | help |
60 | Support for the Dual Cluster System Configuration Block (DCSCB). | |
61 | This is needed to provide CPU and cluster power management | |
62 | on RTSM implementing big.LITTLE. | |
63 | ||
f7cd2d83 SK |
64 | config ARCH_VEXPRESS_SPC |
65 | bool "Versatile Express Serial Power Controller (SPC)" | |
f7cd2d83 SK |
66 | select PM_OPP |
67 | help | |
68 | The TC2 (A15x2 A7x3) versatile express core tile integrates a logic | |
69 | block called Serial Power Controller (SPC) that provides the interface | |
70 | between the dual cluster test-chip and the M3 microcontroller that | |
71 | carries out power management. | |
72 | ||
11b277ea NP |
73 | config ARCH_VEXPRESS_TC2_PM |
74 | bool "Versatile Express TC2 power management" | |
75 | depends on MCPM | |
ee8e5d5f | 76 | select ARM_CCI400_PORT_CTRL |
f7cd2d83 | 77 | select ARCH_VEXPRESS_SPC |
95fcedb0 | 78 | select ARM_CPU_SUSPEND |
11b277ea NP |
79 | help |
80 | Support for CPU and cluster power management on Versatile Express | |
81 | with a TC2 (A15x2 A7x3) big.LITTLE core tile. | |
82 | ||
21278aea | 83 | endif |