ARM: zynq: remove TTC early mapping
[deliverable/linux.git] / arch / arm / mach-zynq / common.c
CommitLineData
b85a3ef4
JL
1/*
2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/cpumask.h>
20#include <linux/platform_device.h>
21#include <linux/clk.h>
0f586fbf
JC
22#include <linux/clk/zynq.h>
23#include <linux/of_address.h>
b85a3ef4
JL
24#include <linux/of_irq.h>
25#include <linux/of_platform.h>
3d64b449 26#include <linux/of.h>
b85a3ef4 27
3d64b449 28#include <asm/mach/arch.h>
b85a3ef4 29#include <asm/mach/map.h>
03e07595 30#include <asm/mach/time.h>
3d64b449 31#include <asm/mach-types.h>
b85a3ef4
JL
32#include <asm/page.h>
33#include <asm/hardware/gic.h>
34#include <asm/hardware/cache-l2x0.h>
35
36#include <mach/zynq_soc.h>
b85a3ef4
JL
37#include "common.h"
38
39static struct of_device_id zynq_of_bus_ids[] __initdata = {
40 { .compatible = "simple-bus", },
41 {}
42};
43
44/**
45 * xilinx_init_machine() - System specific initialization, intended to be
46 * called from board specific initialization.
47 */
3d64b449 48static void __init xilinx_init_machine(void)
b85a3ef4 49{
b85a3ef4
JL
50 /*
51 * 64KB way size, 8-way associativity, parity disabled
52 */
0fcfdbca 53 l2x0_of_init(0x02060000, 0xF0F0FFFF);
b85a3ef4
JL
54
55 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
56}
57
f447ed2d
JC
58static struct of_device_id irq_match[] __initdata = {
59 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
60 { }
61};
62
b85a3ef4
JL
63/**
64 * xilinx_irq_init() - Interrupt controller initialization for the GIC.
65 */
3d64b449 66static void __init xilinx_irq_init(void)
b85a3ef4 67{
f447ed2d 68 of_irq_init(irq_match);
b85a3ef4
JL
69}
70
71/* The minimum devices needed to be mapped before the VM system is up and
72 * running include the GIC, UART and Timer Counter.
73 */
74
75static struct map_desc io_desc[] __initdata = {
76 {
b85a3ef4
JL
77 .virtual = SCU_PERIPH_VIRT,
78 .pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
f5800776 79 .length = SCU_PERIPH_SIZE,
b85a3ef4 80 .type = MT_DEVICE,
b85a3ef4
JL
81 },
82
83#ifdef CONFIG_DEBUG_LL
84 {
aaf5e0be
NB
85 .virtual = LL_UART_VADDR,
86 .pfn = __phys_to_pfn(LL_UART_PADDR),
87 .length = UART_SIZE,
b85a3ef4
JL
88 .type = MT_DEVICE,
89 },
90#endif
91
92};
93
03e07595
JC
94static void __init xilinx_zynq_timer_init(void)
95{
0f586fbf
JC
96 struct device_node *np;
97 void __iomem *slcr;
98
99 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
100 slcr = of_iomap(np, 0);
101 WARN_ON(!slcr);
102
103 xilinx_zynq_clocks_init(slcr);
104
03e07595
JC
105 xttcpss_timer_init();
106}
107
108/*
109 * Instantiate and initialize the system timer structure
110 */
111static struct sys_timer xttcpss_sys_timer = {
112 .init = xilinx_zynq_timer_init,
113};
114
b85a3ef4
JL
115/**
116 * xilinx_map_io() - Create memory mappings needed for early I/O.
117 */
3d64b449 118static void __init xilinx_map_io(void)
b85a3ef4
JL
119{
120 iotable_init(io_desc, ARRAY_SIZE(io_desc));
121}
3d64b449
AB
122
123static const char *xilinx_dt_match[] = {
e06f1a9e
JC
124 "xlnx,zynq-zc702",
125 "xlnx,zynq-7000",
3d64b449
AB
126 NULL
127};
128
129MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
130 .map_io = xilinx_map_io,
131 .init_irq = xilinx_irq_init,
368b8e25 132 .handle_irq = gic_handle_irq,
3d64b449
AB
133 .init_machine = xilinx_init_machine,
134 .timer = &xttcpss_sys_timer,
135 .dt_compat = xilinx_dt_match,
136MACHINE_END
This page took 0.115973 seconds and 5 git commands to generate.