Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | # |
2 | # Makefile for the linux arm-specific parts of the memory manager. | |
3 | # | |
4 | ||
0ddbccd1 | 5 | obj-y := dma-mapping.o extable.o fault.o init.o \ |
092c1952 | 6 | iomap.o |
1da177e4 | 7 | |
614dd058 | 8 | obj-$(CONFIG_MMU) += fault-armv.o flush.o idmap.o ioremap.o \ |
4e802cfd | 9 | mmap.o pgd.o mmu.o pageattr.o |
5924486d RK |
10 | |
11 | ifneq ($(CONFIG_MMU),y) | |
12 | obj-y += nommu.o | |
13 | endif | |
14 | ||
1fd15b87 | 15 | obj-$(CONFIG_ARM_PTDUMP) += dump.o |
1da177e4 LT |
16 | obj-$(CONFIG_MODULES) += proc-syms.o |
17 | ||
18 | obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o | |
d73cd428 | 19 | obj-$(CONFIG_HIGHMEM) += highmem.o |
1355e2a6 | 20 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o |
d8dc7fbd | 21 | obj-$(CONFIG_ARM_PV_FIXUP) += pv-fixup-asm.o |
1da177e4 | 22 | |
0f45d7f3 | 23 | obj-$(CONFIG_CPU_ABRT_NOMMU) += abort-nommu.o |
1da177e4 LT |
24 | obj-$(CONFIG_CPU_ABRT_EV4) += abort-ev4.o |
25 | obj-$(CONFIG_CPU_ABRT_EV4T) += abort-ev4t.o | |
26 | obj-$(CONFIG_CPU_ABRT_LV4T) += abort-lv4t.o | |
27 | obj-$(CONFIG_CPU_ABRT_EV5T) += abort-ev5t.o | |
28 | obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o | |
29 | obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o | |
23688e99 | 30 | obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o |
1da177e4 | 31 | |
aff7b4f8 RK |
32 | AFLAGS_abort-ev6.o :=-Wa,-march=armv6k |
33 | AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a | |
34 | ||
4fb28474 KS |
35 | obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o |
36 | obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o | |
37 | obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o | |
38 | ||
1da177e4 LT |
39 | obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o |
40 | obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o | |
41 | obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o | |
42 | obj-$(CONFIG_CPU_CACHE_V6) += cache-v6.o | |
23688e99 | 43 | obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o |
28853ac8 | 44 | obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o |
4477ca45 | 45 | obj-$(CONFIG_CPU_CACHE_NOP) += cache-nop.o |
bc0ee9d2 | 46 | obj-$(CONFIG_CPU_CACHE_V7M) += cache-v7m.o |
1da177e4 | 47 | |
aff7b4f8 RK |
48 | AFLAGS_cache-v6.o :=-Wa,-march=armv6 |
49 | AFLAGS_cache-v7.o :=-Wa,-march=armv7-a | |
bc0ee9d2 | 50 | AFLAGS_cache-v7m.o :=-Wa,-march=armv7-m |
aff7b4f8 | 51 | |
1da177e4 LT |
52 | obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o |
53 | obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o | |
0ed15071 | 54 | obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o |
d84b4711 | 55 | obj-$(CONFIG_CPU_COPY_V6) += copypage-v6.o context.o |
1da177e4 LT |
56 | obj-$(CONFIG_CPU_SA1100) += copypage-v4mc.o |
57 | obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o | |
23bdf86a | 58 | obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o |
28853ac8 | 59 | obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o |
1da177e4 | 60 | |
90543ec8 AB |
61 | CFLAGS_copypage-feroceon.o := -march=armv5te |
62 | ||
1da177e4 LT |
63 | obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o |
64 | obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o | |
65 | obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o | |
99c6dc11 | 66 | obj-$(CONFIG_CPU_TLB_FEROCEON) += tlb-v4wbi.o # reuse v4wbi TLB functions |
1da177e4 | 67 | obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o |
2ccdd1e7 | 68 | obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o |
28853ac8 | 69 | obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o |
1da177e4 | 70 | |
aff7b4f8 RK |
71 | AFLAGS_tlb-v6.o :=-Wa,-march=armv6 |
72 | AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a | |
73 | ||
07e0da78 | 74 | obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o |
1da177e4 | 75 | obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o |
b731c311 | 76 | obj-$(CONFIG_CPU_ARM740T) += proc-arm740.o |
43f5f014 | 77 | obj-$(CONFIG_CPU_ARM9TDMI) += proc-arm9tdmi.o |
1da177e4 LT |
78 | obj-$(CONFIG_CPU_ARM920T) += proc-arm920.o |
79 | obj-$(CONFIG_CPU_ARM922T) += proc-arm922.o | |
80 | obj-$(CONFIG_CPU_ARM925T) += proc-arm925.o | |
81 | obj-$(CONFIG_CPU_ARM926T) += proc-arm926.o | |
d60674eb | 82 | obj-$(CONFIG_CPU_ARM940T) += proc-arm940.o |
f37f46eb | 83 | obj-$(CONFIG_CPU_ARM946E) += proc-arm946.o |
28853ac8 | 84 | obj-$(CONFIG_CPU_FA526) += proc-fa526.o |
1da177e4 LT |
85 | obj-$(CONFIG_CPU_ARM1020) += proc-arm1020.o |
86 | obj-$(CONFIG_CPU_ARM1020E) += proc-arm1020e.o | |
87 | obj-$(CONFIG_CPU_ARM1022) += proc-arm1022.o | |
88 | obj-$(CONFIG_CPU_ARM1026) += proc-arm1026.o | |
89 | obj-$(CONFIG_CPU_SA110) += proc-sa110.o | |
90 | obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o | |
91 | obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o | |
23bdf86a | 92 | obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o |
49cbe786 | 93 | obj-$(CONFIG_CPU_MOHAWK) += proc-mohawk.o |
e50d6409 | 94 | obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o |
a6c61e9d | 95 | obj-$(CONFIG_CPU_V6) += proc-v6.o |
e399b1a4 | 96 | obj-$(CONFIG_CPU_V6K) += proc-v6.o |
23688e99 | 97 | obj-$(CONFIG_CPU_V7) += proc-v7.o |
4477ca45 | 98 | obj-$(CONFIG_CPU_V7M) += proc-v7m.o |
382266ad | 99 | |
aff7b4f8 RK |
100 | AFLAGS_proc-v6.o :=-Wa,-march=armv6 |
101 | AFLAGS_proc-v7.o :=-Wa,-march=armv7-a | |
102 | ||
1f1d5b74 | 103 | obj-$(CONFIG_OUTER_CACHE) += l2c-common.o |
99c6dc11 | 104 | obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o |
de7e7532 | 105 | obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o l2c-l2x0-resume.o |
b828f960 | 106 | obj-$(CONFIG_CACHE_L2X0_PMU) += cache-l2x0-pmu.o |
20072fd0 | 107 | obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o |
573a652f | 108 | obj-$(CONFIG_CACHE_TAUROS2) += cache-tauros2.o |
e7ecbc05 | 109 | obj-$(CONFIG_CACHE_UNIPHIER) += cache-uniphier.o |