projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | #include <linux/linkage.h> |
| 2 | #include <asm/assembler.h> | |
| 3a1e5015 | 3 | #include "abort-macro.S" |
| 1da177e4 LT |
4 | /* |
| 5 | * Function: v6_early_abort | |
| 6 | * | |
| da740472 RK |
7 | * Params : r2 = pt_regs |
| 8 | * : r4 = aborted context pc | |
| 3e287bec | 9 | * : r5 = aborted context psr |
| 1da177e4 | 10 | * |
| da740472 | 11 | * Returns : r4 - r11, r13 preserved |
| 1da177e4 LT |
12 | * |
| 13 | * Purpose : obtain information about current aborted instruction. | |
| 3a1e5015 GD |
14 | * Note: we read user space. This means we might cause a data |
| 15 | * abort here if the I-TLB and D-TLB aren't seeing the same | |
| 16 | * picture. Unfortunately, this does happen. We live with it. | |
| 1da177e4 LT |
17 | */ |
| 18 | .align 5 | |
| 19 | ENTRY(v6_early_abort) | |
| 20 | mrc p15, 0, r1, c5, c0, 0 @ get FSR | |
| 21 | mrc p15, 0, r0, c6, c0, 0 @ get FAR | |
| 3a1e5015 | 22 | /* |
| f0c4b8d6 | 23 | * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR. |
| 3a1e5015 | 24 | */ |
| f0c4b8d6 WD |
25 | #ifdef CONFIG_ARM_ERRATA_326103 |
| 26 | ldr ip, =0x4107b36 | |
| 27 | mrc p15, 0, r3, c0, c0, 0 @ get processor id | |
| 28 | teq ip, r3, lsr #4 @ r0 ARM1136? | |
| 29 | bne do_DataAbort | |
| 3e287bec | 30 | tst r5, #PSR_J_BIT @ Java? |
| f0c4b8d6 | 31 | tsteq r5, #PSR_T_BIT @ Thumb? |
| da740472 | 32 | bne do_DataAbort |
| f0c4b8d6 WD |
33 | bic r1, r1, #1 << 11 @ clear bit 11 of FSR |
| 34 | ldr r3, [r4] @ read aborted ARM instruction | |
| 457c2403 BD |
35 | ARM_BE8(rev r3, r3) |
| 36 | ||
| 0d147db0 | 37 | do_ldrd_abort tmp=ip, insn=r3 |
| 3a1e5015 GD |
38 | tst r3, #1 << 20 @ L = 0 -> write |
| 39 | orreq r1, r1, #1 << 11 @ yes. | |
| f0c4b8d6 | 40 | #endif |
| da740472 | 41 | b do_DataAbort |