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1 | /* |
2 | * linux/arch/arm/lib/copypage-xscale.S | |
3 | * | |
4 | * Copyright (C) 1995-2005 Russell King | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This handles the mini data cache, as found on SA11x0 and XScale | |
11 | * processors. When we copy a user page page, we map it in such a way | |
12 | * that accesses to this page will not touch the main data cache, but | |
13 | * will be cached in the mini data cache. This prevents us thrashing | |
14 | * the main data cache on page faults. | |
15 | */ | |
16 | #include <linux/init.h> | |
17 | #include <linux/mm.h> | |
063b0a42 | 18 | #include <linux/highmem.h> |
f8f98a93 | 19 | |
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20 | #include <asm/pgtable.h> |
21 | #include <asm/tlbflush.h> | |
1c9d3df5 | 22 | #include <asm/cacheflush.h> |
f8f98a93 | 23 | |
1b2e2b73 RK |
24 | #include "mm.h" |
25 | ||
f8f98a93 | 26 | #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ |
bb30f36f | 27 | L_PTE_MT_MINICACHE) |
f8f98a93 | 28 | |
bd31b859 | 29 | static DEFINE_RAW_SPINLOCK(minicache_lock); |
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30 | |
31 | /* | |
063b0a42 | 32 | * XScale mini-dcache optimised copy_user_highpage |
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33 | * |
34 | * We flush the destination cache lines just before we write the data into the | |
35 | * corresponding address. Since the Dcache is read-allocate, this removes the | |
36 | * Dcache aliasing issue. The writes will be forwarded to the write buffer, | |
37 | * and merged as appropriate. | |
38 | */ | |
446c92b2 | 39 | static void __naked |
f8f98a93 RK |
40 | mc_copy_user_page(void *from, void *to) |
41 | { | |
42 | /* | |
43 | * Strangely enough, best performance is achieved | |
44 | * when prefetching destination as well. (NP) | |
45 | */ | |
46 | asm volatile( | |
47 | "stmfd sp!, {r4, r5, lr} \n\ | |
48 | mov lr, %2 \n\ | |
49 | pld [r0, #0] \n\ | |
50 | pld [r0, #32] \n\ | |
51 | pld [r1, #0] \n\ | |
52 | pld [r1, #32] \n\ | |
53 | 1: pld [r0, #64] \n\ | |
54 | pld [r0, #96] \n\ | |
55 | pld [r1, #64] \n\ | |
56 | pld [r1, #96] \n\ | |
57 | 2: ldrd r2, [r0], #8 \n\ | |
58 | ldrd r4, [r0], #8 \n\ | |
59 | mov ip, r1 \n\ | |
60 | strd r2, [r1], #8 \n\ | |
61 | ldrd r2, [r0], #8 \n\ | |
62 | strd r4, [r1], #8 \n\ | |
63 | ldrd r4, [r0], #8 \n\ | |
64 | strd r2, [r1], #8 \n\ | |
65 | strd r4, [r1], #8 \n\ | |
66 | mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\ | |
67 | ldrd r2, [r0], #8 \n\ | |
68 | mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ | |
69 | ldrd r4, [r0], #8 \n\ | |
70 | mov ip, r1 \n\ | |
71 | strd r2, [r1], #8 \n\ | |
72 | ldrd r2, [r0], #8 \n\ | |
73 | strd r4, [r1], #8 \n\ | |
74 | ldrd r4, [r0], #8 \n\ | |
75 | strd r2, [r1], #8 \n\ | |
76 | strd r4, [r1], #8 \n\ | |
77 | mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\ | |
78 | subs lr, lr, #1 \n\ | |
79 | mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ | |
80 | bgt 1b \n\ | |
81 | beq 2b \n\ | |
82 | ldmfd sp!, {r4, r5, pc} " | |
83 | : | |
84 | : "r" (from), "r" (to), "I" (PAGE_SIZE / 64 - 1)); | |
85 | } | |
86 | ||
063b0a42 | 87 | void xscale_mc_copy_user_highpage(struct page *to, struct page *from, |
f00a75c0 | 88 | unsigned long vaddr, struct vm_area_struct *vma) |
f8f98a93 | 89 | { |
5472e862 | 90 | void *kto = kmap_atomic(to); |
1c9d3df5 | 91 | |
c0177800 | 92 | if (!test_and_set_bit(PG_dcache_clean, &from->flags)) |
063b0a42 | 93 | __flush_dcache_page(page_mapping(from), from); |
1c9d3df5 | 94 | |
bd31b859 | 95 | raw_spin_lock(&minicache_lock); |
f8f98a93 | 96 | |
67ece144 | 97 | set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot)); |
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98 | |
99 | mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto); | |
100 | ||
bd31b859 | 101 | raw_spin_unlock(&minicache_lock); |
063b0a42 | 102 | |
5472e862 | 103 | kunmap_atomic(kto); |
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104 | } |
105 | ||
106 | /* | |
107 | * XScale optimised clear_user_page | |
108 | */ | |
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109 | void |
110 | xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr) | |
f8f98a93 | 111 | { |
5472e862 | 112 | void *ptr, *kaddr = kmap_atomic(page); |
f8f98a93 | 113 | asm volatile( |
43ae286b | 114 | "mov r1, %2 \n\ |
f8f98a93 RK |
115 | mov r2, #0 \n\ |
116 | mov r3, #0 \n\ | |
303c6443 RK |
117 | 1: mov ip, %0 \n\ |
118 | strd r2, [%0], #8 \n\ | |
119 | strd r2, [%0], #8 \n\ | |
120 | strd r2, [%0], #8 \n\ | |
121 | strd r2, [%0], #8 \n\ | |
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122 | mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\ |
123 | subs r1, r1, #1 \n\ | |
124 | mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ | |
303c6443 | 125 | bne 1b" |
43ae286b NP |
126 | : "=r" (ptr) |
127 | : "0" (kaddr), "I" (PAGE_SIZE / 32) | |
303c6443 | 128 | : "r1", "r2", "r3", "ip"); |
5472e862 | 129 | kunmap_atomic(kaddr); |
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130 | } |
131 | ||
132 | struct cpu_user_fns xscale_mc_user_fns __initdata = { | |
303c6443 | 133 | .cpu_clear_user_highpage = xscale_mc_clear_user_highpage, |
063b0a42 | 134 | .cpu_copy_user_highpage = xscale_mc_copy_user_highpage, |
f8f98a93 | 135 | }; |