Merge tag 'sunxi-dt-for-4.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / arm / nwfpe / entry.S
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1/*
2 NetWinder Floating Point Emulator
3 (c) Rebel.COM, 1998
4 (c) 1998, 1999 Philip Blundell
5
6 Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
6ebbf2ce 22#include <asm/assembler.h>
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LL
23#include <asm/opcodes.h>
24
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25/* This is the kernel's entry point into the floating point emulator.
26It is called from the kernel with code similar to this:
27
28 sub r4, r5, #4
29 ldrt r0, [r4] @ r0 = instruction
30 adrsvc al, r9, ret_from_exception @ r9 = normal FP return
31 adrsvc al, lr, fpundefinstr @ lr = undefined instr return
32
33 get_current_task r10
34 mov r8, #1
35 strb r8, [r10, #TSK_USED_MATH] @ set current->used_math
36 add r10, r10, #TSS_FPESAVE @ r10 = workspace
37 ldr r4, .LC2
38 ldr pc, [r4] @ Call FP emulator entry point
39
40The kernel expects the emulator to return via one of two possible
41points of return it passes to the emulator. The emulator, if
42successful in its emulation, jumps to ret_from_exception (passed in
43r9) and the kernel takes care of returning control from the trap to
44the user code. If the emulator is unable to emulate the instruction,
45it returns via _fpundefinstr (passed via lr) and the kernel halts the
46user program with a core dump.
47
48On entry to the emulator r10 points to an area of private FP workspace
49reserved in the thread structure for this process. This is where the
50emulator saves its registers across calls. The first word of this area
51is used as a flag to detect the first time a process uses floating point,
52so that the emulator startup cost can be avoided for tasks that don't
53want it.
54
55This routine does three things:
56
571) The kernel has created a struct pt_regs on the stack and saved the
58user registers into it. See /usr/include/asm/proc/ptrace.h for details.
59
602) It calls EmulateAll to emulate a floating point instruction.
61EmulateAll returns 1 if the emulation was successful, or 0 if not.
62
633) If an instruction has been emulated successfully, it looks ahead at
64the next instruction. If it is a floating point instruction, it
65executes the instruction, without returning to user space. In this
66way it repeatedly looks ahead and executes floating point instructions
67until it encounters a non floating point instruction, at which time it
68returns via _fpreturn.
69
70This is done to reduce the effect of the trap overhead on each
71floating point instructions. GCC attempts to group floating point
72instructions to allow the emulator to spread the cost of the trap over
73several floating point instructions. */
74
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75#include <asm/asm-offsets.h>
76
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77 .globl nwfpe_enter
78nwfpe_enter:
79 mov r4, lr @ save the failure-return addresses
80 mov sl, sp @ we access the registers via 'sl'
81
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CM
82 ldr r5, [sp, #S_PC] @ get contents of PC;
83 mov r6, r0 @ save the opcode
1da177e4 84emulate:
c1f438f5 85 ldr r1, [sp, #S_PSR] @ fetch the PSR
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86 bl arm_check_condition @ check the condition
87 cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed?
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88
89 @ if condition code failed to match, next insn
e7f626db 90 bne next @ get the next instruction;
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91
92 mov r0, r6 @ prepare for EmulateAll()
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93 bl EmulateAll @ emulate the instruction
94 cmp r0, #0 @ was emulation successful
6ebbf2ce 95 reteq r4 @ no, return failure
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96
97next:
39dc53de 98 uaccess_enable r3
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99.Lx1: ldrt r6, [r5], #4 @ get the next instruction and
100 @ increment PC
39dc53de 101 uaccess_disable r3
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102 and r2, r6, #0x0F000000 @ test for FP insns
103 teq r2, #0x0C000000
104 teqne r2, #0x0D000000
105 teqne r2, #0x0E000000
6ebbf2ce 106 retne r9 @ return ok if not a fp insn
1da177e4 107
c1f438f5 108 str r5, [sp, #S_PC] @ update PC copy in regs
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109
110 mov r0, r6 @ save a copy
c1f438f5 111 b emulate @ check condition and emulate
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112
113 @ We need to be prepared for the instructions at .Lx1 and .Lx2
114 @ to fault. Emit the appropriate exception gunk to fix things up.
115 @ ??? For some reason, faults can happen at .Lx2 even with a
116 @ plain LDR instruction. Weird, but it seems harmless.
c4a84ae3 117 .pushsection .text.fixup,"ax"
1da177e4 118 .align 2
6ebbf2ce 119.Lfix: ret r9 @ let the user eat segfaults
4260415f 120 .popsection
1da177e4 121
4260415f 122 .pushsection __ex_table,"a"
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123 .align 3
124 .long .Lx1, .Lfix
4260415f 125 .popsection
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