[deliverable/linux.git] / arch / arm / plat-omap / devices.c

/*
 * linux/arch/arm/plat-omap/devices.c
 *
 * Common platform device setup/initialization for OMAP1 and OMAP2
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>

#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>

#include <mach/tc.h>
#include <mach/board.h>
#include <mach/mmc.h>
#include <mach/mux.h>
#include <mach/gpio.h>
#include <mach/menelaus.h>
#include <mach/mcbsp.h>

#if	defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)

#include "../plat-omap/dsp/dsp_common.h"

static struct dsp_platform_data dsp_pdata = {
	.kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
};

static struct resource omap_dsp_resources[] = {
	{
		.name	= "dsp_mmu",
		.start	= -1,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device omap_dsp_device = {
	.name		= "dsp",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(omap_dsp_resources),
	.resource	= omap_dsp_resources,
	.dev = {
		.platform_data = &dsp_pdata,
	},
};

static inline void omap_init_dsp(void)
{
	struct resource *res;
	int irq;

	if (cpu_is_omap15xx())
		irq = INT_1510_DSP_MMU;
	else if (cpu_is_omap16xx())
		irq = INT_1610_DSP_MMU;
	else if (cpu_is_omap24xx())
		irq = INT_24XX_DSP_MMU;

	res = platform_get_resource_byname(&omap_dsp_device,
					   IORESOURCE_IRQ, "dsp_mmu");
	res->start = irq;

	platform_device_register(&omap_dsp_device);
}

int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
{
	static DEFINE_MUTEX(dsp_pdata_lock);

	mutex_init(&kdev->lock);

	mutex_lock(&dsp_pdata_lock);
	list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
	mutex_unlock(&dsp_pdata_lock);

	return 0;
}
EXPORT_SYMBOL(dsp_kfunc_device_register);

#else
static inline void omap_init_dsp(void) { }
#endif	/* CONFIG_OMAP_DSP */

/*-------------------------------------------------------------------------*/
#if	defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)

static void omap_init_kp(void)
{
	if (machine_is_omap_h2() || machine_is_omap_h3()) {
		omap_cfg_reg(F18_1610_KBC0);
		omap_cfg_reg(D20_1610_KBC1);
		omap_cfg_reg(D19_1610_KBC2);
		omap_cfg_reg(E18_1610_KBC3);
		omap_cfg_reg(C21_1610_KBC4);

		omap_cfg_reg(G18_1610_KBR0);
		omap_cfg_reg(F19_1610_KBR1);
		omap_cfg_reg(H14_1610_KBR2);
		omap_cfg_reg(E20_1610_KBR3);
		omap_cfg_reg(E19_1610_KBR4);
		omap_cfg_reg(N19_1610_KBR5);
	} else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
		omap_cfg_reg(E2_730_KBR0);
		omap_cfg_reg(J7_730_KBR1);
		omap_cfg_reg(E1_730_KBR2);
		omap_cfg_reg(F3_730_KBR3);
		omap_cfg_reg(D2_730_KBR4);

		omap_cfg_reg(C2_730_KBC0);
		omap_cfg_reg(D3_730_KBC1);
		omap_cfg_reg(E4_730_KBC2);
		omap_cfg_reg(F4_730_KBC3);
		omap_cfg_reg(E3_730_KBC4);
	} else if (machine_is_omap_h4()) {
		omap_cfg_reg(T19_24XX_KBR0);
		omap_cfg_reg(R19_24XX_KBR1);
		omap_cfg_reg(V18_24XX_KBR2);
		omap_cfg_reg(M21_24XX_KBR3);
		omap_cfg_reg(E5__24XX_KBR4);
		if (omap_has_menelaus()) {
			omap_cfg_reg(B3__24XX_KBR5);
			omap_cfg_reg(AA4_24XX_KBC2);
			omap_cfg_reg(B13_24XX_KBC6);
		} else {
			omap_cfg_reg(M18_24XX_KBR5);
			omap_cfg_reg(H19_24XX_KBC2);
			omap_cfg_reg(N19_24XX_KBC6);
		}
		omap_cfg_reg(R20_24XX_KBC0);
		omap_cfg_reg(M14_24XX_KBC1);
		omap_cfg_reg(V17_24XX_KBC3);
		omap_cfg_reg(P21_24XX_KBC4);
		omap_cfg_reg(L14_24XX_KBC5);
	}
}
#else
static inline void omap_init_kp(void) {}
#endif

/*-------------------------------------------------------------------------*/
#if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)

static struct platform_device **omap_mcbsp_devices;

void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
					int size)
{
	int i;

	if (size > OMAP_MAX_MCBSP_COUNT) {
		printk(KERN_WARNING "Registered too many McBSPs platform_data."
			" Using maximum (%d) available.\n",
			OMAP_MAX_MCBSP_COUNT);
		size = OMAP_MAX_MCBSP_COUNT;
	}

	omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
				     GFP_KERNEL);
	if (!omap_mcbsp_devices) {
		printk(KERN_ERR "Could not register McBSP devices\n");
		return;
	}

	for (i = 0; i < size; i++) {
		struct platform_device *new_mcbsp;
		int ret;

		new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
		if (!new_mcbsp)
			continue;
		new_mcbsp->dev.platform_data = &config[i];
		ret = platform_device_add(new_mcbsp);
		if (ret) {
			platform_device_put(new_mcbsp);
			continue;
		}
		omap_mcbsp_devices[i] = new_mcbsp;
	}
}

#else
void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
					int size)
{  }
#endif

/*-------------------------------------------------------------------------*/

#if	defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
	defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)

#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#define	OMAP_MMC1_BASE		0x4809c000
#define	OMAP_MMC1_END		(OMAP_MMC1_BASE + 0x1fc)
#define	OMAP_MMC1_INT		INT_24XX_MMC_IRQ

#define	OMAP_MMC2_BASE		0x480b4000
#define	OMAP_MMC2_END		(OMAP_MMC2_BASE + 0x1fc)
#define	OMAP_MMC2_INT		INT_24XX_MMC2_IRQ

#else

#define	OMAP_MMC1_BASE		0xfffb7800
#define	OMAP_MMC1_END		(OMAP_MMC1_BASE + 0x7f)
#define OMAP_MMC1_INT		INT_MMC

#define	OMAP_MMC2_BASE		0xfffb7c00	/* omap16xx only */
#define	OMAP_MMC2_END		(OMAP_MMC2_BASE + 0x7f)
#define	OMAP_MMC2_INT		INT_1610_MMC2

#endif

static struct omap_mmc_platform_data mmc1_data;

static u64 mmc1_dmamask = 0xffffffff;

static struct resource mmc1_resources[] = {
	{
		.start		= OMAP_MMC1_BASE,
		.end		= OMAP_MMC1_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP_MMC1_INT,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device mmc_omap_device1 = {
	.name		= "mmci-omap",
	.id		= 1,
	.dev = {
		.dma_mask	= &mmc1_dmamask,
		.platform_data	= &mmc1_data,
	},
	.num_resources	= ARRAY_SIZE(mmc1_resources),
	.resource	= mmc1_resources,
};

#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
	defined(CONFIG_ARCH_OMAP34XX)

static struct omap_mmc_platform_data mmc2_data;

static u64 mmc2_dmamask = 0xffffffff;

static struct resource mmc2_resources[] = {
	{
		.start		= OMAP_MMC2_BASE,
		.end		= OMAP_MMC2_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP_MMC2_INT,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device mmc_omap_device2 = {
	.name		= "mmci-omap",
	.id		= 2,
	.dev = {
		.dma_mask	= &mmc2_dmamask,
		.platform_data	= &mmc2_data,
	},
	.num_resources	= ARRAY_SIZE(mmc2_resources),
	.resource	= mmc2_resources,
};
#endif

static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf)
{
	if (cpu_is_omap2430() || cpu_is_omap34xx())
		return;

	if (mmc_conf->mmc[0].enabled) {
		if (cpu_is_omap24xx()) {
			omap_cfg_reg(H18_24XX_MMC_CMD);
			omap_cfg_reg(H15_24XX_MMC_CLKI);
			omap_cfg_reg(G19_24XX_MMC_CLKO);
			omap_cfg_reg(F20_24XX_MMC_DAT0);
			omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
			omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
		} else {
			omap_cfg_reg(MMC_CMD);
			omap_cfg_reg(MMC_CLK);
			omap_cfg_reg(MMC_DAT0);
			if (cpu_is_omap1710()) {
				omap_cfg_reg(M15_1710_MMC_CLKI);
				omap_cfg_reg(P19_1710_MMC_CMDDIR);
				omap_cfg_reg(P20_1710_MMC_DATDIR0);
			}
		}
		if (mmc_conf->mmc[0].wire4) {
			if (cpu_is_omap24xx()) {
				omap_cfg_reg(H14_24XX_MMC_DAT1);
				omap_cfg_reg(E19_24XX_MMC_DAT2);
				omap_cfg_reg(D19_24XX_MMC_DAT3);
				omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
				omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
				omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
			} else {
				omap_cfg_reg(MMC_DAT1);
				/* NOTE:  DAT2 can be on W10 (here) or M15 */
				if (!mmc_conf->mmc[0].nomux)
					omap_cfg_reg(MMC_DAT2);
				omap_cfg_reg(MMC_DAT3);
			}
		}
	}

#ifdef	CONFIG_ARCH_OMAP16XX
	/* block 2 is on newer chips, and has many pinout options */
	if (mmc_conf->mmc[1].enabled) {
		if (!mmc_conf->mmc[1].nomux) {
			omap_cfg_reg(Y8_1610_MMC2_CMD);
			omap_cfg_reg(Y10_1610_MMC2_CLK);
			omap_cfg_reg(R18_1610_MMC2_CLKIN);
			omap_cfg_reg(W8_1610_MMC2_DAT0);
			if (mmc_conf->mmc[1].wire4) {
				omap_cfg_reg(V8_1610_MMC2_DAT1);
				omap_cfg_reg(W15_1610_MMC2_DAT2);
				omap_cfg_reg(R10_1610_MMC2_DAT3);
			}

			/* These are needed for the level shifter */
			omap_cfg_reg(V9_1610_MMC2_CMDDIR);
			omap_cfg_reg(V5_1610_MMC2_DATDIR0);
			omap_cfg_reg(W19_1610_MMC2_DATDIR1);
		}

		/* Feedback clock must be set on OMAP-1710 MMC2 */
		if (cpu_is_omap1710())
			omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
				     MOD_CONF_CTRL_1);
	}
#endif
}

static void __init omap_init_mmc(void)
{
	const struct omap_mmc_config	*mmc_conf;

	/* NOTE:  assumes MMC was never (wrongly) enabled */
	mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
	if (!mmc_conf)
		return;

	omap_init_mmc_conf(mmc_conf);

	if (mmc_conf->mmc[0].enabled) {
		mmc1_data.conf = mmc_conf->mmc[0];
		(void) platform_device_register(&mmc_omap_device1);
	}

#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
	defined(CONFIG_ARCH_OMAP34XX)
	if (mmc_conf->mmc[1].enabled) {
		mmc2_data.conf = mmc_conf->mmc[1];
		(void) platform_device_register(&mmc_omap_device2);
	}
#endif
}

void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info)
{
	switch (host) {
	case 1:
		mmc1_data = *info;
		break;
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
	defined(CONFIG_ARCH_OMAP34XX)
	case 2:
		mmc2_data = *info;
		break;
#endif
	default:
		BUG();
	}
}

#else
static inline void omap_init_mmc(void) {}
void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {}
#endif

/*-------------------------------------------------------------------------*/

/* Numbering for the SPI-capable controllers when used for SPI:
 * spi		= 1
 * uwire	= 2
 * mmc1..2	= 3..4
 * mcbsp1..3	= 5..7
 */

#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)

#define	OMAP_UWIRE_BASE		0xfffb3000

static struct resource uwire_resources[] = {
	{
		.start		= OMAP_UWIRE_BASE,
		.end		= OMAP_UWIRE_BASE + 0x20,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_uwire_device = {
	.name	   = "omap_uwire",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(uwire_resources),
	.resource	= uwire_resources,
};

static void omap_init_uwire(void)
{
	/* FIXME define and use a boot tag; not all boards will be hooking
	 * up devices to the microwire controller, and multi-board configs
	 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
	 */

	/* board-specific code must configure chipselects (only a few
	 * are normally used) and SCLK/SDI/SDO (each has two choices).
	 */
	(void) platform_device_register(&omap_uwire_device);
}
#else
static inline void omap_init_uwire(void) {}
#endif

/*-------------------------------------------------------------------------*/

#if	defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)

#ifdef CONFIG_ARCH_OMAP24XX
#define	OMAP_WDT_BASE		0x48022000
#else
#define	OMAP_WDT_BASE		0xfffeb000
#endif

static struct resource wdt_resources[] = {
	{
		.start		= OMAP_WDT_BASE,
		.end		= OMAP_WDT_BASE + 0x4f,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_wdt_device = {
	.name	   = "omap_wdt",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

static void omap_init_wdt(void)
{
	(void) platform_device_register(&omap_wdt_device);
}
#else
static inline void omap_init_wdt(void) {}
#endif

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)

#ifdef CONFIG_ARCH_OMAP24XX
#define	OMAP_RNG_BASE		0x480A0000
#else
#define	OMAP_RNG_BASE		0xfffe5000
#endif

static struct resource rng_resources[] = {
	{
		.start		= OMAP_RNG_BASE,
		.end		= OMAP_RNG_BASE + 0x4f,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_rng_device = {
	.name	   = "omap_rng",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(rng_resources),
	.resource	= rng_resources,
};

static void omap_init_rng(void)
{
	(void) platform_device_register(&omap_rng_device);
}
#else
static inline void omap_init_rng(void) {}
#endif

/*
 * This gets called after board-specific INIT_MACHINE, and initializes most
 * on-chip peripherals accessible on this board (except for few like USB):
 *
 *  (a) Does any "standard config" pin muxing needed.  Board-specific
 *	code will have muxed GPIO pins and done "nonstandard" setup;
 *	that code could live in the boot loader.
 *  (b) Populating board-specific platform_data with the data drivers
 *	rely on to handle wiring variations.
 *  (c) Creating platform devices as meaningful on this board and
 *	with this kernel configuration.
 *
 * Claiming GPIOs, and setting their direction and initial values, is the
 * responsibility of the device drivers.  So is responding to probe().
 *
 * Board-specific knowlege like creating devices or pin setup is to be
 * kept out of drivers as much as possible.  In particular, pin setup
 * may be handled by the boot loader, and drivers should expect it will
 * normally have been done by the time they're probed.
 */
static int __init omap_init_devices(void)
{
/*
 * Need to enable relevant once for 2430 SDP
 */
#ifndef CONFIG_MACH_OMAP_2430SDP
	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */
	omap_init_dsp();
	omap_init_kp();
	omap_init_mmc();
	omap_init_uwire();
	omap_init_wdt();
	omap_init_rng();
#endif
	return 0;
}
arch_initcall(omap_init_devices);
Commit	Line	Data
1a8bfa1e TL	1	/*
	2	* linux/arch/arm/plat-omap/devices.c
	3	*
	4	* Common platform device setup/initialization for OMAP1 and OMAP2
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
1a8bfa1e TL	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/platform_device.h>
	16
a09e64fb	17	#include <mach/hardware.h>
1a8bfa1e TL	18	#include <asm/io.h>
	19	#include <asm/mach-types.h>
	20	#include <asm/mach/map.h>
	21
a09e64fb RK	22	#include <mach/tc.h>
a09e64fb RK	23	#include <mach/board.h>
7736c09c	24	#include <mach/mmc.h>
a09e64fb RK	25	#include <mach/mux.h>
	26	#include <mach/gpio.h>
	27	#include <mach/menelaus.h>
	28	#include <mach/mcbsp.h>
1a8bfa1e	29
c40fae95 TL	30	#if defined(CONFIG_OMAP_DSP) \|\| defined(CONFIG_OMAP_DSP_MODULE)
	31
	32	#include "../plat-omap/dsp/dsp_common.h"
	33
	34	static struct dsp_platform_data dsp_pdata = {
	35	.kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
	36	};
	37
	38	static struct resource omap_dsp_resources[] = {
	39	{
	40	.name = "dsp_mmu",
	41	.start = -1,
	42	.flags = IORESOURCE_IRQ,
	43	},
	44	};
	45
	46	static struct platform_device omap_dsp_device = {
	47	.name = "dsp",
	48	.id = -1,
	49	.num_resources = ARRAY_SIZE(omap_dsp_resources),
	50	.resource = omap_dsp_resources,
	51	.dev = {
	52	.platform_data = &dsp_pdata,
	53	},
	54	};
	55
	56	static inline void omap_init_dsp(void)
	57	{
	58	struct resource *res;
	59	int irq;
	60
	61	if (cpu_is_omap15xx())
	62	irq = INT_1510_DSP_MMU;
	63	else if (cpu_is_omap16xx())
	64	irq = INT_1610_DSP_MMU;
	65	else if (cpu_is_omap24xx())
	66	irq = INT_24XX_DSP_MMU;
	67
	68	res = platform_get_resource_byname(&omap_dsp_device,
	69	IORESOURCE_IRQ, "dsp_mmu");
	70	res->start = irq;
	71
	72	platform_device_register(&omap_dsp_device);
	73	}
	74
	75	int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
	76	{
	77	static DEFINE_MUTEX(dsp_pdata_lock);
	78
	79	mutex_init(&kdev->lock);
	80
	81	mutex_lock(&dsp_pdata_lock);
	82	list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
	83	mutex_unlock(&dsp_pdata_lock);
	84
	85	return 0;
	86	}
	87	EXPORT_SYMBOL(dsp_kfunc_device_register);
	88
	89	#else
	90	static inline void omap_init_dsp(void) { }
	91	#endif /* CONFIG_OMAP_DSP */
	92
9b6553cd TL	93	/-------------------------------------------------------------------------/
	94	#if defined(CONFIG_KEYBOARD_OMAP) \|\| defined(CONFIG_KEYBOARD_OMAP_MODULE)
	95
	96	static void omap_init_kp(void)
	97	{
	98	if (machine_is_omap_h2() \|\| machine_is_omap_h3()) {
	99	omap_cfg_reg(F18_1610_KBC0);
	100	omap_cfg_reg(D20_1610_KBC1);
	101	omap_cfg_reg(D19_1610_KBC2);
	102	omap_cfg_reg(E18_1610_KBC3);
	103	omap_cfg_reg(C21_1610_KBC4);
	104
	105	omap_cfg_reg(G18_1610_KBR0);
	106	omap_cfg_reg(F19_1610_KBR1);
	107	omap_cfg_reg(H14_1610_KBR2);
	108	omap_cfg_reg(E20_1610_KBR3);
	109	omap_cfg_reg(E19_1610_KBR4);
	110	omap_cfg_reg(N19_1610_KBR5);
495f71db	111	} else if (machine_is_omap_perseus2() \|\| machine_is_omap_fsample()) {
9b6553cd TL	112	omap_cfg_reg(E2_730_KBR0);
	113	omap_cfg_reg(J7_730_KBR1);
	114	omap_cfg_reg(E1_730_KBR2);
	115	omap_cfg_reg(F3_730_KBR3);
	116	omap_cfg_reg(D2_730_KBR4);
	117
	118	omap_cfg_reg(C2_730_KBC0);
	119	omap_cfg_reg(D3_730_KBC1);
	120	omap_cfg_reg(E4_730_KBC2);
	121	omap_cfg_reg(F4_730_KBC3);
	122	omap_cfg_reg(E3_730_KBC4);
	123	} else if (machine_is_omap_h4()) {
	124	omap_cfg_reg(T19_24XX_KBR0);
	125	omap_cfg_reg(R19_24XX_KBR1);
	126	omap_cfg_reg(V18_24XX_KBR2);
	127	omap_cfg_reg(M21_24XX_KBR3);
	128	omap_cfg_reg(E5__24XX_KBR4);
	129	if (omap_has_menelaus()) {
	130	omap_cfg_reg(B3__24XX_KBR5);
	131	omap_cfg_reg(AA4_24XX_KBC2);
	132	omap_cfg_reg(B13_24XX_KBC6);
	133	} else {
	134	omap_cfg_reg(M18_24XX_KBR5);
	135	omap_cfg_reg(H19_24XX_KBC2);
	136	omap_cfg_reg(N19_24XX_KBC6);
	137	}
	138	omap_cfg_reg(R20_24XX_KBC0);
	139	omap_cfg_reg(M14_24XX_KBC1);
	140	omap_cfg_reg(V17_24XX_KBC3);
	141	omap_cfg_reg(P21_24XX_KBC4);
	142	omap_cfg_reg(L14_24XX_KBC5);
	143	}
	144	}
	145	#else
	146	static inline void omap_init_kp(void) {}
	147	#endif
	148
bc5d0c89 EV	149	/-------------------------------------------------------------------------/
	150	#if defined(CONFIG_OMAP_MCBSP) \|\| defined(CONFIG_OMAP_MCBSP_MODULE)
	151
	152	static struct platform_device **omap_mcbsp_devices;
	153
	154	void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
	155	int size)
	156	{
	157	int i;
	158
	159	if (size > OMAP_MAX_MCBSP_COUNT) {
	160	printk(KERN_WARNING "Registered too many McBSPs platform_data."
	161	" Using maximum (%d) available.\n",
	162	OMAP_MAX_MCBSP_COUNT);
	163	size = OMAP_MAX_MCBSP_COUNT;
	164	}
	165
	166	omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
	167	GFP_KERNEL);
	168	if (!omap_mcbsp_devices) {
	169	printk(KERN_ERR "Could not register McBSP devices\n");
	170	return;
	171	}
	172
	173	for (i = 0; i < size; i++) {
	174	struct platform_device *new_mcbsp;
	175	int ret;
	176
	177	new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
	178	if (!new_mcbsp)
	179	continue;
	180	new_mcbsp->dev.platform_data = &config[i];
	181	ret = platform_device_add(new_mcbsp);
	182	if (ret) {
	183	platform_device_put(new_mcbsp);
	184	continue;
	185	}
	186	omap_mcbsp_devices[i] = new_mcbsp;
	187	}
	188	}
	189
	190	#else
	191	void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
	192	int size)
	193	{ }
	194	#endif
	195
1a8bfa1e TL	196	/-------------------------------------------------------------------------/
1a8bfa1e TL	197
7736c09c RK	198	#if defined(CONFIG_MMC_OMAP) \|\| defined(CONFIG_MMC_OMAP_MODULE) \|\| \
7736c09c RK	199	defined(CONFIG_MMC_OMAP_HS) \|\| defined(CONFIG_MMC_OMAP_HS_MODULE)
1a8bfa1e	200
7736c09c	201	#if defined(CONFIG_ARCH_OMAP24XX) \|\| defined(CONFIG_ARCH_OMAP34XX)
1a8bfa1e	202	#define OMAP_MMC1_BASE 0x4809c000
7736c09c RK	203	#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x1fc)
	204	#define OMAP_MMC1_INT INT_24XX_MMC_IRQ
	205
	206	#define OMAP_MMC2_BASE 0x480b4000
	207	#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x1fc)
	208	#define OMAP_MMC2_INT INT_24XX_MMC2_IRQ
	209
1a8bfa1e	210	#else
7736c09c	211
1a8bfa1e	212	#define OMAP_MMC1_BASE 0xfffb7800
7736c09c	213	#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x7f)
1a8bfa1e	214	#define OMAP_MMC1_INT INT_MMC
7736c09c	215
1a8bfa1e	216	#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
7736c09c RK	217	#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x7f)
7736c09c RK	218	#define OMAP_MMC2_INT INT_1610_MMC2
1a8bfa1e	219
7736c09c RK	220	#endif
	221
	222	static struct omap_mmc_platform_data mmc1_data;
1a8bfa1e TL	223
	224	static u64 mmc1_dmamask = 0xffffffff;
	225
	226	static struct resource mmc1_resources[] = {
	227	{
ce9c1a83	228	.start = OMAP_MMC1_BASE,
7736c09c	229	.end = OMAP_MMC1_END,
1a8bfa1e TL	230	.flags = IORESOURCE_MEM,
	231	},
	232	{
	233	.start = OMAP_MMC1_INT,
	234	.flags = IORESOURCE_IRQ,
	235	},
	236	};
	237
	238	static struct platform_device mmc_omap_device1 = {
	239	.name = "mmci-omap",
	240	.id = 1,
	241	.dev = {
1a8bfa1e	242	.dma_mask = &mmc1_dmamask,
7736c09c	243	.platform_data = &mmc1_data,
1a8bfa1e TL	244	},
	245	.num_resources = ARRAY_SIZE(mmc1_resources),
	246	.resource = mmc1_resources,
	247	};
	248
7736c09c RK	249	#if defined(CONFIG_ARCH_OMAP16XX) \|\| defined(CONFIG_ARCH_OMAP2430) \|\| \
7736c09c RK	250	defined(CONFIG_ARCH_OMAP34XX)
1a8bfa1e	251
7736c09c	252	static struct omap_mmc_platform_data mmc2_data;
1a8bfa1e TL	253
	254	static u64 mmc2_dmamask = 0xffffffff;
	255
	256	static struct resource mmc2_resources[] = {
	257	{
ce9c1a83	258	.start = OMAP_MMC2_BASE,
7736c09c	259	.end = OMAP_MMC2_END,
1a8bfa1e TL	260	.flags = IORESOURCE_MEM,
	261	},
	262	{
7736c09c	263	.start = OMAP_MMC2_INT,
1a8bfa1e TL	264	.flags = IORESOURCE_IRQ,
	265	},
	266	};
	267
	268	static struct platform_device mmc_omap_device2 = {
	269	.name = "mmci-omap",
	270	.id = 2,
	271	.dev = {
1a8bfa1e	272	.dma_mask = &mmc2_dmamask,
7736c09c	273	.platform_data = &mmc2_data,
1a8bfa1e TL	274	},
	275	.num_resources = ARRAY_SIZE(mmc2_resources),
	276	.resource = mmc2_resources,
	277	};
	278	#endif
	279
7736c09c	280	static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf)
1a8bfa1e	281	{
7736c09c	282	if (cpu_is_omap2430() \|\| cpu_is_omap34xx())
1a8bfa1e TL	283	return;
1a8bfa1e TL	284
7736c09c	285	if (mmc_conf->mmc[0].enabled) {
abc45e1d KP	286	if (cpu_is_omap24xx()) {
	287	omap_cfg_reg(H18_24XX_MMC_CMD);
	288	omap_cfg_reg(H15_24XX_MMC_CLKI);
	289	omap_cfg_reg(G19_24XX_MMC_CLKO);
	290	omap_cfg_reg(F20_24XX_MMC_DAT0);
	291	omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
	292	omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
	293	} else {
1a8bfa1e TL	294	omap_cfg_reg(MMC_CMD);
	295	omap_cfg_reg(MMC_CLK);
	296	omap_cfg_reg(MMC_DAT0);
	297	if (cpu_is_omap1710()) {
	298	omap_cfg_reg(M15_1710_MMC_CLKI);
	299	omap_cfg_reg(P19_1710_MMC_CMDDIR);
	300	omap_cfg_reg(P20_1710_MMC_DATDIR0);
	301	}
	302	}
7736c09c	303	if (mmc_conf->mmc[0].wire4) {
abc45e1d KP	304	if (cpu_is_omap24xx()) {
	305	omap_cfg_reg(H14_24XX_MMC_DAT1);
	306	omap_cfg_reg(E19_24XX_MMC_DAT2);
	307	omap_cfg_reg(D19_24XX_MMC_DAT3);
	308	omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
	309	omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
	310	omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
	311	} else {
1a8bfa1e TL	312	omap_cfg_reg(MMC_DAT1);
1a8bfa1e TL	313	/* NOTE: DAT2 can be on W10 (here) or M15 */
7736c09c	314	if (!mmc_conf->mmc[0].nomux)
1a8bfa1e TL	315	omap_cfg_reg(MMC_DAT2);
	316	omap_cfg_reg(MMC_DAT3);
	317	}
	318	}
1a8bfa1e TL	319	}
	320
	321	#ifdef CONFIG_ARCH_OMAP16XX
	322	/* block 2 is on newer chips, and has many pinout options */
7736c09c RK	323	if (mmc_conf->mmc[1].enabled) {
7736c09c RK	324	if (!mmc_conf->mmc[1].nomux) {
1a8bfa1e TL	325	omap_cfg_reg(Y8_1610_MMC2_CMD);
	326	omap_cfg_reg(Y10_1610_MMC2_CLK);
	327	omap_cfg_reg(R18_1610_MMC2_CLKIN);
	328	omap_cfg_reg(W8_1610_MMC2_DAT0);
7736c09c	329	if (mmc_conf->mmc[1].wire4) {
1a8bfa1e TL	330	omap_cfg_reg(V8_1610_MMC2_DAT1);
	331	omap_cfg_reg(W15_1610_MMC2_DAT2);
	332	omap_cfg_reg(R10_1610_MMC2_DAT3);
	333	}
	334
	335	/* These are needed for the level shifter */
	336	omap_cfg_reg(V9_1610_MMC2_CMDDIR);
	337	omap_cfg_reg(V5_1610_MMC2_DATDIR0);
	338	omap_cfg_reg(W19_1610_MMC2_DATDIR1);
	339	}
	340
	341	/* Feedback clock must be set on OMAP-1710 MMC2 */
	342	if (cpu_is_omap1710())
	343	omap_writel(omap_readl(MOD_CONF_CTRL_1) \| (1 << 24),
	344	MOD_CONF_CTRL_1);
7736c09c RK	345	}
	346	#endif
	347	}
	348
	349	static void __init omap_init_mmc(void)
	350	{
	351	const struct omap_mmc_config *mmc_conf;
	352
	353	/* NOTE: assumes MMC was never (wrongly) enabled */
	354	mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
	355	if (!mmc_conf)
	356	return;
	357
	358	omap_init_mmc_conf(mmc_conf);
	359
	360	if (mmc_conf->mmc[0].enabled) {
	361	mmc1_data.conf = mmc_conf->mmc[0];
	362	(void) platform_device_register(&mmc_omap_device1);
	363	}
	364
	365	#if defined(CONFIG_ARCH_OMAP16XX) \|\| defined(CONFIG_ARCH_OMAP2430) \|\| \
	366	defined(CONFIG_ARCH_OMAP34XX)
	367	if (mmc_conf->mmc[1].enabled) {
	368	mmc2_data.conf = mmc_conf->mmc[1];
1a8bfa1e TL	369	(void) platform_device_register(&mmc_omap_device2);
	370	}
	371	#endif
1a8bfa1e	372	}
7736c09c RK	373
	374	void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info)
	375	{
	376	switch (host) {
	377	case 1:
	378	mmc1_data = *info;
	379	break;
	380	#if defined(CONFIG_ARCH_OMAP16XX) \|\| defined(CONFIG_ARCH_OMAP2430) \|\| \
	381	defined(CONFIG_ARCH_OMAP34XX)
	382	case 2:
	383	mmc2_data = *info;
	384	break;
	385	#endif
	386	default:
	387	BUG();
	388	}
	389	}
	390
1a8bfa1e TL	391	#else
1a8bfa1e TL	392	static inline void omap_init_mmc(void) {}
7736c09c	393	void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {}
1a8bfa1e TL	394	#endif
1a8bfa1e TL	395
9b6553cd TL	396	/-------------------------------------------------------------------------/
	397
	398	/* Numbering for the SPI-capable controllers when used for SPI:
	399	* spi = 1
	400	* uwire = 2
	401	* mmc1..2 = 3..4
	402	* mcbsp1..3 = 5..7
	403	*/
	404
	405	#if defined(CONFIG_SPI_OMAP_UWIRE) \|\| defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
	406
	407	#define OMAP_UWIRE_BASE 0xfffb3000
	408
	409	static struct resource uwire_resources[] = {
	410	{
	411	.start = OMAP_UWIRE_BASE,
	412	.end = OMAP_UWIRE_BASE + 0x20,
	413	.flags = IORESOURCE_MEM,
	414	},
	415	};
	416
	417	static struct platform_device omap_uwire_device = {
	418	.name = "omap_uwire",
	419	.id = -1,
9b6553cd TL	420	.num_resources = ARRAY_SIZE(uwire_resources),
	421	.resource = uwire_resources,
	422	};
	423
	424	static void omap_init_uwire(void)
	425	{
	426	/* FIXME define and use a boot tag; not all boards will be hooking
	427	* up devices to the microwire controller, and multi-board configs
	428	* mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
	429	*/
	430
	431	/* board-specific code must configure chipselects (only a few
	432	* are normally used) and SCLK/SDI/SDO (each has two choices).
	433	*/
	434	(void) platform_device_register(&omap_uwire_device);
	435	}
	436	#else
	437	static inline void omap_init_uwire(void) {}
	438	#endif
	439
	440	/-------------------------------------------------------------------------/
	441
1a8bfa1e TL	442	#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)
	443
	444	#ifdef CONFIG_ARCH_OMAP24XX
	445	#define OMAP_WDT_BASE 0x48022000
	446	#else
	447	#define OMAP_WDT_BASE 0xfffeb000
	448	#endif
	449
	450	static struct resource wdt_resources[] = {
	451	{
	452	.start = OMAP_WDT_BASE,
	453	.end = OMAP_WDT_BASE + 0x4f,
	454	.flags = IORESOURCE_MEM,
	455	},
	456	};
	457
	458	static struct platform_device omap_wdt_device = {
	459	.name = "omap_wdt",
	460	.id = -1,
1a8bfa1e TL	461	.num_resources = ARRAY_SIZE(wdt_resources),
	462	.resource = wdt_resources,
	463	};
	464
	465	static void omap_init_wdt(void)
	466	{
	467	(void) platform_device_register(&omap_wdt_device);
	468	}
	469	#else
	470	static inline void omap_init_wdt(void) {}
	471	#endif
	472
	473	/-------------------------------------------------------------------------/
	474
c40fae95	475	#if defined(CONFIG_HW_RANDOM_OMAP) \|\| defined(CONFIG_HW_RANDOM_OMAP_MODULE)
1a8bfa1e TL	476
	477	#ifdef CONFIG_ARCH_OMAP24XX
	478	#define OMAP_RNG_BASE 0x480A0000
	479	#else
	480	#define OMAP_RNG_BASE 0xfffe5000
	481	#endif
	482
	483	static struct resource rng_resources[] = {
	484	{
	485	.start = OMAP_RNG_BASE,
	486	.end = OMAP_RNG_BASE + 0x4f,
	487	.flags = IORESOURCE_MEM,
	488	},
	489	};
	490
	491	static struct platform_device omap_rng_device = {
	492	.name = "omap_rng",
	493	.id = -1,
1a8bfa1e TL	494	.num_resources = ARRAY_SIZE(rng_resources),
	495	.resource = rng_resources,
	496	};
	497
	498	static void omap_init_rng(void)
	499	{
	500	(void) platform_device_register(&omap_rng_device);
	501	}
	502	#else
	503	static inline void omap_init_rng(void) {}
	504	#endif
	505
1a8bfa1e TL	506	/*
	507	* This gets called after board-specific INIT_MACHINE, and initializes most
	508	* on-chip peripherals accessible on this board (except for few like USB):
	509	*
	510	* (a) Does any "standard config" pin muxing needed. Board-specific
	511	* code will have muxed GPIO pins and done "nonstandard" setup;
	512	* that code could live in the boot loader.
	513	* (b) Populating board-specific platform_data with the data drivers
	514	* rely on to handle wiring variations.
	515	* (c) Creating platform devices as meaningful on this board and
	516	* with this kernel configuration.
	517	*
	518	* Claiming GPIOs, and setting their direction and initial values, is the
	519	* responsibility of the device drivers. So is responding to probe().
	520	*
	521	* Board-specific knowlege like creating devices or pin setup is to be
	522	* kept out of drivers as much as possible. In particular, pin setup
	523	* may be handled by the boot loader, and drivers should expect it will
	524	* normally have been done by the time they're probed.
	525	*/
	526	static int __init omap_init_devices(void)
	527	{
56a25641 SMK	528	/*
	529	* Need to enable relevant once for 2430 SDP
	530	*/
	531	#ifndef CONFIG_MACH_OMAP_2430SDP
1a8bfa1e TL	532	/* please keep these calls, and their implementations above,
	533	* in alphabetical order so they're easier to sort through.
	534	*/
c40fae95	535	omap_init_dsp();
9b6553cd	536	omap_init_kp();
1a8bfa1e	537	omap_init_mmc();
9b6553cd	538	omap_init_uwire();
1a8bfa1e TL	539	omap_init_wdt();
1a8bfa1e TL	540	omap_init_rng();
56a25641	541	#endif
1a8bfa1e TL	542	return 0;
	543	}
	544	arch_initcall(omap_init_devices);