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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm26/kernel/ptrace.c | |
3 | * | |
4 | * By Ross Biro 1/23/92 | |
5 | * edited by Linus Torvalds | |
6 | * ARM modifications Copyright (C) 2000 Russell King | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
1da177e4 LT |
12 | #include <linux/kernel.h> |
13 | #include <linux/sched.h> | |
14 | #include <linux/mm.h> | |
15 | #include <linux/smp.h> | |
16 | #include <linux/smp_lock.h> | |
17 | #include <linux/ptrace.h> | |
18 | #include <linux/user.h> | |
19 | #include <linux/security.h> | |
7ed20e1a | 20 | #include <linux/signal.h> |
1da177e4 LT |
21 | |
22 | #include <asm/uaccess.h> | |
23 | #include <asm/pgtable.h> | |
24 | #include <asm/system.h> | |
25 | //#include <asm/processor.h> | |
26 | ||
27 | #include "ptrace.h" | |
28 | ||
29 | #define REG_PC 15 | |
30 | #define REG_PSR 15 | |
31 | /* | |
32 | * does not yet catch signals sent when the child dies. | |
33 | * in exit.c or in signal.c. | |
34 | */ | |
35 | ||
36 | /* | |
37 | * Breakpoint SWI instruction: SWI &9F0001 | |
38 | */ | |
39 | #define BREAKINST_ARM 0xef9f0001 | |
40 | ||
1da177e4 LT |
41 | /* |
42 | * this routine will get a word off of the processes privileged stack. | |
43 | * the offset is how far from the base addr as stored in the THREAD. | |
44 | * this routine assumes that all the privileged stacks are in our | |
45 | * data space. | |
46 | */ | |
47 | static inline long get_user_reg(struct task_struct *task, int offset) | |
48 | { | |
02ef691f | 49 | return task_pt_regs(task)->uregs[offset]; |
1da177e4 LT |
50 | } |
51 | ||
52 | /* | |
53 | * this routine will put a word on the processes privileged stack. | |
54 | * the offset is how far from the base addr as stored in the THREAD. | |
55 | * this routine assumes that all the privileged stacks are in our | |
56 | * data space. | |
57 | */ | |
58 | static inline int | |
59 | put_user_reg(struct task_struct *task, int offset, long data) | |
60 | { | |
02ef691f | 61 | struct pt_regs newregs, *regs = task_pt_regs(task); |
1da177e4 LT |
62 | int ret = -EINVAL; |
63 | ||
64 | newregs = *regs; | |
65 | newregs.uregs[offset] = data; | |
66 | ||
67 | if (valid_user_regs(&newregs)) { | |
68 | regs->uregs[offset] = data; | |
69 | ret = 0; | |
70 | } | |
71 | ||
72 | return ret; | |
73 | } | |
74 | ||
75 | static inline int | |
76 | read_u32(struct task_struct *task, unsigned long addr, u32 *res) | |
77 | { | |
78 | int ret; | |
79 | ||
80 | ret = access_process_vm(task, addr, res, sizeof(*res), 0); | |
81 | ||
82 | return ret == sizeof(*res) ? 0 : -EIO; | |
83 | } | |
84 | ||
85 | static inline int | |
86 | read_instr(struct task_struct *task, unsigned long addr, u32 *res) | |
87 | { | |
88 | int ret; | |
89 | u32 val; | |
90 | ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0); | |
91 | ret = ret == sizeof(val) ? 0 : -EIO; | |
92 | *res = val; | |
93 | return ret; | |
94 | } | |
95 | ||
96 | /* | |
97 | * Get value of register `rn' (in the instruction) | |
98 | */ | |
99 | static unsigned long | |
100 | ptrace_getrn(struct task_struct *child, unsigned long insn) | |
101 | { | |
102 | unsigned int reg = (insn >> 16) & 15; | |
103 | unsigned long val; | |
104 | ||
105 | val = get_user_reg(child, reg); | |
106 | if (reg == 15) | |
107 | val = pc_pointer(val + 8); //FIXME - correct for arm26? | |
108 | ||
109 | return val; | |
110 | } | |
111 | ||
112 | /* | |
113 | * Get value of operand 2 (in an ALU instruction) | |
114 | */ | |
115 | static unsigned long | |
116 | ptrace_getaluop2(struct task_struct *child, unsigned long insn) | |
117 | { | |
118 | unsigned long val; | |
119 | int shift; | |
120 | int type; | |
121 | ||
122 | if (insn & 1 << 25) { | |
123 | val = insn & 255; | |
124 | shift = (insn >> 8) & 15; | |
125 | type = 3; | |
126 | } else { | |
127 | val = get_user_reg (child, insn & 15); | |
128 | ||
129 | if (insn & (1 << 4)) | |
130 | shift = (int)get_user_reg (child, (insn >> 8) & 15); | |
131 | else | |
132 | shift = (insn >> 7) & 31; | |
133 | ||
134 | type = (insn >> 5) & 3; | |
135 | } | |
136 | ||
137 | switch (type) { | |
138 | case 0: val <<= shift; break; | |
139 | case 1: val >>= shift; break; | |
140 | case 2: | |
141 | val = (((signed long)val) >> shift); | |
142 | break; | |
143 | case 3: | |
144 | val = (val >> shift) | (val << (32 - shift)); | |
145 | break; | |
146 | } | |
147 | return val; | |
148 | } | |
149 | ||
150 | /* | |
151 | * Get value of operand 2 (in a LDR instruction) | |
152 | */ | |
153 | static unsigned long | |
154 | ptrace_getldrop2(struct task_struct *child, unsigned long insn) | |
155 | { | |
156 | unsigned long val; | |
157 | int shift; | |
158 | int type; | |
159 | ||
160 | val = get_user_reg(child, insn & 15); | |
161 | shift = (insn >> 7) & 31; | |
162 | type = (insn >> 5) & 3; | |
163 | ||
164 | switch (type) { | |
165 | case 0: val <<= shift; break; | |
166 | case 1: val >>= shift; break; | |
167 | case 2: | |
168 | val = (((signed long)val) >> shift); | |
169 | break; | |
170 | case 3: | |
171 | val = (val >> shift) | (val << (32 - shift)); | |
172 | break; | |
173 | } | |
174 | return val; | |
175 | } | |
176 | ||
177 | #define OP_MASK 0x01e00000 | |
178 | #define OP_AND 0x00000000 | |
179 | #define OP_EOR 0x00200000 | |
180 | #define OP_SUB 0x00400000 | |
181 | #define OP_RSB 0x00600000 | |
182 | #define OP_ADD 0x00800000 | |
183 | #define OP_ADC 0x00a00000 | |
184 | #define OP_SBC 0x00c00000 | |
185 | #define OP_RSC 0x00e00000 | |
186 | #define OP_ORR 0x01800000 | |
187 | #define OP_MOV 0x01a00000 | |
188 | #define OP_BIC 0x01c00000 | |
189 | #define OP_MVN 0x01e00000 | |
190 | ||
191 | static unsigned long | |
192 | get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn) | |
193 | { | |
194 | u32 alt = 0; | |
195 | ||
196 | switch (insn & 0x0e000000) { | |
197 | case 0x00000000: | |
198 | case 0x02000000: { | |
199 | /* | |
200 | * data processing | |
201 | */ | |
202 | long aluop1, aluop2, ccbit; | |
203 | ||
204 | if ((insn & 0xf000) != 0xf000) | |
205 | break; | |
206 | ||
207 | aluop1 = ptrace_getrn(child, insn); | |
208 | aluop2 = ptrace_getaluop2(child, insn); | |
209 | ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0; | |
210 | ||
211 | switch (insn & OP_MASK) { | |
212 | case OP_AND: alt = aluop1 & aluop2; break; | |
213 | case OP_EOR: alt = aluop1 ^ aluop2; break; | |
214 | case OP_SUB: alt = aluop1 - aluop2; break; | |
215 | case OP_RSB: alt = aluop2 - aluop1; break; | |
216 | case OP_ADD: alt = aluop1 + aluop2; break; | |
217 | case OP_ADC: alt = aluop1 + aluop2 + ccbit; break; | |
218 | case OP_SBC: alt = aluop1 - aluop2 + ccbit; break; | |
219 | case OP_RSC: alt = aluop2 - aluop1 + ccbit; break; | |
220 | case OP_ORR: alt = aluop1 | aluop2; break; | |
221 | case OP_MOV: alt = aluop2; break; | |
222 | case OP_BIC: alt = aluop1 & ~aluop2; break; | |
223 | case OP_MVN: alt = ~aluop2; break; | |
224 | } | |
225 | break; | |
226 | } | |
227 | ||
228 | case 0x04000000: | |
229 | case 0x06000000: | |
230 | /* | |
231 | * ldr | |
232 | */ | |
233 | if ((insn & 0x0010f000) == 0x0010f000) { | |
234 | unsigned long base; | |
235 | ||
236 | base = ptrace_getrn(child, insn); | |
237 | if (insn & 1 << 24) { | |
238 | long aluop2; | |
239 | ||
240 | if (insn & 0x02000000) | |
241 | aluop2 = ptrace_getldrop2(child, insn); | |
242 | else | |
243 | aluop2 = insn & 0xfff; | |
244 | ||
245 | if (insn & 1 << 23) | |
246 | base += aluop2; | |
247 | else | |
248 | base -= aluop2; | |
249 | } | |
250 | if (read_u32(child, base, &alt) == 0) | |
251 | alt = pc_pointer(alt); | |
252 | } | |
253 | break; | |
254 | ||
255 | case 0x08000000: | |
256 | /* | |
257 | * ldm | |
258 | */ | |
259 | if ((insn & 0x00108000) == 0x00108000) { | |
260 | unsigned long base; | |
261 | unsigned int nr_regs; | |
262 | ||
263 | if (insn & (1 << 23)) { | |
264 | nr_regs = hweight16(insn & 65535) << 2; | |
265 | ||
266 | if (!(insn & (1 << 24))) | |
267 | nr_regs -= 4; | |
268 | } else { | |
269 | if (insn & (1 << 24)) | |
270 | nr_regs = -4; | |
271 | else | |
272 | nr_regs = 0; | |
273 | } | |
274 | ||
275 | base = ptrace_getrn(child, insn); | |
276 | ||
277 | if (read_u32(child, base + nr_regs, &alt) == 0) | |
278 | alt = pc_pointer(alt); | |
279 | break; | |
280 | } | |
281 | break; | |
282 | ||
283 | case 0x0a000000: { | |
284 | /* | |
285 | * bl or b | |
286 | */ | |
287 | signed long displ; | |
288 | /* It's a branch/branch link: instead of trying to | |
289 | * figure out whether the branch will be taken or not, | |
290 | * we'll put a breakpoint at both locations. This is | |
291 | * simpler, more reliable, and probably not a whole lot | |
292 | * slower than the alternative approach of emulating the | |
293 | * branch. | |
294 | */ | |
295 | displ = (insn & 0x00ffffff) << 8; | |
296 | displ = (displ >> 6) + 8; | |
297 | if (displ != 0 && displ != 4) | |
298 | alt = pc + displ; | |
299 | } | |
300 | break; | |
301 | } | |
302 | ||
303 | return alt; | |
304 | } | |
305 | ||
306 | static int | |
307 | swap_insn(struct task_struct *task, unsigned long addr, | |
308 | void *old_insn, void *new_insn, int size) | |
309 | { | |
310 | int ret; | |
311 | ||
312 | ret = access_process_vm(task, addr, old_insn, size, 0); | |
313 | if (ret == size) | |
314 | ret = access_process_vm(task, addr, new_insn, size, 1); | |
315 | return ret; | |
316 | } | |
317 | ||
318 | static void | |
319 | add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr) | |
320 | { | |
321 | int nr = dbg->nsaved; | |
322 | ||
323 | if (nr < 2) { | |
324 | u32 new_insn = BREAKINST_ARM; | |
325 | int res; | |
326 | ||
327 | res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4); | |
328 | ||
329 | if (res == 4) { | |
330 | dbg->bp[nr].address = addr; | |
331 | dbg->nsaved += 1; | |
332 | } | |
333 | } else | |
334 | printk(KERN_ERR "ptrace: too many breakpoints\n"); | |
335 | } | |
336 | ||
337 | /* | |
338 | * Clear one breakpoint in the user program. We copy what the hardware | |
339 | * does and use bit 0 of the address to indicate whether this is a Thumb | |
340 | * breakpoint or an ARM breakpoint. | |
341 | */ | |
342 | static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp) | |
343 | { | |
344 | unsigned long addr = bp->address; | |
345 | u32 old_insn; | |
346 | int ret; | |
347 | ||
348 | ret = swap_insn(task, addr & ~3, &old_insn, | |
349 | &bp->insn, 4); | |
350 | ||
351 | if (ret != 4 || old_insn != BREAKINST_ARM) | |
352 | printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at " | |
353 | "0x%08lx (0x%08x)\n", task->comm, task->pid, | |
354 | addr, old_insn); | |
355 | } | |
356 | ||
357 | void ptrace_set_bpt(struct task_struct *child) | |
358 | { | |
359 | struct pt_regs *regs; | |
360 | unsigned long pc; | |
361 | u32 insn; | |
362 | int res; | |
363 | ||
02ef691f | 364 | regs = task_pt_regs(child); |
1da177e4 LT |
365 | pc = instruction_pointer(regs); |
366 | ||
367 | res = read_instr(child, pc, &insn); | |
368 | if (!res) { | |
369 | struct debug_info *dbg = &child->thread.debug; | |
370 | unsigned long alt; | |
371 | ||
372 | dbg->nsaved = 0; | |
373 | ||
374 | alt = get_branch_address(child, pc, insn); | |
375 | if (alt) | |
376 | add_breakpoint(child, dbg, alt); | |
377 | ||
378 | /* | |
379 | * Note that we ignore the result of setting the above | |
380 | * breakpoint since it may fail. When it does, this is | |
381 | * not so much an error, but a forewarning that we may | |
382 | * be receiving a prefetch abort shortly. | |
383 | * | |
384 | * If we don't set this breakpoint here, then we can | |
385 | * lose control of the thread during single stepping. | |
386 | */ | |
387 | if (!alt || predicate(insn) != PREDICATE_ALWAYS) | |
388 | add_breakpoint(child, dbg, pc + 4); | |
389 | } | |
390 | } | |
391 | ||
392 | /* | |
393 | * Ensure no single-step breakpoint is pending. Returns non-zero | |
394 | * value if child was being single-stepped. | |
395 | */ | |
396 | void ptrace_cancel_bpt(struct task_struct *child) | |
397 | { | |
398 | int i, nsaved = child->thread.debug.nsaved; | |
399 | ||
400 | child->thread.debug.nsaved = 0; | |
401 | ||
402 | if (nsaved > 2) { | |
403 | printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); | |
404 | nsaved = 2; | |
405 | } | |
406 | ||
407 | for (i = 0; i < nsaved; i++) | |
408 | clear_breakpoint(child, &child->thread.debug.bp[i]); | |
409 | } | |
410 | ||
411 | /* | |
412 | * Called by kernel/ptrace.c when detaching.. | |
413 | * | |
414 | * Make sure the single step bit is not set. | |
415 | */ | |
416 | void ptrace_disable(struct task_struct *child) | |
417 | { | |
418 | child->ptrace &= ~PT_SINGLESTEP; | |
419 | ptrace_cancel_bpt(child); | |
420 | } | |
421 | ||
422 | /* | |
423 | * Handle hitting a breakpoint. | |
424 | */ | |
425 | void ptrace_break(struct task_struct *tsk, struct pt_regs *regs) | |
426 | { | |
427 | siginfo_t info; | |
428 | ||
429 | /* | |
430 | * The PC is always left pointing at the next instruction. Fix this. | |
431 | */ | |
432 | regs->ARM_pc -= 4; | |
433 | ||
434 | if (tsk->thread.debug.nsaved == 0) | |
435 | printk(KERN_ERR "ptrace: bogus breakpoint trap\n"); | |
436 | ||
437 | ptrace_cancel_bpt(tsk); | |
438 | ||
439 | info.si_signo = SIGTRAP; | |
440 | info.si_errno = 0; | |
441 | info.si_code = TRAP_BRKPT; | |
442 | info.si_addr = (void *)instruction_pointer(regs) - 4; | |
443 | ||
444 | force_sig_info(SIGTRAP, &info, tsk); | |
445 | } | |
446 | ||
447 | /* | |
448 | * Read the word at offset "off" into the "struct user". We | |
449 | * actually access the pt_regs stored on the kernel stack. | |
450 | */ | |
451 | static int ptrace_read_user(struct task_struct *tsk, unsigned long off, | |
452 | unsigned long *ret) | |
453 | { | |
454 | unsigned long tmp; | |
455 | ||
456 | if (off & 3 || off >= sizeof(struct user)) | |
457 | return -EIO; | |
458 | ||
459 | tmp = 0; | |
460 | if (off < sizeof(struct pt_regs)) | |
461 | tmp = get_user_reg(tsk, off >> 2); | |
462 | ||
463 | return put_user(tmp, ret); | |
464 | } | |
465 | ||
466 | /* | |
467 | * Write the word at offset "off" into "struct user". We | |
468 | * actually access the pt_regs stored on the kernel stack. | |
469 | */ | |
470 | static int ptrace_write_user(struct task_struct *tsk, unsigned long off, | |
471 | unsigned long val) | |
472 | { | |
473 | if (off & 3 || off >= sizeof(struct user)) | |
474 | return -EIO; | |
475 | ||
476 | if (off >= sizeof(struct pt_regs)) | |
477 | return 0; | |
478 | ||
479 | return put_user_reg(tsk, off >> 2, val); | |
480 | } | |
481 | ||
482 | /* | |
483 | * Get all user integer registers. | |
484 | */ | |
485 | static int ptrace_getregs(struct task_struct *tsk, void *uregs) | |
486 | { | |
02ef691f | 487 | struct pt_regs *regs = task_pt_regs(tsk); |
1da177e4 LT |
488 | |
489 | return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0; | |
490 | } | |
491 | ||
492 | /* | |
493 | * Set all user integer registers. | |
494 | */ | |
495 | static int ptrace_setregs(struct task_struct *tsk, void *uregs) | |
496 | { | |
497 | struct pt_regs newregs; | |
498 | int ret; | |
499 | ||
500 | ret = -EFAULT; | |
501 | if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) { | |
02ef691f | 502 | struct pt_regs *regs = task_pt_regs(tsk); |
1da177e4 LT |
503 | |
504 | ret = -EINVAL; | |
505 | if (valid_user_regs(&newregs)) { | |
506 | *regs = newregs; | |
507 | ret = 0; | |
508 | } | |
509 | } | |
510 | ||
511 | return ret; | |
512 | } | |
513 | ||
514 | /* | |
515 | * Get the child FPU state. | |
516 | */ | |
517 | static int ptrace_getfpregs(struct task_struct *tsk, void *ufp) | |
518 | { | |
697102cd | 519 | return copy_to_user(ufp, &task_thread_info(tsk)->fpstate, |
1da177e4 LT |
520 | sizeof(struct user_fp)) ? -EFAULT : 0; |
521 | } | |
522 | ||
523 | /* | |
524 | * Set the child FPU state. | |
525 | */ | |
526 | static int ptrace_setfpregs(struct task_struct *tsk, void *ufp) | |
527 | { | |
528 | set_stopped_child_used_math(tsk); | |
f63776d0 | 529 | return copy_from_user(&task_thread_info(tsk)->fpstate, ufp, |
1da177e4 LT |
530 | sizeof(struct user_fp)) ? -EFAULT : 0; |
531 | } | |
532 | ||
481bed45 | 533 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
1da177e4 LT |
534 | { |
535 | unsigned long tmp; | |
536 | int ret; | |
537 | ||
538 | switch (request) { | |
539 | /* | |
540 | * read word at location "addr" in the child process. | |
541 | */ | |
542 | case PTRACE_PEEKTEXT: | |
543 | case PTRACE_PEEKDATA: | |
544 | ret = access_process_vm(child, addr, &tmp, | |
545 | sizeof(unsigned long), 0); | |
546 | if (ret == sizeof(unsigned long)) | |
547 | ret = put_user(tmp, (unsigned long *) data); | |
548 | else | |
549 | ret = -EIO; | |
550 | break; | |
551 | ||
552 | case PTRACE_PEEKUSR: | |
553 | ret = ptrace_read_user(child, addr, (unsigned long *)data); | |
554 | break; | |
555 | ||
556 | /* | |
557 | * write the word at location addr. | |
558 | */ | |
559 | case PTRACE_POKETEXT: | |
560 | case PTRACE_POKEDATA: | |
561 | ret = access_process_vm(child, addr, &data, | |
562 | sizeof(unsigned long), 1); | |
563 | if (ret == sizeof(unsigned long)) | |
564 | ret = 0; | |
565 | else | |
566 | ret = -EIO; | |
567 | break; | |
568 | ||
569 | case PTRACE_POKEUSR: | |
570 | ret = ptrace_write_user(child, addr, data); | |
571 | break; | |
572 | ||
573 | /* | |
574 | * continue/restart and stop at next (return from) syscall | |
575 | */ | |
576 | case PTRACE_SYSCALL: | |
577 | case PTRACE_CONT: | |
578 | ret = -EIO; | |
7ed20e1a | 579 | if (!valid_signal(data)) |
1da177e4 LT |
580 | break; |
581 | if (request == PTRACE_SYSCALL) | |
582 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
583 | else | |
584 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
585 | child->exit_code = data; | |
586 | /* make sure single-step breakpoint is gone. */ | |
587 | child->ptrace &= ~PT_SINGLESTEP; | |
588 | ptrace_cancel_bpt(child); | |
589 | wake_up_process(child); | |
590 | ret = 0; | |
591 | break; | |
592 | ||
593 | /* | |
594 | * make the child exit. Best I can do is send it a sigkill. | |
595 | * perhaps it should be put in the status that it wants to | |
596 | * exit. | |
597 | */ | |
598 | case PTRACE_KILL: | |
599 | /* make sure single-step breakpoint is gone. */ | |
600 | child->ptrace &= ~PT_SINGLESTEP; | |
601 | ptrace_cancel_bpt(child); | |
602 | if (child->exit_state != EXIT_ZOMBIE) { | |
603 | child->exit_code = SIGKILL; | |
604 | wake_up_process(child); | |
605 | } | |
606 | ret = 0; | |
607 | break; | |
608 | ||
609 | /* | |
610 | * execute single instruction. | |
611 | */ | |
612 | case PTRACE_SINGLESTEP: | |
613 | ret = -EIO; | |
7ed20e1a | 614 | if (!valid_signal(data)) |
1da177e4 LT |
615 | break; |
616 | child->ptrace |= PT_SINGLESTEP; | |
617 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
618 | child->exit_code = data; | |
619 | /* give it a chance to run. */ | |
620 | wake_up_process(child); | |
621 | ret = 0; | |
622 | break; | |
623 | ||
624 | case PTRACE_DETACH: | |
625 | ret = ptrace_detach(child, data); | |
626 | break; | |
627 | ||
628 | case PTRACE_GETREGS: | |
629 | ret = ptrace_getregs(child, (void *)data); | |
630 | break; | |
631 | ||
632 | case PTRACE_SETREGS: | |
633 | ret = ptrace_setregs(child, (void *)data); | |
634 | break; | |
635 | ||
636 | case PTRACE_GETFPREGS: | |
637 | ret = ptrace_getfpregs(child, (void *)data); | |
638 | break; | |
639 | ||
640 | case PTRACE_SETFPREGS: | |
641 | ret = ptrace_setfpregs(child, (void *)data); | |
642 | break; | |
643 | ||
644 | default: | |
645 | ret = ptrace_request(child, request, addr, data); | |
646 | break; | |
647 | } | |
648 | ||
649 | return ret; | |
650 | } | |
651 | ||
1da177e4 LT |
652 | asmlinkage void syscall_trace(int why, struct pt_regs *regs) |
653 | { | |
654 | unsigned long ip; | |
655 | ||
656 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | |
657 | return; | |
658 | if (!(current->ptrace & PT_PTRACED)) | |
659 | return; | |
660 | ||
661 | /* | |
662 | * Save IP. IP is used to denote syscall entry/exit: | |
663 | * IP = 0 -> entry, = 1 -> exit | |
664 | */ | |
665 | ip = regs->ARM_ip; | |
666 | regs->ARM_ip = why; | |
667 | ||
668 | /* the 0x80 provides a way for the tracing parent to distinguish | |
669 | between a syscall stop and SIGTRAP delivery */ | |
670 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) | |
671 | ? 0x80 : 0)); | |
672 | /* | |
673 | * this isn't the same as continuing with a signal, but it will do | |
674 | * for normal use. strace only continues with a signal if the | |
675 | * stopping signal is not SIGTRAP. -brl | |
676 | */ | |
677 | if (current->exit_code) { | |
678 | send_sig(current->exit_code, current, 1); | |
679 | current->exit_code = 0; | |
680 | } | |
681 | regs->ARM_ip = ip; | |
682 | } |