projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 26a7e06d SH |
1 | /* |
| 2 | * Device Tree Source for the r8a7795 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 11 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 12 | ||
| 13 | / { | |
| 14 | compatible = "renesas,r8a7795"; | |
| 15 | #address-cells = <2>; | |
| 16 | #size-cells = <2>; | |
| 17 | ||
| 18 | cpus { | |
| 19 | #address-cells = <1>; | |
| 20 | #size-cells = <0>; | |
| 21 | ||
| 22 | /* 1 core only at this point */ | |
| 23 | a57_0: cpu@0 { | |
| 24 | compatible = "arm,cortex-a57", "arm,armv8"; | |
| 25 | reg = <0x0>; | |
| 26 | device_type = "cpu"; | |
| 27 | }; | |
| 28 | }; | |
| 29 | ||
| 30 | extal_clk: extal { | |
| 31 | compatible = "fixed-clock"; | |
| 32 | #clock-cells = <0>; | |
| 33 | /* This value must be overridden by the board */ | |
| 34 | clock-frequency = <0>; | |
| 35 | }; | |
| 36 | ||
| 37 | extalr_clk: extalr { | |
| 38 | compatible = "fixed-clock"; | |
| 39 | #clock-cells = <0>; | |
| 40 | /* This value must be overridden by the board */ | |
| 41 | clock-frequency = <0>; | |
| 42 | }; | |
| 43 | ||
| 44 | soc { | |
| 45 | compatible = "simple-bus"; | |
| 46 | interrupt-parent = <&gic>; | |
| 47 | #address-cells = <2>; | |
| 48 | #size-cells = <2>; | |
| 49 | ranges; | |
| 50 | ||
| 51 | gic: interrupt-controller@0xf1010000 { | |
| 52 | compatible = "arm,gic-400"; | |
| 53 | #interrupt-cells = <3>; | |
| 54 | #address-cells = <0>; | |
| 55 | interrupt-controller; | |
| 56 | reg = <0x0 0xf1010000 0 0x1000>, | |
| 57 | <0x0 0xf1020000 0 0x2000>; | |
| 58 | interrupts = <GIC_PPI 9 | |
| 59 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; | |
| 60 | }; | |
| 61 | ||
| 62 | timer { | |
| 63 | compatible = "arm,armv8-timer"; | |
| 64 | interrupts = <GIC_PPI 13 | |
| 65 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
| 66 | <GIC_PPI 14 | |
| 67 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
| 68 | <GIC_PPI 11 | |
| 69 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
| 70 | <GIC_PPI 10 | |
| 71 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; | |
| 72 | }; | |
| 73 | ||
| 74 | cpg: clock-controller@e6150000 { | |
| 75 | compatible = "renesas,r8a7795-cpg-mssr"; | |
| 76 | reg = <0 0xe6150000 0 0x1000>; | |
| 77 | clocks = <&extal_clk>, <&extalr_clk>; | |
| 78 | clock-names = "extal", "extalr"; | |
| 79 | #clock-cells = <2>; | |
| 80 | #power-domain-cells = <0>; | |
| 81 | }; | |
| 82 | }; | |
| 83 | }; |