[deliverable/linux.git] / arch / avr32 / boards / atngw100 / evklcd10x.c

/*
 * Board-specific setup code for the ATEVKLCD10X addon board to the ATNGW100
 * Network Gateway
 *
 * Copyright (C) 2008 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/linkage.h>
#include <linux/gpio.h>
#include <linux/fb.h>
#include <linux/platform_device.h>

#include <video/atmel_lcdc.h>

#include <asm/setup.h>

#include <mach/at32ap700x.h>
#include <mach/portmux.h>
#include <mach/board.h>

#include <sound/atmel-ac97c.h>

static struct ac97c_platform_data __initdata ac97c0_data = {
	.reset_pin = GPIO_PIN_PB(19),
};

#ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA
static struct fb_videomode __initdata tcg057vglad_modes[] = {
	{
		.name		= "640x480 @ 50",
		.refresh	= 50,
		.xres		= 640,		.yres		= 480,
		.pixclock	= KHZ2PICOS(25180),

		.left_margin	= 64,		.right_margin	= 96,
		.upper_margin	= 34,		.lower_margin	= 11,
		.hsync_len	= 64,		.vsync_len	= 15,

		.sync		= 0,
		.vmode		= FB_VMODE_NONINTERLACED,
	},
};

static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
	.manufacturer		= "KYO",
	.monitor		= "TCG057VGLAD",
	.modedb			= tcg057vglad_modes,
	.modedb_len		= ARRAY_SIZE(tcg057vglad_modes),
	.hfmin			= 19948,
	.hfmax			= 31478,
	.vfmin			= 50,
	.vfmax			= 67,
	.dclkmax		= 28330000,
};

static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
	.default_bpp		= 16,
	.default_dmacon		= ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
	.default_lcdcon2	= (ATMEL_LCDC_DISTYPE_TFT
				   | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
				   | ATMEL_LCDC_MEMOR_BIG),
	.default_monspecs	= &atevklcd10x_default_monspecs,
	.guard_time		= 2,
};
#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA
static struct fb_videomode __initdata tcg057qvlad_modes[] = {
	{
		.name		= "320x240 @ 50",
		.refresh	= 50,
		.xres		= 320,		.yres		= 240,
		.pixclock	= KHZ2PICOS(6300),

		.left_margin	= 34,		.right_margin	= 46,
		.upper_margin	= 7,		.lower_margin	= 15,
		.hsync_len	= 64,		.vsync_len	= 12,

		.sync		= 0,
		.vmode		= FB_VMODE_NONINTERLACED,
	},
};

static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
	.manufacturer		= "KYO",
	.monitor		= "TCG057QVLAD",
	.modedb			= tcg057qvlad_modes,
	.modedb_len		= ARRAY_SIZE(tcg057qvlad_modes),
	.hfmin			= 19948,
	.hfmax			= 31478,
	.vfmin			= 50,
	.vfmax			= 67,
	.dclkmax		= 7000000,
};

static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
	.default_bpp		= 16,
	.default_dmacon		= ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
	.default_lcdcon2	= (ATMEL_LCDC_DISTYPE_TFT
				   | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
				   | ATMEL_LCDC_MEMOR_BIG),
	.default_monspecs	= &atevklcd10x_default_monspecs,
	.guard_time		= 2,
};
#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_POW_QVGA
static struct fb_videomode __initdata ph320240t_modes[] = {
	{
		.name		= "320x240 @ 60",
		.refresh	= 60,
		.xres		= 320,		.yres		= 240,
		.pixclock	= KHZ2PICOS(6300),

		.left_margin	= 38,		.right_margin	= 20,
		.upper_margin	= 15,		.lower_margin	= 5,
		.hsync_len	= 30,		.vsync_len	= 3,

		.sync		= 0,
		.vmode		= FB_VMODE_NONINTERLACED,
	},
};

static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
	.manufacturer		= "POW",
	.monitor		= "PH320240T",
	.modedb			= ph320240t_modes,
	.modedb_len		= ARRAY_SIZE(ph320240t_modes),
	.hfmin			= 14400,
	.hfmax			= 21600,
	.vfmin			= 50,
	.vfmax			= 90,
	.dclkmax		= 6400000,
};

static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
	.default_bpp		= 16,
	.default_dmacon		= ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
	.default_lcdcon2	= (ATMEL_LCDC_DISTYPE_TFT
				   | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
				   | ATMEL_LCDC_MEMOR_BIG),
	.default_monspecs	= &atevklcd10x_default_monspecs,
	.guard_time		= 2,
};
#endif

static void atevklcd10x_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on)
{
	gpio_set_value(GPIO_PIN_PB(15), on);
}

static int __init atevklcd10x_init(void)
{
	/* PB15 is connected to the enable line on the boost regulator
	 * controlling the backlight for the LCD panel.
	 */
	at32_select_gpio(GPIO_PIN_PB(15), AT32_GPIOF_OUTPUT);
	gpio_request(GPIO_PIN_PB(15), "backlight");
	gpio_direction_output(GPIO_PIN_PB(15), 0);

	atevklcd10x_lcdc_data.atmel_lcdfb_power_control =
		atevklcd10x_lcdc_power_control;

	at32_add_device_lcdc(0, &atevklcd10x_lcdc_data,
			fbmem_start, fbmem_size,
#ifdef CONFIG_BOARD_ATNGW100_MKII
			ATMEL_LCDC_PRI_18BIT | ATMEL_LCDC_PC_DVAL
#else
			ATMEL_LCDC_ALT_18BIT | ATMEL_LCDC_PE_DVAL
#endif
			);

	at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH);

	return 0;
}
postcore_initcall(atevklcd10x_init);
Commit	Line	Data
a3bee42f HCE	1	/*
	2	* Board-specific setup code for the ATEVKLCD10X addon board to the ATNGW100
	3	* Network Gateway
	4	*
	5	* Copyright (C) 2008 Atmel Corporation
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published by
	9	* the Free Software Foundation.
	10	*/
	11
	12	#include <linux/init.h>
	13	#include <linux/linkage.h>
30754acf	14	#include <linux/gpio.h>
a3bee42f HCE	15	#include <linux/fb.h>
	16	#include <linux/platform_device.h>
	17
	18	#include <video/atmel_lcdc.h>
	19
	20	#include <asm/setup.h>
	21
	22	#include <mach/at32ap700x.h>
30754acf	23	#include <mach/portmux.h>
a3bee42f HCE	24	#include <mach/board.h>
a3bee42f HCE	25
2f47c8c5 HCE	26	#include <sound/atmel-ac97c.h>
2f47c8c5 HCE	27
a3bee42f	28	static struct ac97c_platform_data __initdata ac97c0_data = {
2f47c8c5	29	.reset_pin = GPIO_PIN_PB(19),
a3bee42f HCE	30	};
	31
	32	#ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA
	33	static struct fb_videomode __initdata tcg057vglad_modes[] = {
	34	{
b2a49ed0 HCE	35	.name = "640x480 @ 50",
b2a49ed0 HCE	36	.refresh = 50,
a3bee42f HCE	37	.xres = 640, .yres = 480,
	38	.pixclock = KHZ2PICOS(25180),
	39
b2a49ed0 HCE	40	.left_margin = 64, .right_margin = 96,
	41	.upper_margin = 34, .lower_margin = 11,
	42	.hsync_len = 64, .vsync_len = 15,
a3bee42f HCE	43
	44	.sync = 0,
	45	.vmode = FB_VMODE_NONINTERLACED,
	46	},
	47	};
	48
	49	static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
	50	.manufacturer = "KYO",
	51	.monitor = "TCG057VGLAD",
	52	.modedb = tcg057vglad_modes,
	53	.modedb_len = ARRAY_SIZE(tcg057vglad_modes),
	54	.hfmin = 19948,
	55	.hfmax = 31478,
	56	.vfmin = 50,
	57	.vfmax = 67,
	58	.dclkmax = 28330000,
	59	};
	60
8af2c286	61	static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
a3bee42f HCE	62	.default_bpp = 16,
	63	.default_dmacon = ATMEL_LCDC_DMAEN \| ATMEL_LCDC_DMA2DEN,
	64	.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
	65	\| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
	66	\| ATMEL_LCDC_MEMOR_BIG),
	67	.default_monspecs = &atevklcd10x_default_monspecs,
	68	.guard_time = 2,
	69	};
	70	#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA
	71	static struct fb_videomode __initdata tcg057qvlad_modes[] = {
	72	{
b2a49ed0 HCE	73	.name = "320x240 @ 50",
b2a49ed0 HCE	74	.refresh = 50,
a3bee42f HCE	75	.xres = 320, .yres = 240,
	76	.pixclock = KHZ2PICOS(6300),
	77
b2a49ed0 HCE	78	.left_margin = 34, .right_margin = 46,
	79	.upper_margin = 7, .lower_margin = 15,
	80	.hsync_len = 64, .vsync_len = 12,
a3bee42f HCE	81
	82	.sync = 0,
	83	.vmode = FB_VMODE_NONINTERLACED,
	84	},
	85	};
	86
	87	static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
	88	.manufacturer = "KYO",
	89	.monitor = "TCG057QVLAD",
	90	.modedb = tcg057qvlad_modes,
	91	.modedb_len = ARRAY_SIZE(tcg057qvlad_modes),
	92	.hfmin = 19948,
	93	.hfmax = 31478,
	94	.vfmin = 50,
	95	.vfmax = 67,
	96	.dclkmax = 7000000,
	97	};
	98
8af2c286	99	static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
a3bee42f HCE	100	.default_bpp = 16,
	101	.default_dmacon = ATMEL_LCDC_DMAEN \| ATMEL_LCDC_DMA2DEN,
	102	.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
	103	\| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
	104	\| ATMEL_LCDC_MEMOR_BIG),
	105	.default_monspecs = &atevklcd10x_default_monspecs,
	106	.guard_time = 2,
	107	};
	108	#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_POW_QVGA
	109	static struct fb_videomode __initdata ph320240t_modes[] = {
	110	{
	111	.name = "320x240 @ 60",
	112	.refresh = 60,
	113	.xres = 320, .yres = 240,
	114	.pixclock = KHZ2PICOS(6300),
	115
	116	.left_margin = 38, .right_margin = 20,
	117	.upper_margin = 15, .lower_margin = 5,
	118	.hsync_len = 30, .vsync_len = 3,
	119
	120	.sync = 0,
	121	.vmode = FB_VMODE_NONINTERLACED,
	122	},
	123	};
	124
	125	static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
	126	.manufacturer = "POW",
	127	.monitor = "PH320240T",
	128	.modedb = ph320240t_modes,
	129	.modedb_len = ARRAY_SIZE(ph320240t_modes),
	130	.hfmin = 14400,
	131	.hfmax = 21600,
	132	.vfmin = 50,
	133	.vfmax = 90,
	134	.dclkmax = 6400000,
	135	};
	136
8af2c286	137	static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = {
a3bee42f HCE	138	.default_bpp = 16,
	139	.default_dmacon = ATMEL_LCDC_DMAEN \| ATMEL_LCDC_DMA2DEN,
	140	.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
	141	\| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
	142	\| ATMEL_LCDC_MEMOR_BIG),
	143	.default_monspecs = &atevklcd10x_default_monspecs,
	144	.guard_time = 2,
	145	};
	146	#endif
	147
ce3b64f5	148	static void atevklcd10x_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on)
30754acf HCE	149	{
	150	gpio_set_value(GPIO_PIN_PB(15), on);
	151	}
	152
a3bee42f HCE	153	static int __init atevklcd10x_init(void)
a3bee42f HCE	154	{
30754acf HCE	155	/* PB15 is connected to the enable line on the boost regulator
	156	* controlling the backlight for the LCD panel.
	157	*/
	158	at32_select_gpio(GPIO_PIN_PB(15), AT32_GPIOF_OUTPUT);
	159	gpio_request(GPIO_PIN_PB(15), "backlight");
	160	gpio_direction_output(GPIO_PIN_PB(15), 0);
	161
	162	atevklcd10x_lcdc_data.atmel_lcdfb_power_control =
	163	atevklcd10x_lcdc_power_control;
a3bee42f HCE	164
a3bee42f HCE	165	at32_add_device_lcdc(0, &atevklcd10x_lcdc_data,
ecb1bd89	166	fbmem_start, fbmem_size,
3550b931 HCE	167	#ifdef CONFIG_BOARD_ATNGW100_MKII
	168	ATMEL_LCDC_PRI_18BIT \| ATMEL_LCDC_PC_DVAL
	169	#else
	170	ATMEL_LCDC_ALT_18BIT \| ATMEL_LCDC_PE_DVAL
	171	#endif
	172	);
30754acf	173
2f47c8c5	174	at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH);
30754acf	175
a3bee42f HCE	176	return 0;
	177	}
	178	postcore_initcall(atevklcd10x_init);