Blackfin arch: fix bug - IMDMA is not type struct dma_register
[deliverable/linux.git] / arch / blackfin / kernel / setup.c
CommitLineData
1394f032 1/*
550d5538 2 * arch/blackfin/kernel/setup.c
1394f032 3 *
550d5538 4 * Copyright 2004-2006 Analog Devices Inc.
1394f032 5 *
550d5538 6 * Enter bugs at http://blackfin.uclinux.org/
1394f032 7 *
550d5538 8 * Licensed under the GPL-2 or later.
1394f032
BW
9 */
10
11#include <linux/delay.h>
12#include <linux/console.h>
13#include <linux/bootmem.h>
14#include <linux/seq_file.h>
15#include <linux/cpu.h>
16#include <linux/module.h>
1394f032 17#include <linux/tty.h>
856783b3 18#include <linux/pfn.h>
1394f032
BW
19
20#include <linux/ext2_fs.h>
21#include <linux/cramfs_fs.h>
22#include <linux/romfs_fs.h>
23
3bebca2d 24#include <asm/cplb.h>
1394f032
BW
25#include <asm/cacheflush.h>
26#include <asm/blackfin.h>
27#include <asm/cplbinit.h>
1754a5d9 28#include <asm/div64.h>
7adfb58f 29#include <asm/fixed_code.h>
ce3afa1c 30#include <asm/early_printk.h>
1394f032 31
6cda2e90
MH
32static DEFINE_PER_CPU(struct cpu, cpu_devices);
33
a9c59c27 34u16 _bfin_swrst;
d45118b1 35EXPORT_SYMBOL(_bfin_swrst);
a9c59c27 36
1394f032 37unsigned long memory_start, memory_end, physical_mem_end;
3132b586 38unsigned long _rambase, _ramstart, _ramend;
1394f032
BW
39unsigned long reserved_mem_dcache_on;
40unsigned long reserved_mem_icache_on;
41EXPORT_SYMBOL(memory_start);
42EXPORT_SYMBOL(memory_end);
43EXPORT_SYMBOL(physical_mem_end);
44EXPORT_SYMBOL(_ramend);
45
46#ifdef CONFIG_MTD_UCLINUX
47unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
48unsigned long _ebss;
49EXPORT_SYMBOL(memory_mtd_end);
50EXPORT_SYMBOL(memory_mtd_start);
51EXPORT_SYMBOL(mtd_size);
52#endif
53
5e10b4a6 54char __initdata command_line[COMMAND_LINE_SIZE];
1394f032 55
856783b3
YL
56/* boot memmap, for parsing "memmap=" */
57#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
58#define BFIN_MEMMAP_RAM 1
59#define BFIN_MEMMAP_RESERVED 2
60struct bfin_memmap {
61 int nr_map;
62 struct bfin_memmap_entry {
63 unsigned long long addr; /* start of memory segment */
64 unsigned long long size;
65 unsigned long type;
66 } map[BFIN_MEMMAP_MAX];
67} bfin_memmap __initdata;
68
69/* for memmap sanitization */
70struct change_member {
71 struct bfin_memmap_entry *pentry; /* pointer to original entry */
72 unsigned long long addr; /* address for this change point */
73};
74static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
75static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
76static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
77static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
78
1394f032
BW
79void __init bf53x_cache_init(void)
80{
3bebca2d 81#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
1394f032
BW
82 generate_cpl_tables();
83#endif
84
3bebca2d 85#ifdef CONFIG_BFIN_ICACHE
1394f032
BW
86 bfin_icache_init();
87 printk(KERN_INFO "Instruction Cache Enabled\n");
88#endif
89
3bebca2d 90#ifdef CONFIG_BFIN_DCACHE
1394f032
BW
91 bfin_dcache_init();
92 printk(KERN_INFO "Data Cache Enabled"
3bebca2d 93# if defined CONFIG_BFIN_WB
1394f032 94 " (write-back)"
3bebca2d 95# elif defined CONFIG_BFIN_WT
1394f032
BW
96 " (write-through)"
97# endif
98 "\n");
99#endif
100}
101
52a07812 102void __init bf53x_relocate_l1_mem(void)
1394f032
BW
103{
104 unsigned long l1_code_length;
105 unsigned long l1_data_a_length;
106 unsigned long l1_data_b_length;
262c3825 107 unsigned long l2_length;
1394f032
BW
108
109 l1_code_length = _etext_l1 - _stext_l1;
110 if (l1_code_length > L1_CODE_LENGTH)
b85b82d9 111 panic("L1 Instruction SRAM Overflow\n");
1394f032
BW
112 /* cannot complain as printk is not available as yet.
113 * But we can continue booting and complain later!
114 */
115
116 /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
117 dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
118
119 l1_data_a_length = _ebss_l1 - _sdata_l1;
120 if (l1_data_a_length > L1_DATA_A_LENGTH)
b85b82d9 121 panic("L1 Data SRAM Bank A Overflow\n");
1394f032
BW
122
123 /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
124 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
125
126 l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
127 if (l1_data_b_length > L1_DATA_B_LENGTH)
b85b82d9 128 panic("L1 Data SRAM Bank B Overflow\n");
1394f032
BW
129
130 /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
131 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
132 l1_data_a_length, l1_data_b_length);
262c3825
SZ
133
134#ifdef L2_LENGTH
135 l2_length = _ebss_l2 - _stext_l2;
136 if (l2_length > L2_LENGTH)
137 panic("L2 SRAM Overflow\n");
138
139 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
140 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
141#endif
1394f032
BW
142}
143
856783b3
YL
144/* add_memory_region to memmap */
145static void __init add_memory_region(unsigned long long start,
146 unsigned long long size, int type)
147{
148 int i;
149
150 i = bfin_memmap.nr_map;
151
152 if (i == BFIN_MEMMAP_MAX) {
153 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
154 return;
155 }
156
157 bfin_memmap.map[i].addr = start;
158 bfin_memmap.map[i].size = size;
159 bfin_memmap.map[i].type = type;
160 bfin_memmap.nr_map++;
161}
162
163/*
164 * Sanitize the boot memmap, removing overlaps.
165 */
166static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
167{
168 struct change_member *change_tmp;
169 unsigned long current_type, last_type;
170 unsigned long long last_addr;
171 int chgidx, still_changing;
172 int overlap_entries;
173 int new_entry;
174 int old_nr, new_nr, chg_nr;
175 int i;
176
177 /*
178 Visually we're performing the following (1,2,3,4 = memory types)
179
180 Sample memory map (w/overlaps):
181 ____22__________________
182 ______________________4_
183 ____1111________________
184 _44_____________________
185 11111111________________
186 ____________________33__
187 ___________44___________
188 __________33333_________
189 ______________22________
190 ___________________2222_
191 _________111111111______
192 _____________________11_
193 _________________4______
194
195 Sanitized equivalent (no overlap):
196 1_______________________
197 _44_____________________
198 ___1____________________
199 ____22__________________
200 ______11________________
201 _________1______________
202 __________3_____________
203 ___________44___________
204 _____________33_________
205 _______________2________
206 ________________1_______
207 _________________4______
208 ___________________2____
209 ____________________33__
210 ______________________4_
211 */
212 /* if there's only one memory region, don't bother */
213 if (*pnr_map < 2)
214 return -1;
215
216 old_nr = *pnr_map;
217
218 /* bail out if we find any unreasonable addresses in memmap */
219 for (i = 0; i < old_nr; i++)
220 if (map[i].addr + map[i].size < map[i].addr)
221 return -1;
222
223 /* create pointers for initial change-point information (for sorting) */
224 for (i = 0; i < 2*old_nr; i++)
225 change_point[i] = &change_point_list[i];
226
227 /* record all known change-points (starting and ending addresses),
228 omitting those that are for empty memory regions */
229 chgidx = 0;
230 for (i = 0; i < old_nr; i++) {
231 if (map[i].size != 0) {
232 change_point[chgidx]->addr = map[i].addr;
233 change_point[chgidx++]->pentry = &map[i];
234 change_point[chgidx]->addr = map[i].addr + map[i].size;
235 change_point[chgidx++]->pentry = &map[i];
236 }
237 }
238 chg_nr = chgidx; /* true number of change-points */
239
240 /* sort change-point list by memory addresses (low -> high) */
241 still_changing = 1;
242 while (still_changing) {
243 still_changing = 0;
244 for (i = 1; i < chg_nr; i++) {
245 /* if <current_addr> > <last_addr>, swap */
246 /* or, if current=<start_addr> & last=<end_addr>, swap */
247 if ((change_point[i]->addr < change_point[i-1]->addr) ||
248 ((change_point[i]->addr == change_point[i-1]->addr) &&
249 (change_point[i]->addr == change_point[i]->pentry->addr) &&
250 (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
251 ) {
252 change_tmp = change_point[i];
253 change_point[i] = change_point[i-1];
254 change_point[i-1] = change_tmp;
255 still_changing = 1;
256 }
257 }
258 }
259
260 /* create a new memmap, removing overlaps */
261 overlap_entries = 0; /* number of entries in the overlap table */
262 new_entry = 0; /* index for creating new memmap entries */
263 last_type = 0; /* start with undefined memory type */
264 last_addr = 0; /* start with 0 as last starting address */
265 /* loop through change-points, determining affect on the new memmap */
266 for (chgidx = 0; chgidx < chg_nr; chgidx++) {
267 /* keep track of all overlapping memmap entries */
268 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
269 /* add map entry to overlap list (> 1 entry implies an overlap) */
270 overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
271 } else {
272 /* remove entry from list (order independent, so swap with last) */
273 for (i = 0; i < overlap_entries; i++) {
274 if (overlap_list[i] == change_point[chgidx]->pentry)
275 overlap_list[i] = overlap_list[overlap_entries-1];
276 }
277 overlap_entries--;
278 }
279 /* if there are overlapping entries, decide which "type" to use */
280 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
281 current_type = 0;
282 for (i = 0; i < overlap_entries; i++)
283 if (overlap_list[i]->type > current_type)
284 current_type = overlap_list[i]->type;
285 /* continue building up new memmap based on this information */
286 if (current_type != last_type) {
287 if (last_type != 0) {
288 new_map[new_entry].size =
289 change_point[chgidx]->addr - last_addr;
290 /* move forward only if the new size was non-zero */
291 if (new_map[new_entry].size != 0)
292 if (++new_entry >= BFIN_MEMMAP_MAX)
293 break; /* no more space left for new entries */
294 }
295 if (current_type != 0) {
296 new_map[new_entry].addr = change_point[chgidx]->addr;
297 new_map[new_entry].type = current_type;
298 last_addr = change_point[chgidx]->addr;
299 }
300 last_type = current_type;
301 }
302 }
303 new_nr = new_entry; /* retain count for new entries */
304
305 /* copy new mapping into original location */
306 memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
307 *pnr_map = new_nr;
308
309 return 0;
310}
311
312static void __init print_memory_map(char *who)
313{
314 int i;
315
316 for (i = 0; i < bfin_memmap.nr_map; i++) {
317 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
318 bfin_memmap.map[i].addr,
319 bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
320 switch (bfin_memmap.map[i].type) {
321 case BFIN_MEMMAP_RAM:
322 printk("(usable)\n");
323 break;
324 case BFIN_MEMMAP_RESERVED:
325 printk("(reserved)\n");
326 break;
327 default: printk("type %lu\n", bfin_memmap.map[i].type);
328 break;
329 }
330 }
331}
332
333static __init int parse_memmap(char *arg)
334{
335 unsigned long long start_at, mem_size;
336
337 if (!arg)
338 return -EINVAL;
339
340 mem_size = memparse(arg, &arg);
341 if (*arg == '@') {
342 start_at = memparse(arg+1, &arg);
343 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
344 } else if (*arg == '$') {
345 start_at = memparse(arg+1, &arg);
346 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
347 }
348
349 return 0;
350}
351
1394f032
BW
352/*
353 * Initial parsing of the command line. Currently, we support:
354 * - Controlling the linux memory size: mem=xxx[KMG]
355 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
356 * $ -> reserved memory is dcacheable
357 * # -> reserved memory is icacheable
856783b3
YL
358 * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
359 * @ from <start> to <start>+<mem>, type RAM
360 * $ from <start> to <start>+<mem>, type RESERVED
361 *
1394f032
BW
362 */
363static __init void parse_cmdline_early(char *cmdline_p)
364{
365 char c = ' ', *to = cmdline_p;
366 unsigned int memsize;
367 for (;;) {
368 if (c == ' ') {
1394f032
BW
369 if (!memcmp(to, "mem=", 4)) {
370 to += 4;
371 memsize = memparse(to, &to);
372 if (memsize)
373 _ramend = memsize;
374
375 } else if (!memcmp(to, "max_mem=", 8)) {
376 to += 8;
377 memsize = memparse(to, &to);
378 if (memsize) {
379 physical_mem_end = memsize;
380 if (*to != ' ') {
381 if (*to == '$'
382 || *(to + 1) == '$')
383 reserved_mem_dcache_on =
384 1;
385 if (*to == '#'
386 || *(to + 1) == '#')
387 reserved_mem_icache_on =
388 1;
389 }
390 }
ce3afa1c
RG
391 } else if (!memcmp(to, "earlyprintk=", 12)) {
392 to += 12;
393 setup_early_printk(to);
856783b3
YL
394 } else if (!memcmp(to, "memmap=", 7)) {
395 to += 7;
396 parse_memmap(to);
1394f032 397 }
1394f032
BW
398 }
399 c = *(to++);
400 if (!c)
401 break;
402 }
403}
404
856783b3
YL
405/*
406 * Setup memory defaults from user config.
407 * The physical memory layout looks like:
408 *
409 * [_rambase, _ramstart]: kernel image
410 * [memory_start, memory_end]: dynamic memory managed by kernel
411 * [memory_end, _ramend]: reserved memory
412 * [meory_mtd_start(memory_end),
413 * memory_mtd_start + mtd_size]: rootfs (if any)
414 * [_ramend - DMA_UNCACHED_REGION,
415 * _ramend]: uncached DMA region
416 * [_ramend, physical_mem_end]: memory not managed by kernel
417 *
418 */
419static __init void memory_setup(void)
1394f032 420{
c0eab3b7
MF
421#ifdef CONFIG_MTD_UCLINUX
422 unsigned long mtd_phys = 0;
423#endif
424
856783b3 425 _rambase = (unsigned long)_stext;
b7627acc 426 _ramstart = (unsigned long)_end;
1394f032 427
856783b3
YL
428 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
429 console_init();
430 panic("DMA region exceeds memory limit: %lu.\n",
431 _ramend - _ramstart);
1aafd909 432 }
1394f032
BW
433 memory_end = _ramend - DMA_UNCACHED_REGION;
434
b97b8a99
BS
435#ifdef CONFIG_MPU
436 /* Round up to multiple of 4MB. */
437 memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
438#else
1394f032 439 memory_start = PAGE_ALIGN(_ramstart);
b97b8a99 440#endif
1394f032
BW
441
442#if defined(CONFIG_MTD_UCLINUX)
443 /* generic memory mapped MTD driver */
444 memory_mtd_end = memory_end;
445
446 mtd_phys = _ramstart;
447 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
448
449# if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
450 if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
451 mtd_size =
452 PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
453# endif
454
455# if defined(CONFIG_CRAMFS)
456 if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
457 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
458# endif
459
460# if defined(CONFIG_ROMFS_FS)
461 if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
462 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
463 mtd_size =
464 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
3bebca2d 465# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
1394f032
BW
466 /* Due to a Hardware Anomaly we need to limit the size of usable
467 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
468 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
469 */
470# if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
471 if (memory_end >= 56 * 1024 * 1024)
472 memory_end = 56 * 1024 * 1024;
473# else
474 if (memory_end >= 60 * 1024 * 1024)
475 memory_end = 60 * 1024 * 1024;
476# endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
477# endif /* ANOMALY_05000263 */
478# endif /* CONFIG_ROMFS_FS */
479
480 memory_end -= mtd_size;
481
482 if (mtd_size == 0) {
483 console_init();
484 panic("Don't boot kernel without rootfs attached.\n");
485 }
486
487 /* Relocate MTD image to the top of memory after the uncached memory area */
b7627acc 488 dma_memcpy((char *)memory_end, _end, mtd_size);
1394f032
BW
489
490 memory_mtd_start = memory_end;
491 _ebss = memory_mtd_start; /* define _ebss for compatible */
492#endif /* CONFIG_MTD_UCLINUX */
493
3bebca2d 494#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
1394f032
BW
495 /* Due to a Hardware Anomaly we need to limit the size of usable
496 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
497 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
498 */
499#if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
500 if (memory_end >= 56 * 1024 * 1024)
501 memory_end = 56 * 1024 * 1024;
502#else
503 if (memory_end >= 60 * 1024 * 1024)
504 memory_end = 60 * 1024 * 1024;
505#endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
506 printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
507#endif /* ANOMALY_05000263 */
508
b97b8a99
BS
509#ifdef CONFIG_MPU
510 page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
511 page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
512#endif
513
1394f032 514#if !defined(CONFIG_MTD_UCLINUX)
856783b3
YL
515 /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
516 memory_end -= SIZE_4K;
1394f032 517#endif
856783b3 518
1394f032
BW
519 init_mm.start_code = (unsigned long)_stext;
520 init_mm.end_code = (unsigned long)_etext;
521 init_mm.end_data = (unsigned long)_edata;
522 init_mm.brk = (unsigned long)0;
523
856783b3
YL
524 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
525 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
526
b7627acc 527 printk(KERN_INFO "Memory map:\n"
8929ecf8 528 KERN_INFO " fixedcode = 0x%p-0x%p\n"
856783b3
YL
529 KERN_INFO " text = 0x%p-0x%p\n"
530 KERN_INFO " rodata = 0x%p-0x%p\n"
b7627acc 531 KERN_INFO " bss = 0x%p-0x%p\n"
856783b3
YL
532 KERN_INFO " data = 0x%p-0x%p\n"
533 KERN_INFO " stack = 0x%p-0x%p\n"
534 KERN_INFO " init = 0x%p-0x%p\n"
856783b3
YL
535 KERN_INFO " available = 0x%p-0x%p\n"
536#ifdef CONFIG_MTD_UCLINUX
537 KERN_INFO " rootfs = 0x%p-0x%p\n"
538#endif
539#if DMA_UNCACHED_REGION > 0
540 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
541#endif
8929ecf8
MF
542 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
543 _stext, _etext,
856783b3 544 __start_rodata, __end_rodata,
b7627acc 545 __bss_start, __bss_stop,
856783b3
YL
546 _sdata, _edata,
547 (void *)&init_thread_union,
548 (void *)((int)(&init_thread_union) + 0x2000),
b7627acc
MF
549 __init_begin, __init_end,
550 (void *)_ramstart, (void *)memory_end
856783b3
YL
551#ifdef CONFIG_MTD_UCLINUX
552 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
553#endif
554#if DMA_UNCACHED_REGION > 0
555 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
556#endif
557 );
558}
559
2e8d7965
YL
560/*
561 * Find the lowest, highest page frame number we have available
562 */
563void __init find_min_max_pfn(void)
564{
565 int i;
566
567 max_pfn = 0;
568 min_low_pfn = memory_end;
569
570 for (i = 0; i < bfin_memmap.nr_map; i++) {
571 unsigned long start, end;
572 /* RAM? */
573 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
574 continue;
575 start = PFN_UP(bfin_memmap.map[i].addr);
576 end = PFN_DOWN(bfin_memmap.map[i].addr +
577 bfin_memmap.map[i].size);
578 if (start >= end)
579 continue;
580 if (end > max_pfn)
581 max_pfn = end;
582 if (start < min_low_pfn)
583 min_low_pfn = start;
584 }
585}
586
856783b3
YL
587static __init void setup_bootmem_allocator(void)
588{
589 int bootmap_size;
590 int i;
2e8d7965 591 unsigned long start_pfn, end_pfn;
856783b3
YL
592 unsigned long curr_pfn, last_pfn, size;
593
594 /* mark memory between memory_start and memory_end usable */
595 add_memory_region(memory_start,
596 memory_end - memory_start, BFIN_MEMMAP_RAM);
597 /* sanity check for overlap */
598 sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
599 print_memory_map("boot memmap");
600
2e8d7965
YL
601 /* intialize globals in linux/bootmem.h */
602 find_min_max_pfn();
603 /* pfn of the last usable page frame */
604 if (max_pfn > memory_end >> PAGE_SHIFT)
605 max_pfn = memory_end >> PAGE_SHIFT;
606 /* pfn of last page frame directly mapped by kernel */
607 max_low_pfn = max_pfn;
608 /* pfn of the first usable page frame after kernel image*/
609 if (min_low_pfn < memory_start >> PAGE_SHIFT)
610 min_low_pfn = memory_start >> PAGE_SHIFT;
611
612 start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
613 end_pfn = memory_end >> PAGE_SHIFT;
856783b3
YL
614
615 /*
616 * give all the memory to the bootmap allocator, tell it to put the
617 * boot mem_map at the start of memory.
618 */
619 bootmap_size = init_bootmem_node(NODE_DATA(0),
620 memory_start >> PAGE_SHIFT, /* map goes here */
2e8d7965 621 start_pfn, end_pfn);
856783b3
YL
622
623 /* register the memmap regions with the bootmem allocator */
624 for (i = 0; i < bfin_memmap.nr_map; i++) {
625 /*
626 * Reserve usable memory
627 */
628 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
629 continue;
630 /*
631 * We are rounding up the start address of usable memory:
632 */
633 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
2e8d7965 634 if (curr_pfn >= end_pfn)
856783b3
YL
635 continue;
636 /*
637 * ... and at the end of the usable range downwards:
638 */
639 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
640 bfin_memmap.map[i].size);
641
2e8d7965
YL
642 if (last_pfn > end_pfn)
643 last_pfn = end_pfn;
856783b3
YL
644
645 /*
646 * .. finally, did all the rounding and playing
647 * around just make the area go away?
648 */
649 if (last_pfn <= curr_pfn)
650 continue;
651
652 size = last_pfn - curr_pfn;
653 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
654 }
655
656 /* reserve memory before memory_start, including bootmap */
657 reserve_bootmem(PAGE_OFFSET,
658 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
659 BOOTMEM_DEFAULT);
660}
661
a086ee22
MF
662#define EBSZ_TO_MEG(ebsz) \
663({ \
664 int meg = 0; \
665 switch (ebsz & 0xf) { \
666 case 0x1: meg = 16; break; \
667 case 0x3: meg = 32; break; \
668 case 0x5: meg = 64; break; \
669 case 0x7: meg = 128; break; \
670 case 0x9: meg = 256; break; \
671 case 0xb: meg = 512; break; \
672 } \
673 meg; \
674})
675static inline int __init get_mem_size(void)
676{
99d95bbd
MH
677#if defined(EBIU_SDBCTL)
678# if defined(BF561_FAMILY)
a086ee22
MF
679 int ret = 0;
680 u32 sdbctl = bfin_read_EBIU_SDBCTL();
681 ret += EBSZ_TO_MEG(sdbctl >> 0);
682 ret += EBSZ_TO_MEG(sdbctl >> 8);
683 ret += EBSZ_TO_MEG(sdbctl >> 16);
684 ret += EBSZ_TO_MEG(sdbctl >> 24);
685 return ret;
99d95bbd 686# else
a086ee22 687 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
99d95bbd
MH
688# endif
689#elif defined(EBIU_DDRCTL1)
1e78042c
MH
690 u32 ddrctl = bfin_read_EBIU_DDRCTL1();
691 int ret = 0;
692 switch (ddrctl & 0xc0000) {
693 case DEVSZ_64: ret = 64 / 8;
694 case DEVSZ_128: ret = 128 / 8;
695 case DEVSZ_256: ret = 256 / 8;
696 case DEVSZ_512: ret = 512 / 8;
697 }
698 switch (ddrctl & 0x30000) {
699 case DEVWD_4: ret *= 2;
700 case DEVWD_8: ret *= 2;
701 case DEVWD_16: break;
a086ee22 702 }
b1b154e5
MF
703 if ((ddrctl & 0xc000) == 0x4000)
704 ret *= 2;
1e78042c 705 return ret;
a086ee22
MF
706#endif
707 BUG();
708}
709
856783b3
YL
710void __init setup_arch(char **cmdline_p)
711{
9f8e895d 712 unsigned long sclk, cclk;
856783b3
YL
713
714#ifdef CONFIG_DUMMY_CONSOLE
715 conswitchp = &dummy_con;
716#endif
717
718#if defined(CONFIG_CMDLINE_BOOL)
719 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
720 command_line[sizeof(command_line) - 1] = 0;
721#endif
722
723 /* Keep a copy of command line */
724 *cmdline_p = &command_line[0];
725 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
726 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
727
728 /* setup memory defaults from the user config */
729 physical_mem_end = 0;
a086ee22 730 _ramend = get_mem_size() * 1024 * 1024;
856783b3
YL
731
732 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
733
734 parse_cmdline_early(&command_line[0]);
735
736 if (physical_mem_end == 0)
737 physical_mem_end = _ramend;
738
739 memory_setup();
740
741 cclk = get_cclk();
742 sclk = get_sclk();
743
744#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
745 if (ANOMALY_05000273 && cclk == sclk)
746 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
747#endif
748
749#ifdef BF561_FAMILY
750 if (ANOMALY_05000266) {
751 bfin_read_IMDMA_D0_IRQ_STATUS();
752 bfin_read_IMDMA_D1_IRQ_STATUS();
753 }
754#endif
755 printk(KERN_INFO "Hardware Trace ");
756 if (bfin_read_TBUFCTL() & 0x1)
757 printk("Active ");
758 else
759 printk("Off ");
760 if (bfin_read_TBUFCTL() & 0x2)
761 printk("and Enabled\n");
762 else
763 printk("and Disabled\n");
764
765#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
766 /* we need to initialize the Flashrom device here since we might
767 * do things with flash early on in the boot
768 */
769 flash_probe();
770#endif
771
7728ec33
RG
772 _bfin_swrst = bfin_read_SWRST();
773
774 if (_bfin_swrst & RESET_DOUBLE)
775 printk(KERN_INFO "Recovering from Double Fault event\n");
776 else if (_bfin_swrst & RESET_WDOG)
777 printk(KERN_INFO "Recovering from Watchdog event\n");
778 else if (_bfin_swrst & RESET_SOFTWARE)
779 printk(KERN_NOTICE "Reset caused by Software reset\n");
780
550d5538 781 printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
de3025f4
JZ
782 if (bfin_compiled_revid() == 0xffff)
783 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
784 else if (bfin_compiled_revid() == -1)
785 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
786 else
787 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
788 if (bfin_revid() != bfin_compiled_revid()) {
789 if (bfin_compiled_revid() == -1)
790 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
791 bfin_revid());
792 else if (bfin_compiled_revid() != 0xffff)
793 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
794 bfin_compiled_revid(), bfin_revid());
795 }
1394f032
BW
796 if (bfin_revid() < SUPPORTED_REVID)
797 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
798 CPU, bfin_revid());
799 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
800
b5c0e2e8 801 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
1394f032
BW
802 cclk / 1000000, sclk / 1000000);
803
1aafd909 804 if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
1394f032 805 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
1394f032 806
856783b3 807 setup_bootmem_allocator();
1394f032 808
1394f032
BW
809 paging_init();
810
7adfb58f
BS
811 /* Copy atomic sequences to their fixed location, and sanity check that
812 these locations are the ones that we advertise to userspace. */
813 memcpy((void *)FIXED_CODE_START, &fixed_code_start,
814 FIXED_CODE_END - FIXED_CODE_START);
815 BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
816 != SIGRETURN_STUB - FIXED_CODE_START);
817 BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
818 != ATOMIC_XCHG32 - FIXED_CODE_START);
819 BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
820 != ATOMIC_CAS32 - FIXED_CODE_START);
821 BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
822 != ATOMIC_ADD32 - FIXED_CODE_START);
823 BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
824 != ATOMIC_SUB32 - FIXED_CODE_START);
825 BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
826 != ATOMIC_IOR32 - FIXED_CODE_START);
827 BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
828 != ATOMIC_AND32 - FIXED_CODE_START);
829 BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
830 != ATOMIC_XOR32 - FIXED_CODE_START);
9f336a53
RG
831 BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
832 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
29440a2b 833
8be80ed3 834 init_exception_vectors();
29440a2b 835 bf53x_cache_init();
1394f032
BW
836}
837
1394f032
BW
838static int __init topology_init(void)
839{
6cda2e90
MH
840 int cpu;
841
842 for_each_possible_cpu(cpu) {
843 struct cpu *c = &per_cpu(cpu_devices, cpu);
844
845 register_cpu(c, cpu);
846 }
847
1394f032 848 return 0;
1394f032
BW
849}
850
851subsys_initcall(topology_init);
852
52a07812 853static u_long get_vco(void)
1394f032
BW
854{
855 u_long msel;
856 u_long vco;
857
858 msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
859 if (0 == msel)
860 msel = 64;
861
862 vco = CONFIG_CLKIN_HZ;
863 vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */
864 vco = msel * vco;
865 return vco;
866}
867
2f6cf7bf 868/* Get the Core clock */
1394f032
BW
869u_long get_cclk(void)
870{
871 u_long csel, ssel;
872 if (bfin_read_PLL_STAT() & 0x1)
873 return CONFIG_CLKIN_HZ;
874
875 ssel = bfin_read_PLL_DIV();
876 csel = ((ssel >> 4) & 0x03);
877 ssel &= 0xf;
878 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
879 return get_vco() / ssel;
880 return get_vco() >> csel;
881}
1394f032
BW
882EXPORT_SYMBOL(get_cclk);
883
884/* Get the System clock */
885u_long get_sclk(void)
886{
887 u_long ssel;
888
889 if (bfin_read_PLL_STAT() & 0x1)
890 return CONFIG_CLKIN_HZ;
891
892 ssel = (bfin_read_PLL_DIV() & 0xf);
893 if (0 == ssel) {
894 printk(KERN_WARNING "Invalid System Clock\n");
895 ssel = 1;
896 }
897
898 return get_vco() / ssel;
899}
1394f032
BW
900EXPORT_SYMBOL(get_sclk);
901
2f6cf7bf
MF
902unsigned long sclk_to_usecs(unsigned long sclk)
903{
1754a5d9
MF
904 u64 tmp = USEC_PER_SEC * (u64)sclk;
905 do_div(tmp, get_sclk());
906 return tmp;
2f6cf7bf
MF
907}
908EXPORT_SYMBOL(sclk_to_usecs);
909
910unsigned long usecs_to_sclk(unsigned long usecs)
911{
1754a5d9
MF
912 u64 tmp = get_sclk() * (u64)usecs;
913 do_div(tmp, USEC_PER_SEC);
914 return tmp;
2f6cf7bf
MF
915}
916EXPORT_SYMBOL(usecs_to_sclk);
917
1394f032
BW
918/*
919 * Get CPU information for use by the procfs.
920 */
921static int show_cpuinfo(struct seq_file *m, void *v)
922{
066954a3 923 char *cpu, *mmu, *fpu, *vendor, *cache;
1394f032
BW
924 uint32_t revid;
925
926 u_long cclk = 0, sclk = 0;
927 u_int dcache_size = 0, dsup_banks = 0;
928
929 cpu = CPU;
930 mmu = "none";
931 fpu = "none";
932 revid = bfin_revid();
1394f032
BW
933
934 cclk = get_cclk();
935 sclk = get_sclk();
936
73b0c0b0 937 switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
066954a3
MF
938 case 0xca:
939 vendor = "Analog Devices";
73b0c0b0
RG
940 break;
941 default:
066954a3
MF
942 vendor = "unknown";
943 break;
73b0c0b0 944 }
1394f032 945
73b0c0b0
RG
946 seq_printf(m, "processor\t: %d\n"
947 "vendor_id\t: %s\n"
948 "cpu family\t: 0x%x\n"
253bcf4f 949 "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
73b0c0b0
RG
950 "stepping\t: %d\n",
951 0,
952 vendor,
953 (bfin_read_CHIPID() & CHIPID_FAMILY),
954 cpu, cclk/1000000, sclk/1000000,
253bcf4f
RG
955#ifdef CONFIG_MPU
956 "mpu on",
957#else
958 "mpu off",
959#endif
73b0c0b0
RG
960 revid);
961
962 seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
963 cclk/1000000, cclk%1000000,
964 sclk/1000000, sclk%1000000);
965 seq_printf(m, "bogomips\t: %lu.%02lu\n"
966 "Calibration\t: %lu loops\n",
967 (loops_per_jiffy * HZ) / 500000,
968 ((loops_per_jiffy * HZ) / 5000) % 100,
969 (loops_per_jiffy * HZ));
970
971 /* Check Cache configutation */
1f83b8f1
MF
972 switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
973 case ACACHE_BSRAM:
066954a3 974 cache = "dbank-A/B\t: cache/sram";
1f83b8f1
MF
975 dcache_size = 16;
976 dsup_banks = 1;
977 break;
978 case ACACHE_BCACHE:
066954a3 979 cache = "dbank-A/B\t: cache/cache";
1f83b8f1
MF
980 dcache_size = 32;
981 dsup_banks = 2;
982 break;
983 case ASRAM_BSRAM:
066954a3 984 cache = "dbank-A/B\t: sram/sram";
1f83b8f1
MF
985 dcache_size = 0;
986 dsup_banks = 0;
987 break;
988 default:
066954a3 989 cache = "unknown";
73b0c0b0
RG
990 dcache_size = 0;
991 dsup_banks = 0;
1394f032
BW
992 break;
993 }
994
73b0c0b0
RG
995 /* Is it turned on? */
996 if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)))
997 dcache_size = 0;
1394f032 998
73b0c0b0
RG
999 seq_printf(m, "cache size\t: %d KB(L1 icache) "
1000 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
1001 BFIN_ICACHESIZE / 1024, dcache_size,
1002#if defined CONFIG_BFIN_WB
1003 "wb"
1004#elif defined CONFIG_BFIN_WT
1005 "wt"
1006#endif
da27abb7 1007 "", 0);
73b0c0b0
RG
1008
1009 seq_printf(m, "%s\n", cache);
1010
1011 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
3bebca2d 1012 BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1394f032 1013 seq_printf(m,
73b0c0b0 1014 "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
3bebca2d
RG
1015 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1016 BFIN_DLINES);
1017#ifdef CONFIG_BFIN_ICACHE_LOCK
1394f032
BW
1018 switch (read_iloc()) {
1019 case WAY0_L:
1020 seq_printf(m, "Way0 Locked-Down\n");
1021 break;
1022 case WAY1_L:
1023 seq_printf(m, "Way1 Locked-Down\n");
1024 break;
1025 case WAY01_L:
1026 seq_printf(m, "Way0,Way1 Locked-Down\n");
1027 break;
1028 case WAY2_L:
1029 seq_printf(m, "Way2 Locked-Down\n");
1030 break;
1031 case WAY02_L:
1032 seq_printf(m, "Way0,Way2 Locked-Down\n");
1033 break;
1034 case WAY12_L:
1035 seq_printf(m, "Way1,Way2 Locked-Down\n");
1036 break;
1037 case WAY012_L:
1038 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1039 break;
1040 case WAY3_L:
1041 seq_printf(m, "Way3 Locked-Down\n");
1042 break;
1043 case WAY03_L:
1044 seq_printf(m, "Way0,Way3 Locked-Down\n");
1045 break;
1046 case WAY13_L:
1047 seq_printf(m, "Way1,Way3 Locked-Down\n");
1048 break;
1049 case WAY013_L:
1050 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1051 break;
1052 case WAY32_L:
1053 seq_printf(m, "Way3,Way2 Locked-Down\n");
1054 break;
1055 case WAY320_L:
1056 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1057 break;
1058 case WAY321_L:
1059 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1060 break;
1061 case WAYALL_L:
1062 seq_printf(m, "All Ways are locked\n");
1063 break;
1064 default:
1065 seq_printf(m, "No Ways are locked\n");
1066 }
1067#endif
066954a3 1068 seq_printf(m, "board name\t: %s\n", bfin_board_name);
73b0c0b0
RG
1069 seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1070 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1071 seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1072 ((int)memory_end - (int)_stext) >> 10,
1073 _stext,
1074 (void *)memory_end);
1075
1394f032
BW
1076 return 0;
1077}
1078
1079static void *c_start(struct seq_file *m, loff_t *pos)
1080{
1081 return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
1082}
1083
1084static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1085{
1086 ++*pos;
1087 return c_start(m, pos);
1088}
1089
1090static void c_stop(struct seq_file *m, void *v)
1091{
1092}
1093
03a44825 1094const struct seq_operations cpuinfo_op = {
1394f032
BW
1095 .start = c_start,
1096 .next = c_next,
1097 .stop = c_stop,
1098 .show = show_cpuinfo,
1099};
1100
5e10b4a6 1101void __init cmdline_init(const char *r0)
1394f032
BW
1102{
1103 if (r0)
52a07812 1104 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1394f032 1105}
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