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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/kernel/setup.c | |
3 | * Based on: | |
4 | * Author: | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2004-2006 Analog Devices Inc. | |
11 | * | |
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, see the file COPYING, or write | |
26 | * to the Free Software Foundation, Inc., | |
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
28 | */ | |
29 | ||
30 | #include <linux/delay.h> | |
31 | #include <linux/console.h> | |
32 | #include <linux/bootmem.h> | |
33 | #include <linux/seq_file.h> | |
34 | #include <linux/cpu.h> | |
35 | #include <linux/module.h> | |
1394f032 BW |
36 | #include <linux/tty.h> |
37 | ||
38 | #include <linux/ext2_fs.h> | |
39 | #include <linux/cramfs_fs.h> | |
40 | #include <linux/romfs_fs.h> | |
41 | ||
42 | #include <asm/cacheflush.h> | |
43 | #include <asm/blackfin.h> | |
44 | #include <asm/cplbinit.h> | |
7adfb58f | 45 | #include <asm/fixed_code.h> |
1394f032 | 46 | |
a9c59c27 MF |
47 | u16 _bfin_swrst; |
48 | ||
1394f032 BW |
49 | unsigned long memory_start, memory_end, physical_mem_end; |
50 | unsigned long reserved_mem_dcache_on; | |
51 | unsigned long reserved_mem_icache_on; | |
52 | EXPORT_SYMBOL(memory_start); | |
53 | EXPORT_SYMBOL(memory_end); | |
54 | EXPORT_SYMBOL(physical_mem_end); | |
55 | EXPORT_SYMBOL(_ramend); | |
56 | ||
57 | #ifdef CONFIG_MTD_UCLINUX | |
58 | unsigned long memory_mtd_end, memory_mtd_start, mtd_size; | |
59 | unsigned long _ebss; | |
60 | EXPORT_SYMBOL(memory_mtd_end); | |
61 | EXPORT_SYMBOL(memory_mtd_start); | |
62 | EXPORT_SYMBOL(mtd_size); | |
63 | #endif | |
64 | ||
5e10b4a6 | 65 | char __initdata command_line[COMMAND_LINE_SIZE]; |
1394f032 | 66 | |
1394f032 BW |
67 | void __init bf53x_cache_init(void) |
68 | { | |
69 | #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) | |
70 | generate_cpl_tables(); | |
71 | #endif | |
72 | ||
73 | #ifdef CONFIG_BLKFIN_CACHE | |
74 | bfin_icache_init(); | |
75 | printk(KERN_INFO "Instruction Cache Enabled\n"); | |
76 | #endif | |
77 | ||
78 | #ifdef CONFIG_BLKFIN_DCACHE | |
79 | bfin_dcache_init(); | |
80 | printk(KERN_INFO "Data Cache Enabled" | |
81 | # if defined CONFIG_BLKFIN_WB | |
82 | " (write-back)" | |
83 | # elif defined CONFIG_BLKFIN_WT | |
84 | " (write-through)" | |
85 | # endif | |
86 | "\n"); | |
87 | #endif | |
88 | } | |
89 | ||
52a07812 | 90 | void __init bf53x_relocate_l1_mem(void) |
1394f032 BW |
91 | { |
92 | unsigned long l1_code_length; | |
93 | unsigned long l1_data_a_length; | |
94 | unsigned long l1_data_b_length; | |
95 | ||
96 | l1_code_length = _etext_l1 - _stext_l1; | |
97 | if (l1_code_length > L1_CODE_LENGTH) | |
98 | l1_code_length = L1_CODE_LENGTH; | |
99 | /* cannot complain as printk is not available as yet. | |
100 | * But we can continue booting and complain later! | |
101 | */ | |
102 | ||
103 | /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */ | |
104 | dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length); | |
105 | ||
106 | l1_data_a_length = _ebss_l1 - _sdata_l1; | |
107 | if (l1_data_a_length > L1_DATA_A_LENGTH) | |
108 | l1_data_a_length = L1_DATA_A_LENGTH; | |
109 | ||
110 | /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */ | |
111 | dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length); | |
112 | ||
113 | l1_data_b_length = _ebss_b_l1 - _sdata_b_l1; | |
114 | if (l1_data_b_length > L1_DATA_B_LENGTH) | |
115 | l1_data_b_length = L1_DATA_B_LENGTH; | |
116 | ||
117 | /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */ | |
118 | dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + | |
119 | l1_data_a_length, l1_data_b_length); | |
120 | ||
121 | } | |
122 | ||
123 | /* | |
124 | * Initial parsing of the command line. Currently, we support: | |
125 | * - Controlling the linux memory size: mem=xxx[KMG] | |
126 | * - Controlling the physical memory size: max_mem=xxx[KMG][$][#] | |
127 | * $ -> reserved memory is dcacheable | |
128 | * # -> reserved memory is icacheable | |
129 | */ | |
130 | static __init void parse_cmdline_early(char *cmdline_p) | |
131 | { | |
132 | char c = ' ', *to = cmdline_p; | |
133 | unsigned int memsize; | |
134 | for (;;) { | |
135 | if (c == ' ') { | |
136 | ||
137 | if (!memcmp(to, "mem=", 4)) { | |
138 | to += 4; | |
139 | memsize = memparse(to, &to); | |
140 | if (memsize) | |
141 | _ramend = memsize; | |
142 | ||
143 | } else if (!memcmp(to, "max_mem=", 8)) { | |
144 | to += 8; | |
145 | memsize = memparse(to, &to); | |
146 | if (memsize) { | |
147 | physical_mem_end = memsize; | |
148 | if (*to != ' ') { | |
149 | if (*to == '$' | |
150 | || *(to + 1) == '$') | |
151 | reserved_mem_dcache_on = | |
152 | 1; | |
153 | if (*to == '#' | |
154 | || *(to + 1) == '#') | |
155 | reserved_mem_icache_on = | |
156 | 1; | |
157 | } | |
158 | } | |
159 | } | |
160 | ||
161 | } | |
162 | c = *(to++); | |
163 | if (!c) | |
164 | break; | |
165 | } | |
166 | } | |
167 | ||
168 | void __init setup_arch(char **cmdline_p) | |
169 | { | |
170 | int bootmap_size; | |
171 | unsigned long l1_length, sclk, cclk; | |
172 | #ifdef CONFIG_MTD_UCLINUX | |
173 | unsigned long mtd_phys = 0; | |
174 | #endif | |
175 | ||
6e537e93 MH |
176 | #ifdef CONFIG_DUMMY_CONSOLE |
177 | conswitchp = &dummy_con; | |
178 | #endif | |
1394f032 BW |
179 | cclk = get_cclk(); |
180 | sclk = get_sclk(); | |
181 | ||
182 | #if !defined(CONFIG_BFIN_KERNEL_CLOCK) && defined(ANOMALY_05000273) | |
183 | if (cclk == sclk) | |
184 | panic("ANOMALY 05000273, SCLK can not be same as CCLK"); | |
185 | #endif | |
186 | ||
187 | #if defined(ANOMALY_05000266) | |
188 | bfin_read_IMDMA_D0_IRQ_STATUS(); | |
189 | bfin_read_IMDMA_D1_IRQ_STATUS(); | |
190 | #endif | |
191 | ||
192 | #ifdef DEBUG_SERIAL_EARLY_INIT | |
193 | bfin_console_init(); /* early console registration */ | |
194 | /* this give a chance to get printk() working before crash. */ | |
195 | #endif | |
196 | ||
669b792c RG |
197 | printk(KERN_INFO "Hardware Trace "); |
198 | if (bfin_read_TBUFCTL() & 0x1 ) | |
199 | printk("Active "); | |
200 | else | |
201 | printk("Off "); | |
202 | if (bfin_read_TBUFCTL() & 0x2) | |
203 | printk("and Enabled\n"); | |
204 | else | |
205 | printk("and Disabled\n"); | |
206 | ||
207 | ||
1394f032 BW |
208 | #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH) |
209 | /* we need to initialize the Flashrom device here since we might | |
210 | * do things with flash early on in the boot | |
211 | */ | |
212 | flash_probe(); | |
213 | #endif | |
214 | ||
215 | #if defined(CONFIG_CMDLINE_BOOL) | |
1394f032 BW |
216 | strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line)); |
217 | command_line[sizeof(command_line) - 1] = 0; | |
218 | #endif | |
219 | ||
220 | /* Keep a copy of command line */ | |
221 | *cmdline_p = &command_line[0]; | |
222 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); | |
5e10b4a6 | 223 | boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; |
1394f032 BW |
224 | |
225 | /* setup memory defaults from the user config */ | |
226 | physical_mem_end = 0; | |
227 | _ramend = CONFIG_MEM_SIZE * 1024 * 1024; | |
228 | ||
229 | parse_cmdline_early(&command_line[0]); | |
230 | ||
231 | if (physical_mem_end == 0) | |
232 | physical_mem_end = _ramend; | |
233 | ||
234 | /* by now the stack is part of the init task */ | |
235 | memory_end = _ramend - DMA_UNCACHED_REGION; | |
236 | ||
237 | _ramstart = (unsigned long)__bss_stop; | |
238 | memory_start = PAGE_ALIGN(_ramstart); | |
239 | ||
240 | #if defined(CONFIG_MTD_UCLINUX) | |
241 | /* generic memory mapped MTD driver */ | |
242 | memory_mtd_end = memory_end; | |
243 | ||
244 | mtd_phys = _ramstart; | |
245 | mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8))); | |
246 | ||
247 | # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS) | |
248 | if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC) | |
249 | mtd_size = | |
250 | PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10); | |
251 | # endif | |
252 | ||
253 | # if defined(CONFIG_CRAMFS) | |
254 | if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC) | |
255 | mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4))); | |
256 | # endif | |
257 | ||
258 | # if defined(CONFIG_ROMFS_FS) | |
259 | if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0 | |
260 | && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) | |
261 | mtd_size = | |
262 | PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); | |
263 | # if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) | |
264 | /* Due to a Hardware Anomaly we need to limit the size of usable | |
265 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on | |
266 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception | |
267 | */ | |
268 | # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO)) | |
269 | if (memory_end >= 56 * 1024 * 1024) | |
270 | memory_end = 56 * 1024 * 1024; | |
271 | # else | |
272 | if (memory_end >= 60 * 1024 * 1024) | |
273 | memory_end = 60 * 1024 * 1024; | |
274 | # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */ | |
275 | # endif /* ANOMALY_05000263 */ | |
276 | # endif /* CONFIG_ROMFS_FS */ | |
277 | ||
278 | memory_end -= mtd_size; | |
279 | ||
280 | if (mtd_size == 0) { | |
281 | console_init(); | |
282 | panic("Don't boot kernel without rootfs attached.\n"); | |
283 | } | |
284 | ||
285 | /* Relocate MTD image to the top of memory after the uncached memory area */ | |
286 | dma_memcpy((char *)memory_end, __bss_stop, mtd_size); | |
287 | ||
288 | memory_mtd_start = memory_end; | |
289 | _ebss = memory_mtd_start; /* define _ebss for compatible */ | |
290 | #endif /* CONFIG_MTD_UCLINUX */ | |
291 | ||
292 | #if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) | |
293 | /* Due to a Hardware Anomaly we need to limit the size of usable | |
294 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on | |
295 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception | |
296 | */ | |
297 | #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO)) | |
298 | if (memory_end >= 56 * 1024 * 1024) | |
299 | memory_end = 56 * 1024 * 1024; | |
300 | #else | |
301 | if (memory_end >= 60 * 1024 * 1024) | |
302 | memory_end = 60 * 1024 * 1024; | |
303 | #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */ | |
304 | printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20); | |
305 | #endif /* ANOMALY_05000263 */ | |
306 | ||
307 | #if !defined(CONFIG_MTD_UCLINUX) | |
308 | memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/ | |
309 | #endif | |
310 | init_mm.start_code = (unsigned long)_stext; | |
311 | init_mm.end_code = (unsigned long)_etext; | |
312 | init_mm.end_data = (unsigned long)_edata; | |
313 | init_mm.brk = (unsigned long)0; | |
314 | ||
315 | init_leds(); | |
316 | ||
317 | printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n"); | |
de3025f4 JZ |
318 | if (bfin_compiled_revid() == 0xffff) |
319 | printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); | |
320 | else if (bfin_compiled_revid() == -1) | |
321 | printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU); | |
322 | else | |
323 | printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid()); | |
324 | if (bfin_revid() != bfin_compiled_revid()) { | |
325 | if (bfin_compiled_revid() == -1) | |
326 | printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", | |
327 | bfin_revid()); | |
328 | else if (bfin_compiled_revid() != 0xffff) | |
329 | printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", | |
330 | bfin_compiled_revid(), bfin_revid()); | |
331 | } | |
1394f032 BW |
332 | if (bfin_revid() < SUPPORTED_REVID) |
333 | printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n", | |
334 | CPU, bfin_revid()); | |
335 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); | |
336 | ||
337 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu Mhz System Clock\n", | |
338 | cclk / 1000000, sclk / 1000000); | |
339 | ||
340 | #if defined(ANOMALY_05000273) | |
341 | if ((cclk >> 1) <= sclk) | |
342 | printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); | |
343 | #endif | |
344 | ||
345 | printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); | |
346 | printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); | |
347 | ||
348 | printk(KERN_INFO "Memory map:\n" | |
349 | KERN_INFO " text = 0x%p-0x%p\n" | |
86b73c8c | 350 | KERN_INFO " rodata = 0x%p-0x%p\n" |
1394f032 | 351 | KERN_INFO " data = 0x%p-0x%p\n" |
86b73c8c RG |
352 | KERN_INFO " stack = 0x%p-0x%p\n" |
353 | KERN_INFO " init = 0x%p-0x%p\n" | |
1394f032 BW |
354 | KERN_INFO " bss = 0x%p-0x%p\n" |
355 | KERN_INFO " available = 0x%p-0x%p\n" | |
356 | #ifdef CONFIG_MTD_UCLINUX | |
357 | KERN_INFO " rootfs = 0x%p-0x%p\n" | |
358 | #endif | |
359 | #if DMA_UNCACHED_REGION > 0 | |
360 | KERN_INFO " DMA Zone = 0x%p-0x%p\n" | |
361 | #endif | |
362 | , _stext, _etext, | |
86b73c8c | 363 | __start_rodata, __end_rodata, |
1394f032 | 364 | _sdata, _edata, |
1f83b8f1 | 365 | (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000), |
86b73c8c | 366 | __init_begin, __init_end, |
1394f032 | 367 | __bss_start, __bss_stop, |
1f83b8f1 | 368 | (void *)_ramstart, (void *)memory_end |
1394f032 | 369 | #ifdef CONFIG_MTD_UCLINUX |
1f83b8f1 | 370 | , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size) |
1394f032 BW |
371 | #endif |
372 | #if DMA_UNCACHED_REGION > 0 | |
1f83b8f1 | 373 | , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend) |
1394f032 BW |
374 | #endif |
375 | ); | |
376 | ||
377 | /* | |
378 | * give all the memory to the bootmap allocator, tell it to put the | |
379 | * boot mem_map at the start of memory | |
380 | */ | |
381 | bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */ | |
382 | PAGE_OFFSET >> PAGE_SHIFT, | |
383 | memory_end >> PAGE_SHIFT); | |
384 | /* | |
385 | * free the usable memory, we have to make sure we do not free | |
386 | * the bootmem bitmap so we then reserve it after freeing it :-) | |
387 | */ | |
388 | free_bootmem(memory_start, memory_end - memory_start); | |
389 | ||
390 | reserve_bootmem(memory_start, bootmap_size); | |
391 | /* | |
392 | * get kmalloc into gear | |
393 | */ | |
394 | paging_init(); | |
395 | ||
396 | /* check the size of the l1 area */ | |
397 | l1_length = _etext_l1 - _stext_l1; | |
398 | if (l1_length > L1_CODE_LENGTH) | |
34e0fc89 | 399 | panic("L1 code memory overflow\n"); |
1394f032 BW |
400 | |
401 | l1_length = _ebss_l1 - _sdata_l1; | |
402 | if (l1_length > L1_DATA_A_LENGTH) | |
34e0fc89 | 403 | panic("L1 data memory overflow\n"); |
1394f032 | 404 | |
a9c59c27 | 405 | _bfin_swrst = bfin_read_SWRST(); |
a9c59c27 | 406 | |
7adfb58f BS |
407 | /* Copy atomic sequences to their fixed location, and sanity check that |
408 | these locations are the ones that we advertise to userspace. */ | |
409 | memcpy((void *)FIXED_CODE_START, &fixed_code_start, | |
410 | FIXED_CODE_END - FIXED_CODE_START); | |
411 | BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start | |
412 | != SIGRETURN_STUB - FIXED_CODE_START); | |
413 | BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start | |
414 | != ATOMIC_XCHG32 - FIXED_CODE_START); | |
415 | BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start | |
416 | != ATOMIC_CAS32 - FIXED_CODE_START); | |
417 | BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start | |
418 | != ATOMIC_ADD32 - FIXED_CODE_START); | |
419 | BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start | |
420 | != ATOMIC_SUB32 - FIXED_CODE_START); | |
421 | BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start | |
422 | != ATOMIC_IOR32 - FIXED_CODE_START); | |
423 | BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start | |
424 | != ATOMIC_AND32 - FIXED_CODE_START); | |
425 | BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start | |
426 | != ATOMIC_XOR32 - FIXED_CODE_START); | |
29440a2b BS |
427 | |
428 | bf53x_cache_init(); | |
1394f032 BW |
429 | } |
430 | ||
1394f032 BW |
431 | static int __init topology_init(void) |
432 | { | |
433 | #if defined (CONFIG_BF561) | |
c0fc525d | 434 | static struct cpu cpu[2]; |
1394f032 BW |
435 | register_cpu(&cpu[0], 0); |
436 | register_cpu(&cpu[1], 1); | |
437 | return 0; | |
438 | #else | |
c0fc525d | 439 | static struct cpu cpu[1]; |
1394f032 BW |
440 | return register_cpu(cpu, 0); |
441 | #endif | |
442 | } | |
443 | ||
444 | subsys_initcall(topology_init); | |
445 | ||
52a07812 | 446 | static u_long get_vco(void) |
1394f032 BW |
447 | { |
448 | u_long msel; | |
449 | u_long vco; | |
450 | ||
451 | msel = (bfin_read_PLL_CTL() >> 9) & 0x3F; | |
452 | if (0 == msel) | |
453 | msel = 64; | |
454 | ||
455 | vco = CONFIG_CLKIN_HZ; | |
456 | vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */ | |
457 | vco = msel * vco; | |
458 | return vco; | |
459 | } | |
460 | ||
461 | /*Get the Core clock*/ | |
462 | u_long get_cclk(void) | |
463 | { | |
464 | u_long csel, ssel; | |
465 | if (bfin_read_PLL_STAT() & 0x1) | |
466 | return CONFIG_CLKIN_HZ; | |
467 | ||
468 | ssel = bfin_read_PLL_DIV(); | |
469 | csel = ((ssel >> 4) & 0x03); | |
470 | ssel &= 0xf; | |
471 | if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */ | |
472 | return get_vco() / ssel; | |
473 | return get_vco() >> csel; | |
474 | } | |
1394f032 BW |
475 | EXPORT_SYMBOL(get_cclk); |
476 | ||
477 | /* Get the System clock */ | |
478 | u_long get_sclk(void) | |
479 | { | |
480 | u_long ssel; | |
481 | ||
482 | if (bfin_read_PLL_STAT() & 0x1) | |
483 | return CONFIG_CLKIN_HZ; | |
484 | ||
485 | ssel = (bfin_read_PLL_DIV() & 0xf); | |
486 | if (0 == ssel) { | |
487 | printk(KERN_WARNING "Invalid System Clock\n"); | |
488 | ssel = 1; | |
489 | } | |
490 | ||
491 | return get_vco() / ssel; | |
492 | } | |
1394f032 BW |
493 | EXPORT_SYMBOL(get_sclk); |
494 | ||
495 | /* | |
496 | * Get CPU information for use by the procfs. | |
497 | */ | |
498 | static int show_cpuinfo(struct seq_file *m, void *v) | |
499 | { | |
500 | char *cpu, *mmu, *fpu, *name; | |
501 | uint32_t revid; | |
502 | ||
503 | u_long cclk = 0, sclk = 0; | |
504 | u_int dcache_size = 0, dsup_banks = 0; | |
505 | ||
506 | cpu = CPU; | |
507 | mmu = "none"; | |
508 | fpu = "none"; | |
509 | revid = bfin_revid(); | |
510 | name = bfin_board_name; | |
511 | ||
512 | cclk = get_cclk(); | |
513 | sclk = get_sclk(); | |
514 | ||
515 | seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n" | |
516 | "MMU:\t\t%s\n" | |
517 | "FPU:\t\t%s\n" | |
518 | "Core Clock:\t%9lu Hz\n" | |
519 | "System Clock:\t%9lu Hz\n" | |
520 | "BogoMips:\t%lu.%02lu\n" | |
521 | "Calibration:\t%lu loops\n", | |
522 | cpu, revid, mmu, fpu, | |
523 | cclk, | |
524 | sclk, | |
525 | (loops_per_jiffy * HZ) / 500000, | |
526 | ((loops_per_jiffy * HZ) / 5000) % 100, | |
527 | (loops_per_jiffy * HZ)); | |
528 | seq_printf(m, "Board Name:\t%s\n", name); | |
529 | seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20); | |
530 | seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20); | |
531 | if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC)) | |
532 | seq_printf(m, "I-CACHE:\tON\n"); | |
533 | else | |
534 | seq_printf(m, "I-CACHE:\tOFF\n"); | |
535 | if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)) | |
536 | seq_printf(m, "D-CACHE:\tON" | |
537 | #if defined CONFIG_BLKFIN_WB | |
538 | " (write-back)" | |
539 | #elif defined CONFIG_BLKFIN_WT | |
540 | " (write-through)" | |
541 | #endif | |
542 | "\n"); | |
543 | else | |
544 | seq_printf(m, "D-CACHE:\tOFF\n"); | |
545 | ||
546 | ||
1f83b8f1 MF |
547 | switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) { |
548 | case ACACHE_BSRAM: | |
549 | seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n"); | |
550 | dcache_size = 16; | |
551 | dsup_banks = 1; | |
552 | break; | |
553 | case ACACHE_BCACHE: | |
554 | seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n"); | |
555 | dcache_size = 32; | |
556 | dsup_banks = 2; | |
557 | break; | |
558 | case ASRAM_BSRAM: | |
559 | seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n"); | |
560 | dcache_size = 0; | |
561 | dsup_banks = 0; | |
562 | break; | |
563 | default: | |
1394f032 BW |
564 | break; |
565 | } | |
566 | ||
567 | ||
568 | seq_printf(m, "I-CACHE Size:\t%dKB\n", BLKFIN_ICACHESIZE / 1024); | |
569 | seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size); | |
570 | seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n", | |
571 | BLKFIN_ISUBBANKS, BLKFIN_IWAYS, BLKFIN_ILINES); | |
572 | seq_printf(m, | |
573 | "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n", | |
574 | dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS, | |
575 | BLKFIN_DLINES); | |
576 | #ifdef CONFIG_BLKFIN_CACHE_LOCK | |
577 | switch (read_iloc()) { | |
578 | case WAY0_L: | |
579 | seq_printf(m, "Way0 Locked-Down\n"); | |
580 | break; | |
581 | case WAY1_L: | |
582 | seq_printf(m, "Way1 Locked-Down\n"); | |
583 | break; | |
584 | case WAY01_L: | |
585 | seq_printf(m, "Way0,Way1 Locked-Down\n"); | |
586 | break; | |
587 | case WAY2_L: | |
588 | seq_printf(m, "Way2 Locked-Down\n"); | |
589 | break; | |
590 | case WAY02_L: | |
591 | seq_printf(m, "Way0,Way2 Locked-Down\n"); | |
592 | break; | |
593 | case WAY12_L: | |
594 | seq_printf(m, "Way1,Way2 Locked-Down\n"); | |
595 | break; | |
596 | case WAY012_L: | |
597 | seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n"); | |
598 | break; | |
599 | case WAY3_L: | |
600 | seq_printf(m, "Way3 Locked-Down\n"); | |
601 | break; | |
602 | case WAY03_L: | |
603 | seq_printf(m, "Way0,Way3 Locked-Down\n"); | |
604 | break; | |
605 | case WAY13_L: | |
606 | seq_printf(m, "Way1,Way3 Locked-Down\n"); | |
607 | break; | |
608 | case WAY013_L: | |
609 | seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n"); | |
610 | break; | |
611 | case WAY32_L: | |
612 | seq_printf(m, "Way3,Way2 Locked-Down\n"); | |
613 | break; | |
614 | case WAY320_L: | |
615 | seq_printf(m, "Way3,Way2,Way0 Locked-Down\n"); | |
616 | break; | |
617 | case WAY321_L: | |
618 | seq_printf(m, "Way3,Way2,Way1 Locked-Down\n"); | |
619 | break; | |
620 | case WAYALL_L: | |
621 | seq_printf(m, "All Ways are locked\n"); | |
622 | break; | |
623 | default: | |
624 | seq_printf(m, "No Ways are locked\n"); | |
625 | } | |
626 | #endif | |
627 | return 0; | |
628 | } | |
629 | ||
630 | static void *c_start(struct seq_file *m, loff_t *pos) | |
631 | { | |
632 | return *pos < NR_CPUS ? ((void *)0x12345678) : NULL; | |
633 | } | |
634 | ||
635 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
636 | { | |
637 | ++*pos; | |
638 | return c_start(m, pos); | |
639 | } | |
640 | ||
641 | static void c_stop(struct seq_file *m, void *v) | |
642 | { | |
643 | } | |
644 | ||
645 | struct seq_operations cpuinfo_op = { | |
646 | .start = c_start, | |
647 | .next = c_next, | |
648 | .stop = c_stop, | |
649 | .show = show_cpuinfo, | |
650 | }; | |
651 | ||
5e10b4a6 | 652 | void __init cmdline_init(const char *r0) |
1394f032 BW |
653 | { |
654 | if (r0) | |
52a07812 | 655 | strncpy(command_line, r0, COMMAND_LINE_SIZE); |
1394f032 | 656 | } |