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Blackfin arch: Remove useless head file
[deliverable/linux.git] / arch / blackfin / kernel / setup.c
CommitLineData
1394f032 1/*
550d5538 2 * arch/blackfin/kernel/setup.c
1394f032 3 *
550d5538 4 * Copyright 2004-2006 Analog Devices Inc.
1394f032 5 *
550d5538 6 * Enter bugs at http://blackfin.uclinux.org/
1394f032 7 *
550d5538 8 * Licensed under the GPL-2 or later.
1394f032
BW		 9 */
10
11#include <linux/delay.h>
12#include <linux/console.h>
13#include <linux/bootmem.h>
14#include <linux/seq_file.h>
15#include <linux/cpu.h>
16#include <linux/module.h>
1394f032 17#include <linux/tty.h>
856783b3 18#include <linux/pfn.h>
1394f032
BW		 19
20#include <linux/ext2_fs.h>
21#include <linux/cramfs_fs.h>
22#include <linux/romfs_fs.h>
23
3bebca2d 24#include <asm/cplb.h>
1394f032
BW		 25#include <asm/cacheflush.h>
26#include <asm/blackfin.h>
27#include <asm/cplbinit.h>
1754a5d9 28#include <asm/div64.h>
7adfb58f 29#include <asm/fixed_code.h>
ce3afa1c 30#include <asm/early_printk.h>
1394f032 31
6cda2e90
MH		 32static DEFINE_PER_CPU(struct cpu, cpu_devices);
33
a9c59c27 34u16 _bfin_swrst;
d45118b1 35EXPORT_SYMBOL(_bfin_swrst);
a9c59c27 36
1394f032 37unsigned long memory_start, memory_end, physical_mem_end;
3132b586 38unsigned long _rambase, _ramstart, _ramend;
1394f032
BW		 39unsigned long reserved_mem_dcache_on;
40unsigned long reserved_mem_icache_on;
41EXPORT_SYMBOL(memory_start);
42EXPORT_SYMBOL(memory_end);
43EXPORT_SYMBOL(physical_mem_end);
44EXPORT_SYMBOL(_ramend);
45
46#ifdef CONFIG_MTD_UCLINUX
47unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
48unsigned long _ebss;
49EXPORT_SYMBOL(memory_mtd_end);
50EXPORT_SYMBOL(memory_mtd_start);
51EXPORT_SYMBOL(mtd_size);
52#endif
53
5e10b4a6 54char __initdata command_line[COMMAND_LINE_SIZE];
0c7a6b21
RG		 55void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
56 *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
1394f032 57
856783b3
YL		 58/* boot memmap, for parsing "memmap=" */
59#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
60#define BFIN_MEMMAP_RAM 1
61#define BFIN_MEMMAP_RESERVED 2
62struct bfin_memmap {
63 int nr_map;
64 struct bfin_memmap_entry {
65 unsigned long long addr; /* start of memory segment */
66 unsigned long long size;
67 unsigned long type;
68 } map[BFIN_MEMMAP_MAX];
69} bfin_memmap __initdata;
70
71/* for memmap sanitization */
72struct change_member {
73 struct bfin_memmap_entry *pentry; /* pointer to original entry */
74 unsigned long long addr; /* address for this change point */
75};
76static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
77static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
78static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
79static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
80
5b04f271 81void __init bfin_cache_init(void)
1394f032 82{
3bebca2d 83#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
5b04f271 84 generate_cplb_tables();
1394f032
BW		 85#endif
86
3bebca2d 87#ifdef CONFIG_BFIN_ICACHE
1394f032
BW		 88 bfin_icache_init();
89 printk(KERN_INFO "Instruction Cache Enabled\n");
90#endif
91
3bebca2d 92#ifdef CONFIG_BFIN_DCACHE
1394f032
BW		 93 bfin_dcache_init();
94 printk(KERN_INFO "Data Cache Enabled"
3bebca2d 95# if defined CONFIG_BFIN_WB
1394f032 96 " (write-back)"
3bebca2d 97# elif defined CONFIG_BFIN_WT
1394f032
BW		 98 " (write-through)"
99# endif
100 "\n");
101#endif
102}
103
5b04f271 104void __init bfin_relocate_l1_mem(void)
1394f032
BW		 105{
106 unsigned long l1_code_length;
107 unsigned long l1_data_a_length;
108 unsigned long l1_data_b_length;
262c3825 109 unsigned long l2_length;
1394f032
BW		 110
111 l1_code_length = _etext_l1 - _stext_l1;
112 if (l1_code_length > L1_CODE_LENGTH)
b85b82d9 113 panic("L1 Instruction SRAM Overflow\n");
1394f032
BW		 114 /* cannot complain as printk is not available as yet.
115 * But we can continue booting and complain later!
116 */
117
118 /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
119 dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
120
121 l1_data_a_length = _ebss_l1 - _sdata_l1;
122 if (l1_data_a_length > L1_DATA_A_LENGTH)
b85b82d9 123 panic("L1 Data SRAM Bank A Overflow\n");
1394f032
BW		 124
125 /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
126 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
127
128 l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
129 if (l1_data_b_length > L1_DATA_B_LENGTH)
b85b82d9 130 panic("L1 Data SRAM Bank B Overflow\n");
1394f032
BW		 131
132 /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
133 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
134 l1_data_a_length, l1_data_b_length);
262c3825 135
07aa7be5
MF		 136 if (L2_LENGTH != 0) {
137 l2_length = _ebss_l2 - _stext_l2;
138 if (l2_length > L2_LENGTH)
139 panic("L2 SRAM Overflow\n");
262c3825 140
07aa7be5
MF		 141 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
142 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
143 }
1394f032
BW		 144}
145
856783b3
YL		 146/* add_memory_region to memmap */
147static void __init add_memory_region(unsigned long long start,
148 unsigned long long size, int type)
149{
150 int i;
151
152 i = bfin_memmap.nr_map;
153
154 if (i == BFIN_MEMMAP_MAX) {
155 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
156 return;
157 }
158
159 bfin_memmap.map[i].addr = start;
160 bfin_memmap.map[i].size = size;
161 bfin_memmap.map[i].type = type;
162 bfin_memmap.nr_map++;
163}
164
165/*
166 * Sanitize the boot memmap, removing overlaps.
167 */
168static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
169{
170 struct change_member *change_tmp;
171 unsigned long current_type, last_type;
172 unsigned long long last_addr;
173 int chgidx, still_changing;
174 int overlap_entries;
175 int new_entry;
176 int old_nr, new_nr, chg_nr;
177 int i;
178
179 /*
180 Visually we're performing the following (1,2,3,4 = memory types)
181
182 Sample memory map (w/overlaps):
183 ____22__________________
184 ______________________4_
185 ____1111________________
186 _44_____________________
187 11111111________________
188 ____________________33__
189 ___________44___________
190 __________33333_________
191 ______________22________
192 ___________________2222_
193 _________111111111______
194 _____________________11_
195 _________________4______
196
197 Sanitized equivalent (no overlap):
198 1_______________________
199 _44_____________________
200 ___1____________________
201 ____22__________________
202 ______11________________
203 _________1______________
204 __________3_____________
205 ___________44___________
206 _____________33_________
207 _______________2________
208 ________________1_______
209 _________________4______
210 ___________________2____
211 ____________________33__
212 ______________________4_
213 */
214 /* if there's only one memory region, don't bother */
215 if (*pnr_map < 2)
216 return -1;
217
218 old_nr = *pnr_map;
219
220 /* bail out if we find any unreasonable addresses in memmap */
221 for (i = 0; i < old_nr; i++)
222 if (map[i].addr + map[i].size < map[i].addr)
223 return -1;
224
225 /* create pointers for initial change-point information (for sorting) */
226 for (i = 0; i < 2*old_nr; i++)
227 change_point[i] = &change_point_list[i];
228
229 /* record all known change-points (starting and ending addresses),
230 omitting those that are for empty memory regions */
231 chgidx = 0;
232 for (i = 0; i < old_nr; i++) {
233 if (map[i].size != 0) {
234 change_point[chgidx]->addr = map[i].addr;
235 change_point[chgidx++]->pentry = &map[i];
236 change_point[chgidx]->addr = map[i].addr + map[i].size;
237 change_point[chgidx++]->pentry = &map[i];
238 }
239 }
240 chg_nr = chgidx; /* true number of change-points */
241
242 /* sort change-point list by memory addresses (low -> high) */
243 still_changing = 1;
244 while (still_changing) {
245 still_changing = 0;
246 for (i = 1; i < chg_nr; i++) {
247 /* if <current_addr> > <last_addr>, swap */
248 /* or, if current=<start_addr> & last=<end_addr>, swap */
249 if ((change_point[i]->addr < change_point[i-1]->addr) ||
250 ((change_point[i]->addr == change_point[i-1]->addr) &&
251 (change_point[i]->addr == change_point[i]->pentry->addr) &&
252 (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
253 ) {
254 change_tmp = change_point[i];
255 change_point[i] = change_point[i-1];
256 change_point[i-1] = change_tmp;
257 still_changing = 1;
258 }
259 }
260 }
261
262 /* create a new memmap, removing overlaps */
263 overlap_entries = 0; /* number of entries in the overlap table */
264 new_entry = 0; /* index for creating new memmap entries */
265 last_type = 0; /* start with undefined memory type */
266 last_addr = 0; /* start with 0 as last starting address */
267 /* loop through change-points, determining affect on the new memmap */
268 for (chgidx = 0; chgidx < chg_nr; chgidx++) {
269 /* keep track of all overlapping memmap entries */
270 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
271 /* add map entry to overlap list (> 1 entry implies an overlap) */
272 overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
273 } else {
274 /* remove entry from list (order independent, so swap with last) */
275 for (i = 0; i < overlap_entries; i++) {
276 if (overlap_list[i] == change_point[chgidx]->pentry)
277 overlap_list[i] = overlap_list[overlap_entries-1];
278 }
279 overlap_entries--;
280 }
281 /* if there are overlapping entries, decide which "type" to use */
282 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
283 current_type = 0;
284 for (i = 0; i < overlap_entries; i++)
285 if (overlap_list[i]->type > current_type)
286 current_type = overlap_list[i]->type;
287 /* continue building up new memmap based on this information */
288 if (current_type != last_type) {
289 if (last_type != 0) {
290 new_map[new_entry].size =
291 change_point[chgidx]->addr - last_addr;
292 /* move forward only if the new size was non-zero */
293 if (new_map[new_entry].size != 0)
294 if (++new_entry >= BFIN_MEMMAP_MAX)
295 break; /* no more space left for new entries */
296 }
297 if (current_type != 0) {
298 new_map[new_entry].addr = change_point[chgidx]->addr;
299 new_map[new_entry].type = current_type;
300 last_addr = change_point[chgidx]->addr;
301 }
302 last_type = current_type;
303 }
304 }
305 new_nr = new_entry; /* retain count for new entries */
306
307 /* copy new mapping into original location */
308 memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
309 *pnr_map = new_nr;
310
311 return 0;
312}
313
314static void __init print_memory_map(char *who)
315{
316 int i;
317
318 for (i = 0; i < bfin_memmap.nr_map; i++) {
319 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
320 bfin_memmap.map[i].addr,
321 bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
322 switch (bfin_memmap.map[i].type) {
323 case BFIN_MEMMAP_RAM:
324 printk("(usable)\n");
325 break;
326 case BFIN_MEMMAP_RESERVED:
327 printk("(reserved)\n");
328 break;
329 default: printk("type %lu\n", bfin_memmap.map[i].type);
330 break;
331 }
332 }
333}
334
335static __init int parse_memmap(char *arg)
336{
337 unsigned long long start_at, mem_size;
338
339 if (!arg)
340 return -EINVAL;
341
342 mem_size = memparse(arg, &arg);
343 if (*arg == '@') {
344 start_at = memparse(arg+1, &arg);
345 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
346 } else if (*arg == '$') {
347 start_at = memparse(arg+1, &arg);
348 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
349 }
350
351 return 0;
352}
353
1394f032
BW		 354/*
355 * Initial parsing of the command line. Currently, we support:
356 * - Controlling the linux memory size: mem=xxx[KMG]
357 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
358 * $ -> reserved memory is dcacheable
359 * # -> reserved memory is icacheable
856783b3
YL		 360 * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
361 * @ from <start> to <start>+<mem>, type RAM
362 * $ from <start> to <start>+<mem>, type RESERVED
363 *
1394f032
BW		 364 */
365static __init void parse_cmdline_early(char *cmdline_p)
366{
367 char c = ' ', *to = cmdline_p;
368 unsigned int memsize;
369 for (;;) {
370 if (c == ' ') {
1394f032
BW		 371 if (!memcmp(to, "mem=", 4)) {
372 to += 4;
373 memsize = memparse(to, &to);
374 if (memsize)
375 _ramend = memsize;
376
377 } else if (!memcmp(to, "max_mem=", 8)) {
378 to += 8;
379 memsize = memparse(to, &to);
380 if (memsize) {
381 physical_mem_end = memsize;
382 if (*to != ' ') {
383 if (*to == '$'
384 || *(to + 1) == '$')
385 reserved_mem_dcache_on =
386 1;
387 if (*to == '#'
388 || *(to + 1) == '#')
389 reserved_mem_icache_on =
390 1;
391 }
392 }
ce3afa1c
RG		 393 } else if (!memcmp(to, "earlyprintk=", 12)) {
394 to += 12;
395 setup_early_printk(to);
856783b3
YL		 396 } else if (!memcmp(to, "memmap=", 7)) {
397 to += 7;
398 parse_memmap(to);
1394f032 399 }
1394f032
BW		 400 }
401 c = *(to++);
402 if (!c)
403 break;
404 }
405}
406
856783b3
YL		 407/*
408 * Setup memory defaults from user config.
409 * The physical memory layout looks like:
410 *
411 * [_rambase, _ramstart]: kernel image
412 * [memory_start, memory_end]: dynamic memory managed by kernel
413 * [memory_end, _ramend]: reserved memory
414 * [meory_mtd_start(memory_end),
415 * memory_mtd_start + mtd_size]: rootfs (if any)
416 * [_ramend - DMA_UNCACHED_REGION,
417 * _ramend]: uncached DMA region
418 * [_ramend, physical_mem_end]: memory not managed by kernel
419 *
420 */
421static __init void memory_setup(void)
1394f032 422{
c0eab3b7
MF		 423#ifdef CONFIG_MTD_UCLINUX
424 unsigned long mtd_phys = 0;
425#endif
426
856783b3 427 _rambase = (unsigned long)_stext;
b7627acc 428 _ramstart = (unsigned long)_end;
1394f032 429
856783b3
YL		 430 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
431 console_init();
432 panic("DMA region exceeds memory limit: %lu.\n",
433 _ramend - _ramstart);
1aafd909 434 }
1394f032
BW		 435 memory_end = _ramend - DMA_UNCACHED_REGION;
436
b97b8a99
BS		 437#ifdef CONFIG_MPU
438 /* Round up to multiple of 4MB. */
439 memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
440#else
1394f032 441 memory_start = PAGE_ALIGN(_ramstart);
b97b8a99 442#endif
1394f032
BW		 443
444#if defined(CONFIG_MTD_UCLINUX)
445 /* generic memory mapped MTD driver */
446 memory_mtd_end = memory_end;
447
448 mtd_phys = _ramstart;
449 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
450
451# if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
452 if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
453 mtd_size =
454 PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
455# endif
456
457# if defined(CONFIG_CRAMFS)
458 if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
459 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
460# endif
461
462# if defined(CONFIG_ROMFS_FS)
463 if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
464 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
465 mtd_size =
466 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
3bebca2d 467# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
1394f032
BW		 468 /* Due to a Hardware Anomaly we need to limit the size of usable
469 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
470 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
471 */
472# if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
473 if (memory_end >= 56 * 1024 * 1024)
474 memory_end = 56 * 1024 * 1024;
475# else
476 if (memory_end >= 60 * 1024 * 1024)
477 memory_end = 60 * 1024 * 1024;
478# endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
479# endif /* ANOMALY_05000263 */
480# endif /* CONFIG_ROMFS_FS */
481
482 memory_end -= mtd_size;
483
484 if (mtd_size == 0) {
485 console_init();
486 panic("Don't boot kernel without rootfs attached.\n");
487 }
488
489 /* Relocate MTD image to the top of memory after the uncached memory area */
b7627acc 490 dma_memcpy((char *)memory_end, _end, mtd_size);
1394f032
BW		 491
492 memory_mtd_start = memory_end;
493 _ebss = memory_mtd_start; /* define _ebss for compatible */
494#endif /* CONFIG_MTD_UCLINUX */
495
3bebca2d 496#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
1394f032
BW		 497 /* Due to a Hardware Anomaly we need to limit the size of usable
498 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
499 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
500 */
501#if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
502 if (memory_end >= 56 * 1024 * 1024)
503 memory_end = 56 * 1024 * 1024;
504#else
505 if (memory_end >= 60 * 1024 * 1024)
506 memory_end = 60 * 1024 * 1024;
507#endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
508 printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
509#endif /* ANOMALY_05000263 */
510
b97b8a99
BS		 511#ifdef CONFIG_MPU
512 page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
513 page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
514#endif
515
1394f032 516#if !defined(CONFIG_MTD_UCLINUX)
856783b3
YL		 517 /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
518 memory_end -= SIZE_4K;
1394f032 519#endif
856783b3 520
1394f032
BW		 521 init_mm.start_code = (unsigned long)_stext;
522 init_mm.end_code = (unsigned long)_etext;
523 init_mm.end_data = (unsigned long)_edata;
524 init_mm.brk = (unsigned long)0;
525
856783b3
YL		 526 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
527 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
528
b7627acc 529 printk(KERN_INFO "Memory map:\n"
8929ecf8 530 KERN_INFO " fixedcode = 0x%p-0x%p\n"
856783b3
YL		 531 KERN_INFO " text = 0x%p-0x%p\n"
532 KERN_INFO " rodata = 0x%p-0x%p\n"
b7627acc 533 KERN_INFO " bss = 0x%p-0x%p\n"
856783b3
YL		 534 KERN_INFO " data = 0x%p-0x%p\n"
535 KERN_INFO " stack = 0x%p-0x%p\n"
536 KERN_INFO " init = 0x%p-0x%p\n"
856783b3
YL		 537 KERN_INFO " available = 0x%p-0x%p\n"
538#ifdef CONFIG_MTD_UCLINUX
539 KERN_INFO " rootfs = 0x%p-0x%p\n"
540#endif
541#if DMA_UNCACHED_REGION > 0
542 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
543#endif
8929ecf8
MF		 544 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
545 _stext, _etext,
856783b3 546 __start_rodata, __end_rodata,
b7627acc 547 __bss_start, __bss_stop,
856783b3
YL		 548 _sdata, _edata,
549 (void *)&init_thread_union,
550 (void *)((int)(&init_thread_union) + 0x2000),
b7627acc
MF		 551 __init_begin, __init_end,
552 (void *)_ramstart, (void *)memory_end
856783b3
YL		 553#ifdef CONFIG_MTD_UCLINUX
554 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
555#endif
556#if DMA_UNCACHED_REGION > 0
557 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
558#endif
559 );
560}
561
2e8d7965
YL		 562/*
563 * Find the lowest, highest page frame number we have available
564 */
565void __init find_min_max_pfn(void)
566{
567 int i;
568
569 max_pfn = 0;
570 min_low_pfn = memory_end;
571
572 for (i = 0; i < bfin_memmap.nr_map; i++) {
573 unsigned long start, end;
574 /* RAM? */
575 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
576 continue;
577 start = PFN_UP(bfin_memmap.map[i].addr);
578 end = PFN_DOWN(bfin_memmap.map[i].addr +
579 bfin_memmap.map[i].size);
580 if (start >= end)
581 continue;
582 if (end > max_pfn)
583 max_pfn = end;
584 if (start < min_low_pfn)
585 min_low_pfn = start;
586 }
587}
588
856783b3
YL		 589static __init void setup_bootmem_allocator(void)
590{
591 int bootmap_size;
592 int i;
2e8d7965 593 unsigned long start_pfn, end_pfn;
856783b3
YL		 594 unsigned long curr_pfn, last_pfn, size;
595
596 /* mark memory between memory_start and memory_end usable */
597 add_memory_region(memory_start,
598 memory_end - memory_start, BFIN_MEMMAP_RAM);
599 /* sanity check for overlap */
600 sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
601 print_memory_map("boot memmap");
602
2e8d7965
YL		 603 /* intialize globals in linux/bootmem.h */
604 find_min_max_pfn();
605 /* pfn of the last usable page frame */
606 if (max_pfn > memory_end >> PAGE_SHIFT)
607 max_pfn = memory_end >> PAGE_SHIFT;
608 /* pfn of last page frame directly mapped by kernel */
609 max_low_pfn = max_pfn;
610 /* pfn of the first usable page frame after kernel image*/
611 if (min_low_pfn < memory_start >> PAGE_SHIFT)
612 min_low_pfn = memory_start >> PAGE_SHIFT;
613
614 start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
615 end_pfn = memory_end >> PAGE_SHIFT;
856783b3
YL		 616
617 /*
618 * give all the memory to the bootmap allocator, tell it to put the
619 * boot mem_map at the start of memory.
620 */
621 bootmap_size = init_bootmem_node(NODE_DATA(0),
622 memory_start >> PAGE_SHIFT, /* map goes here */
2e8d7965 623 start_pfn, end_pfn);
856783b3
YL		 624
625 /* register the memmap regions with the bootmem allocator */
626 for (i = 0; i < bfin_memmap.nr_map; i++) {
627 /*
628 * Reserve usable memory
629 */
630 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
631 continue;
632 /*
633 * We are rounding up the start address of usable memory:
634 */
635 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
2e8d7965 636 if (curr_pfn >= end_pfn)
856783b3
YL		 637 continue;
638 /*
639 * ... and at the end of the usable range downwards:
640 */
641 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
642 bfin_memmap.map[i].size);
643
2e8d7965
YL		 644 if (last_pfn > end_pfn)
645 last_pfn = end_pfn;
856783b3
YL		 646
647 /*
648 * .. finally, did all the rounding and playing
649 * around just make the area go away?
650 */
651 if (last_pfn <= curr_pfn)
652 continue;
653
654 size = last_pfn - curr_pfn;
655 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
656 }
657
658 /* reserve memory before memory_start, including bootmap */
659 reserve_bootmem(PAGE_OFFSET,
660 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
661 BOOTMEM_DEFAULT);
662}
663
a086ee22
MF		 664#define EBSZ_TO_MEG(ebsz) \
665({ \
666 int meg = 0; \
667 switch (ebsz & 0xf) { \
668 case 0x1: meg = 16; break; \
669 case 0x3: meg = 32; break; \
670 case 0x5: meg = 64; break; \
671 case 0x7: meg = 128; break; \
672 case 0x9: meg = 256; break; \
673 case 0xb: meg = 512; break; \
674 } \
675 meg; \
676})
677static inline int __init get_mem_size(void)
678{
99d95bbd
MH		 679#if defined(EBIU_SDBCTL)
680# if defined(BF561_FAMILY)
a086ee22
MF		 681 int ret = 0;
682 u32 sdbctl = bfin_read_EBIU_SDBCTL();
683 ret += EBSZ_TO_MEG(sdbctl >> 0);
684 ret += EBSZ_TO_MEG(sdbctl >> 8);
685 ret += EBSZ_TO_MEG(sdbctl >> 16);
686 ret += EBSZ_TO_MEG(sdbctl >> 24);
687 return ret;
99d95bbd 688# else
a086ee22 689 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
99d95bbd
MH		 690# endif
691#elif defined(EBIU_DDRCTL1)
1e78042c
MH		 692 u32 ddrctl = bfin_read_EBIU_DDRCTL1();
693 int ret = 0;
694 switch (ddrctl & 0xc0000) {
695 case DEVSZ_64: ret = 64 / 8;
696 case DEVSZ_128: ret = 128 / 8;
697 case DEVSZ_256: ret = 256 / 8;
698 case DEVSZ_512: ret = 512 / 8;
699 }
700 switch (ddrctl & 0x30000) {
701 case DEVWD_4: ret *= 2;
702 case DEVWD_8: ret *= 2;
703 case DEVWD_16: break;
a086ee22 704 }
b1b154e5
MF		 705 if ((ddrctl & 0xc000) == 0x4000)
706 ret *= 2;
1e78042c 707 return ret;
a086ee22
MF		 708#endif
709 BUG();
710}
711
856783b3
YL		 712void __init setup_arch(char **cmdline_p)
713{
9f8e895d 714 unsigned long sclk, cclk;
856783b3
YL		 715
716#ifdef CONFIG_DUMMY_CONSOLE
717 conswitchp = &dummy_con;
718#endif
719
720#if defined(CONFIG_CMDLINE_BOOL)
721 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
722 command_line[sizeof(command_line) - 1] = 0;
723#endif
724
725 /* Keep a copy of command line */
726 *cmdline_p = &command_line[0];
727 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
728 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
729
730 /* setup memory defaults from the user config */
731 physical_mem_end = 0;
a086ee22 732 _ramend = get_mem_size() * 1024 * 1024;
856783b3
YL		 733
734 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
735
736 parse_cmdline_early(&command_line[0]);
737
738 if (physical_mem_end == 0)
739 physical_mem_end = _ramend;
740
741 memory_setup();
742
7e64acab
MF		 743 /* Initialize Async memory banks */
744 bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
745 bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
746 bfin_write_EBIU_AMGCTL(AMGCTLVAL);
747#ifdef CONFIG_EBIU_MBSCTLVAL
748 bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
749 bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
750 bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
751#endif
752
856783b3
YL		 753 cclk = get_cclk();
754 sclk = get_sclk();
755
756#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
757 if (ANOMALY_05000273 && cclk == sclk)
758 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
759#endif
760
761#ifdef BF561_FAMILY
762 if (ANOMALY_05000266) {
763 bfin_read_IMDMA_D0_IRQ_STATUS();
764 bfin_read_IMDMA_D1_IRQ_STATUS();
765 }
766#endif
767 printk(KERN_INFO "Hardware Trace ");
768 if (bfin_read_TBUFCTL() & 0x1)
769 printk("Active ");
770 else
771 printk("Off ");
772 if (bfin_read_TBUFCTL() & 0x2)
773 printk("and Enabled\n");
774 else
775 printk("and Disabled\n");
776
777#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
778 /* we need to initialize the Flashrom device here since we might
779 * do things with flash early on in the boot
780 */
781 flash_probe();
782#endif
783
7728ec33
RG		 784 _bfin_swrst = bfin_read_SWRST();
785
0c7a6b21
RG		 786#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
787 bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
788#endif
789#ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
790 bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
791#endif
2d200980 792
0c7a6b21
RG		 793 if (_bfin_swrst & RESET_DOUBLE) {
794 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
795#ifdef CONFIG_DEBUG_DOUBLEFAULT
796 /* We assume the crashing kernel, and the current symbol table match */
797 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
798 (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
799 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
800 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
801#endif
802 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
803 init_retx);
804 } else if (_bfin_swrst & RESET_WDOG)
7728ec33
RG		 805 printk(KERN_INFO "Recovering from Watchdog event\n");
806 else if (_bfin_swrst & RESET_SOFTWARE)
807 printk(KERN_NOTICE "Reset caused by Software reset\n");
808
550d5538 809 printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
de3025f4
JZ		 810 if (bfin_compiled_revid() == 0xffff)
811 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
812 else if (bfin_compiled_revid() == -1)
813 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
814 else
815 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
e482cad2
RG		 816
817 if (unlikely(CPUID != bfin_cpuid()))
818 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
819 CPU, bfin_cpuid(), bfin_revid());
820 else {
821 if (bfin_revid() != bfin_compiled_revid()) {
822 if (bfin_compiled_revid() == -1)
823 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
824 bfin_revid());
825 else if (bfin_compiled_revid() != 0xffff)
826 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
827 bfin_compiled_revid(), bfin_revid());
828 }
829 if (bfin_revid() <= CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
830 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
831 CPU, bfin_revid());
de3025f4 832 }
0c0497c2 833
1394f032
BW		 834 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
835
b5c0e2e8 836 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
1394f032
BW		 837 cclk / 1000000, sclk / 1000000);
838
1aafd909 839 if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
1394f032 840 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
1394f032 841
856783b3 842 setup_bootmem_allocator();
1394f032 843
1394f032
BW		 844 paging_init();
845
7adfb58f
BS		 846 /* Copy atomic sequences to their fixed location, and sanity check that
847 these locations are the ones that we advertise to userspace. */
848 memcpy((void *)FIXED_CODE_START, &fixed_code_start,
849 FIXED_CODE_END - FIXED_CODE_START);
850 BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
851 != SIGRETURN_STUB - FIXED_CODE_START);
852 BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
853 != ATOMIC_XCHG32 - FIXED_CODE_START);
854 BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
855 != ATOMIC_CAS32 - FIXED_CODE_START);
856 BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
857 != ATOMIC_ADD32 - FIXED_CODE_START);
858 BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
859 != ATOMIC_SUB32 - FIXED_CODE_START);
860 BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
861 != ATOMIC_IOR32 - FIXED_CODE_START);
862 BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
863 != ATOMIC_AND32 - FIXED_CODE_START);
864 BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
865 != ATOMIC_XOR32 - FIXED_CODE_START);
9f336a53
RG		 866 BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
867 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
29440a2b 868
8be80ed3 869 init_exception_vectors();
5b04f271 870 bfin_cache_init();
1394f032
BW		 871}
872
1394f032
BW		 873static int __init topology_init(void)
874{
6cda2e90
MH		 875 int cpu;
876
877 for_each_possible_cpu(cpu) {
878 struct cpu *c = &per_cpu(cpu_devices, cpu);
879
880 register_cpu(c, cpu);
881 }
882
1394f032 883 return 0;
1394f032
BW		 884}
885
886subsys_initcall(topology_init);
887
3a2521fa
MF		 888/* Get the voltage input multiplier */
889static u_long cached_vco_pll_ctl, cached_vco;
52a07812 890static u_long get_vco(void)
1394f032
BW		 891{
892 u_long msel;
1394f032 893
3a2521fa
MF		 894 u_long pll_ctl = bfin_read_PLL_CTL();
895 if (pll_ctl == cached_vco_pll_ctl)
896 return cached_vco;
897 else
898 cached_vco_pll_ctl = pll_ctl;
899
900 msel = (pll_ctl >> 9) & 0x3F;
1394f032
BW		 901 if (0 == msel)
902 msel = 64;
903
3a2521fa
MF		 904 cached_vco = CONFIG_CLKIN_HZ;
905 cached_vco >>= (1 & pll_ctl); /* DF bit */
906 cached_vco *= msel;
907 return cached_vco;
1394f032
BW		 908}
909
2f6cf7bf 910/* Get the Core clock */
3a2521fa 911static u_long cached_cclk_pll_div, cached_cclk;
1394f032
BW		 912u_long get_cclk(void)
913{
914 u_long csel, ssel;
3a2521fa 915
1394f032
BW		 916 if (bfin_read_PLL_STAT() & 0x1)
917 return CONFIG_CLKIN_HZ;
918
919 ssel = bfin_read_PLL_DIV();
3a2521fa
MF		 920 if (ssel == cached_cclk_pll_div)
921 return cached_cclk;
922 else
923 cached_cclk_pll_div = ssel;
924
1394f032
BW		 925 csel = ((ssel >> 4) & 0x03);
926 ssel &= 0xf;
927 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
3a2521fa
MF		 928 cached_cclk = get_vco() / ssel;
929 else
930 cached_cclk = get_vco() >> csel;
931 return cached_cclk;
1394f032 932}
1394f032
BW		 933EXPORT_SYMBOL(get_cclk);
934
935/* Get the System clock */
3a2521fa 936static u_long cached_sclk_pll_div, cached_sclk;
1394f032
BW		 937u_long get_sclk(void)
938{
939 u_long ssel;
940
941 if (bfin_read_PLL_STAT() & 0x1)
942 return CONFIG_CLKIN_HZ;
943
3a2521fa
MF		 944 ssel = bfin_read_PLL_DIV();
945 if (ssel == cached_sclk_pll_div)
946 return cached_sclk;
947 else
948 cached_sclk_pll_div = ssel;
949
950 ssel &= 0xf;
1394f032
BW		 951 if (0 == ssel) {
952 printk(KERN_WARNING "Invalid System Clock\n");
953 ssel = 1;
954 }
955
3a2521fa
MF		 956 cached_sclk = get_vco() / ssel;
957 return cached_sclk;
1394f032 958}
1394f032
BW		 959EXPORT_SYMBOL(get_sclk);
960
2f6cf7bf
MF		 961unsigned long sclk_to_usecs(unsigned long sclk)
962{
1754a5d9
MF		 963 u64 tmp = USEC_PER_SEC * (u64)sclk;
964 do_div(tmp, get_sclk());
965 return tmp;
2f6cf7bf
MF		 966}
967EXPORT_SYMBOL(sclk_to_usecs);
968
969unsigned long usecs_to_sclk(unsigned long usecs)
970{
1754a5d9
MF		 971 u64 tmp = get_sclk() * (u64)usecs;
972 do_div(tmp, USEC_PER_SEC);
973 return tmp;
2f6cf7bf
MF		 974}
975EXPORT_SYMBOL(usecs_to_sclk);
976
1394f032
BW		 977/*
978 * Get CPU information for use by the procfs.
979 */
980static int show_cpuinfo(struct seq_file *m, void *v)
981{
066954a3 982 char *cpu, *mmu, *fpu, *vendor, *cache;
1394f032
BW		 983 uint32_t revid;
984
985 u_long cclk = 0, sclk = 0;
9de3a0b6 986 u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1394f032
BW		 987
988 cpu = CPU;
989 mmu = "none";
990 fpu = "none";
991 revid = bfin_revid();
1394f032
BW		 992
993 cclk = get_cclk();
994 sclk = get_sclk();
995
73b0c0b0 996 switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
066954a3
MF		 997 case 0xca:
998 vendor = "Analog Devices";
73b0c0b0
RG		 999 break;
1000 default:
066954a3
MF		 1001 vendor = "unknown";
1002 break;
73b0c0b0 1003 }
1394f032 1004
73b0c0b0 1005 seq_printf(m, "processor\t: %d\n"
e482cad2 1006 "vendor_id\t: %s\n",
55f2feae 1007 *(unsigned int *)v,
e482cad2
RG		 1008 vendor);
1009
1010 if (CPUID == bfin_cpuid())
1011 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1012 else
1013 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1014 CPUID, bfin_cpuid());
1015
1016 seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1017 "stepping\t: %d\n",
73b0c0b0 1018 cpu, cclk/1000000, sclk/1000000,
253bcf4f
RG		 1019#ifdef CONFIG_MPU
1020 "mpu on",
1021#else
1022 "mpu off",
1023#endif
73b0c0b0
RG		 1024 revid);
1025
1026 seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1027 cclk/1000000, cclk%1000000,
1028 sclk/1000000, sclk%1000000);
1029 seq_printf(m, "bogomips\t: %lu.%02lu\n"
1030 "Calibration\t: %lu loops\n",
1031 (loops_per_jiffy * HZ) / 500000,
1032 ((loops_per_jiffy * HZ) / 5000) % 100,
1033 (loops_per_jiffy * HZ));
1034
1035 /* Check Cache configutation */
1f83b8f1
MF		 1036 switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
1037 case ACACHE_BSRAM:
066954a3 1038 cache = "dbank-A/B\t: cache/sram";
1f83b8f1
MF		 1039 dcache_size = 16;
1040 dsup_banks = 1;
1041 break;
1042 case ACACHE_BCACHE:
066954a3 1043 cache = "dbank-A/B\t: cache/cache";
1f83b8f1
MF		 1044 dcache_size = 32;
1045 dsup_banks = 2;
1046 break;
1047 case ASRAM_BSRAM:
066954a3 1048 cache = "dbank-A/B\t: sram/sram";
1f83b8f1
MF		 1049 dcache_size = 0;
1050 dsup_banks = 0;
1051 break;
1052 default:
066954a3 1053 cache = "unknown";
73b0c0b0
RG		 1054 dcache_size = 0;
1055 dsup_banks = 0;
1394f032
BW		 1056 break;
1057 }
1058
73b0c0b0 1059 /* Is it turned on? */
2d200980 1060 if ((bfin_read_DMEM_CONTROL() & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
73b0c0b0 1061 dcache_size = 0;
1394f032 1062
55f2feae 1063 if ((bfin_read_IMEM_CONTROL() & (IMC | ENICPLB)) != (IMC | ENICPLB))
9de3a0b6
RG		 1064 icache_size = 0;
1065
73b0c0b0
RG		 1066 seq_printf(m, "cache size\t: %d KB(L1 icache) "
1067 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
9de3a0b6 1068 icache_size, dcache_size,
73b0c0b0
RG		 1069#if defined CONFIG_BFIN_WB
1070 "wb"
1071#elif defined CONFIG_BFIN_WT
1072 "wt"
1073#endif
da27abb7 1074 "", 0);
73b0c0b0
RG		 1075
1076 seq_printf(m, "%s\n", cache);
1077
9de3a0b6
RG		 1078 if (icache_size)
1079 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1080 BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1081 else
1082 seq_printf(m, "icache setup\t: off\n");
1083
1394f032 1084 seq_printf(m,
73b0c0b0 1085 "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
3bebca2d
RG		 1086 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1087 BFIN_DLINES);
1088#ifdef CONFIG_BFIN_ICACHE_LOCK
0e06b50d 1089 switch ((bfin_read_IMEM_CONTROL() >> 3) & WAYALL_L) {
1394f032
BW		 1090 case WAY0_L:
1091 seq_printf(m, "Way0 Locked-Down\n");
1092 break;
1093 case WAY1_L:
1094 seq_printf(m, "Way1 Locked-Down\n");
1095 break;
1096 case WAY01_L:
1097 seq_printf(m, "Way0,Way1 Locked-Down\n");
1098 break;
1099 case WAY2_L:
1100 seq_printf(m, "Way2 Locked-Down\n");
1101 break;
1102 case WAY02_L:
1103 seq_printf(m, "Way0,Way2 Locked-Down\n");
1104 break;
1105 case WAY12_L:
1106 seq_printf(m, "Way1,Way2 Locked-Down\n");
1107 break;
1108 case WAY012_L:
1109 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1110 break;
1111 case WAY3_L:
1112 seq_printf(m, "Way3 Locked-Down\n");
1113 break;
1114 case WAY03_L:
1115 seq_printf(m, "Way0,Way3 Locked-Down\n");
1116 break;
1117 case WAY13_L:
1118 seq_printf(m, "Way1,Way3 Locked-Down\n");
1119 break;
1120 case WAY013_L:
1121 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1122 break;
1123 case WAY32_L:
1124 seq_printf(m, "Way3,Way2 Locked-Down\n");
1125 break;
1126 case WAY320_L:
1127 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1128 break;
1129 case WAY321_L:
1130 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1131 break;
1132 case WAYALL_L:
1133 seq_printf(m, "All Ways are locked\n");
1134 break;
1135 default:
1136 seq_printf(m, "No Ways are locked\n");
1137 }
1138#endif
066954a3 1139 seq_printf(m, "board name\t: %s\n", bfin_board_name);
73b0c0b0
RG		 1140 seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1141 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1142 seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1143 ((int)memory_end - (int)_stext) >> 10,
1144 _stext,
1145 (void *)memory_end);
1146
1394f032
BW		 1147 return 0;
1148}
1149
1150static void *c_start(struct seq_file *m, loff_t *pos)
1151{
55f2feae
GY		 1152 if (*pos == 0)
1153 *pos = first_cpu(cpu_online_map);
1154 if (*pos >= num_online_cpus())
1155 return NULL;
1156
1157 return pos;
1394f032
BW		 1158}
1159
1160static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1161{
55f2feae
GY		 1162 *pos = next_cpu(*pos, cpu_online_map);
1163
1394f032
BW		 1164 return c_start(m, pos);
1165}
1166
1167static void c_stop(struct seq_file *m, void *v)
1168{
1169}
1170
03a44825 1171const struct seq_operations cpuinfo_op = {
1394f032
BW		 1172 .start = c_start,
1173 .next = c_next,
1174 .stop = c_stop,
1175 .show = show_cpuinfo,
1176};
1177
5e10b4a6 1178void __init cmdline_init(const char *r0)
1394f032
BW		 1179{
1180 if (r0)
52a07812 1181 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1394f032 1182}
Linux kernel - Deliverables
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