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1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/lib/outs.S | |
3 | * Based on: | |
4 | * Author: Bas Vermeulen <bas@buyways.nl> | |
5 | * | |
6 | * Created: Tue Mar 22 15:27:24 CEST 2005 | |
7 | * Description: Implementation of outs{bwl} for BlackFin processors using zero overhead loops. | |
8 | * | |
9 | * Modified: Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl> | |
10 | * Copyright 2004-2006 Analog Devices Inc. | |
11 | * | |
12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, see the file COPYING, or write | |
26 | * to the Free Software Foundation, Inc., | |
27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
28 | */ | |
29 | ||
30 | #include <linux/linkage.h> | |
31 | ||
32 | .align 2 | |
33 | ||
34 | ENTRY(_outsl) | |
35 | P0 = R0; /* P0 = port */ | |
36 | P1 = R1; /* P1 = address */ | |
37 | P2 = R2; /* P2 = count */ | |
38 | ||
39 | LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; | |
40 | .Llong_loop_s: R0 = [P1++]; | |
41 | .Llong_loop_e: [P0] = R0; | |
42 | RTS; | |
51be24c3 | 43 | ENDPROC(_outsl) |
1394f032 BW |
44 | |
45 | ENTRY(_outsw) | |
46 | P0 = R0; /* P0 = port */ | |
47 | P1 = R1; /* P1 = address */ | |
48 | P2 = R2; /* P2 = count */ | |
49 | ||
50 | LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; | |
51 | .Lword_loop_s: R0 = W[P1++]; | |
52 | .Lword_loop_e: W[P0] = R0; | |
53 | RTS; | |
51be24c3 | 54 | ENDPROC(_outsw) |
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55 | |
56 | ENTRY(_outsb) | |
57 | P0 = R0; /* P0 = port */ | |
58 | P1 = R1; /* P1 = address */ | |
59 | P2 = R2; /* P2 = count */ | |
60 | ||
61 | LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; | |
62 | .Lbyte_loop_s: R0 = B[P1++]; | |
63 | .Lbyte_loop_e: B[P0] = R0; | |
64 | RTS; | |
51be24c3 | 65 | ENDPROC(_outsb) |