Commit | Line | Data |
---|---|---|
5df326ac MF |
1 | config BF51x |
2 | def_bool y | |
3 | depends on (BF512 || BF514 || BF516 || BF518) | |
4 | ||
2f6f4bcd BW |
5 | if (BF51x) |
6 | ||
7 | source "arch/blackfin/mach-bf518/boards/Kconfig" | |
8 | ||
9 | menu "BF518 Specific Configuration" | |
10 | ||
11 | comment "Alternative Multiplexing Scheme" | |
12 | ||
13 | choice | |
65cd3b53 MF |
14 | prompt "PWM Channel Pins" |
15 | default BF518_PWM_ALL_PORTF | |
2f6f4bcd | 16 | help |
65cd3b53 MF |
17 | Select pins used for the PWM channels: |
18 | PWM_AH PWM_AL PWM_BH PWM_BL PWM_CH PWM_CL | |
2f6f4bcd | 19 | |
65cd3b53 MF |
20 | See the Hardware Reference Manual for more details. |
21 | ||
22 | config BF518_PWM_ALL_PORTF | |
23 | bool "PF1 - PF6" | |
2f6f4bcd | 24 | help |
65cd3b53 | 25 | PF{1,2,3,4,5,6} <-> PWM_{AH,AL,BH,BL,CH,CL} |
2f6f4bcd | 26 | |
65cd3b53 MF |
27 | config BF518_PWM_PORTF_PORTG |
28 | bool "PF11 - PF14 / PG1 - PG2" | |
2f6f4bcd | 29 | help |
65cd3b53 MF |
30 | PF{11,12,13,14} <-> PWM_{AH,AL,BH,BL} |
31 | PG{1,2} <-> PWM_{CH,CL} | |
32 | ||
2f6f4bcd BW |
33 | endchoice |
34 | ||
35 | choice | |
65cd3b53 MF |
36 | prompt "PWM Sync Pin" |
37 | default BF518_PWM_SYNC_PF7 | |
2f6f4bcd | 38 | help |
65cd3b53 | 39 | Select the pin used for PWM_SYNC. |
2f6f4bcd | 40 | |
65cd3b53 MF |
41 | See the Hardware Reference Manual for more details. |
42 | ||
43 | config BF518_PWM_SYNC_PF7 | |
44 | bool "PF7" | |
45 | config BF518_PWM_SYNC_PF15 | |
46 | bool "PF15" | |
47 | endchoice | |
2f6f4bcd | 48 | |
65cd3b53 MF |
49 | choice |
50 | prompt "PWM Trip B Pin" | |
51 | default BF518_PWM_TRIPB_PG10 | |
2f6f4bcd | 52 | help |
65cd3b53 MF |
53 | Select the pin used for PWM_TRIPB. |
54 | ||
55 | See the Hardware Reference Manual for more details. | |
56 | ||
57 | config BF518_PWM_TRIPB_PG10 | |
58 | bool "PG10" | |
59 | config BF518_PWM_TRIPB_PG14 | |
60 | bool "PG14" | |
2f6f4bcd BW |
61 | endchoice |
62 | ||
63 | choice | |
65cd3b53 MF |
64 | prompt "PPI / Timer Pins" |
65 | default BF518_PPI_TMR_PG5 | |
2f6f4bcd | 66 | help |
65cd3b53 MF |
67 | Select pins used for PPI/Timer: |
68 | PPICLK PPIFS1 PPIFS2 | |
69 | TMRCLK TMR0 TMR1 | |
2f6f4bcd | 70 | |
65cd3b53 MF |
71 | See the Hardware Reference Manual for more details. |
72 | ||
73 | config BF518_PPI_TMR_PG5 | |
74 | bool "PG5 - PG7" | |
2f6f4bcd | 75 | help |
65cd3b53 | 76 | PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2} |
2f6f4bcd | 77 | |
65cd3b53 MF |
78 | config BF518_PPI_TMR_PG12 |
79 | bool "PG12 - PG14" | |
2f6f4bcd | 80 | help |
65cd3b53 MF |
81 | PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2} |
82 | ||
2f6f4bcd BW |
83 | endchoice |
84 | ||
7a4a207e MH |
85 | comment "Hysteresis/Schmitt Trigger Control" |
86 | config BFIN_HYSTERESIS_CONTROL | |
87 | bool "Enable Hysteresis Control" | |
88 | help | |
89 | The ADSP-BF51x allows to control input hysteresis for Port F, | |
90 | Port G and Port H and other processor signal inputs. | |
91 | The Schmitt trigger enables can be set only for pin groups. | |
92 | Saying Y will overwrite the default reset or boot loader | |
93 | initialization. | |
94 | ||
95 | menu "PORT F" | |
96 | depends on BFIN_HYSTERESIS_CONTROL | |
97 | config GPIO_HYST_PORTF_0_7 | |
98 | bool "Enable Hysteresis on PORTF {0...7}" | |
99 | config GPIO_HYST_PORTF_8_9 | |
100 | bool "Enable Hysteresis on PORTF {8, 9}" | |
101 | config GPIO_HYST_PORTF_10 | |
102 | bool "Enable Hysteresis on PORTF 10" | |
103 | config GPIO_HYST_PORTF_11 | |
104 | bool "Enable Hysteresis on PORTF 11" | |
105 | config GPIO_HYST_PORTF_12_13 | |
106 | bool "Enable Hysteresis on PORTF {12, 13}" | |
107 | config GPIO_HYST_PORTF_14_15 | |
108 | bool "Enable Hysteresis on PORTF {14, 15}" | |
109 | endmenu | |
110 | ||
111 | menu "PORT G" | |
112 | depends on BFIN_HYSTERESIS_CONTROL | |
113 | config GPIO_HYST_PORTG_0 | |
114 | bool "Enable Hysteresis on PORTG 0" | |
115 | config GPIO_HYST_PORTG_1_4 | |
116 | bool "Enable Hysteresis on PORTG {1...4}" | |
117 | config GPIO_HYST_PORTG_5_6 | |
118 | bool "Enable Hysteresis on PORTG {5, 6}" | |
119 | config GPIO_HYST_PORTG_7_8 | |
120 | bool "Enable Hysteresis on PORTG {7, 8}" | |
121 | config GPIO_HYST_PORTG_9 | |
122 | bool "Enable Hysteresis on PORTG 9" | |
123 | config GPIO_HYST_PORTG_10 | |
124 | bool "Enable Hysteresis on PORTG 10" | |
125 | config GPIO_HYST_PORTG_11_13 | |
126 | bool "Enable Hysteresis on PORTG {11...13}" | |
127 | config GPIO_HYST_PORTG_14_15 | |
128 | bool "Enable Hysteresis on PORTG {14, 15}" | |
129 | endmenu | |
130 | ||
131 | menu "PORT H" | |
132 | depends on BFIN_HYSTERESIS_CONTROL | |
133 | config GPIO_HYST_PORTH_0_7 | |
134 | bool "Enable Hysteresis on PORTH {0...7}" | |
135 | ||
136 | endmenu | |
137 | ||
138 | menu "None-GPIO" | |
139 | depends on BFIN_HYSTERESIS_CONTROL | |
140 | config NONEGPIO_HYST_NMI_RST_BMODE | |
141 | bool "Enable Hysteresis on {NMI, RESET, BMODE}" | |
142 | config NONEGPIO_HYST_JTAG | |
143 | bool "Enable Hysteresis on JTAG" | |
144 | endmenu | |
145 | ||
2f6f4bcd BW |
146 | comment "Interrupt Priority Assignment" |
147 | menu "Priority" | |
148 | ||
149 | config IRQ_PLL_WAKEUP | |
150 | int "IRQ_PLL_WAKEUP" | |
151 | default 7 | |
152 | config IRQ_DMA0_ERROR | |
153 | int "IRQ_DMA0_ERROR" | |
154 | default 7 | |
155 | config IRQ_DMAR0_BLK | |
156 | int "IRQ_DMAR0_BLK" | |
157 | default 7 | |
158 | config IRQ_DMAR1_BLK | |
159 | int "IRQ_DMAR1_BLK" | |
160 | default 7 | |
161 | config IRQ_DMAR0_OVR | |
162 | int "IRQ_DMAR0_OVR" | |
163 | default 7 | |
164 | config IRQ_DMAR1_OVR | |
165 | int "IRQ_DMAR1_OVR" | |
166 | default 7 | |
167 | config IRQ_PPI_ERROR | |
168 | int "IRQ_PPI_ERROR" | |
169 | default 7 | |
170 | config IRQ_MAC_ERROR | |
171 | int "IRQ_MAC_ERROR" | |
172 | default 7 | |
173 | config IRQ_SPORT0_ERROR | |
174 | int "IRQ_SPORT0_ERROR" | |
175 | default 7 | |
176 | config IRQ_SPORT1_ERROR | |
177 | int "IRQ_SPORT1_ERROR" | |
178 | default 7 | |
179 | config IRQ_PTP_ERROR | |
180 | int "IRQ_PTP_ERROR" | |
181 | default 7 | |
182 | config IRQ_UART0_ERROR | |
183 | int "IRQ_UART0_ERROR" | |
184 | default 7 | |
185 | config IRQ_UART1_ERROR | |
186 | int "IRQ_UART1_ERROR" | |
187 | default 7 | |
188 | config IRQ_RTC | |
189 | int "IRQ_RTC" | |
190 | default 8 | |
191 | config IRQ_PPI | |
192 | int "IRQ_PPI" | |
193 | default 8 | |
194 | config IRQ_SPORT0_RX | |
195 | int "IRQ_SPORT0_RX" | |
196 | default 9 | |
197 | config IRQ_SPORT0_TX | |
198 | int "IRQ_SPORT0_TX" | |
199 | default 9 | |
200 | config IRQ_SPORT1_RX | |
201 | int "IRQ_SPORT1_RX" | |
202 | default 9 | |
203 | config IRQ_SPORT1_TX | |
204 | int "IRQ_SPORT1_TX" | |
205 | default 9 | |
206 | config IRQ_TWI | |
207 | int "IRQ_TWI" | |
208 | default 10 | |
209 | config IRQ_SPI0 | |
210 | int "IRQ_SPI" | |
211 | default 10 | |
212 | config IRQ_UART0_RX | |
213 | int "IRQ_UART0_RX" | |
214 | default 10 | |
215 | config IRQ_UART0_TX | |
216 | int "IRQ_UART0_TX" | |
217 | default 10 | |
218 | config IRQ_UART1_RX | |
219 | int "IRQ_UART1_RX" | |
220 | default 10 | |
221 | config IRQ_UART1_TX | |
222 | int "IRQ_UART1_TX" | |
223 | default 10 | |
224 | config IRQ_OPTSEC | |
225 | int "IRQ_OPTSEC" | |
226 | default 11 | |
227 | config IRQ_CNT | |
228 | int "IRQ_CNT" | |
229 | default 11 | |
230 | config IRQ_MAC_RX | |
231 | int "IRQ_MAC_RX" | |
232 | default 11 | |
233 | config IRQ_PORTH_INTA | |
234 | int "IRQ_PORTH_INTA" | |
235 | default 11 | |
236 | config IRQ_MAC_TX | |
237 | int "IRQ_MAC_TX/NFC" | |
238 | default 11 | |
239 | config IRQ_PORTH_INTB | |
240 | int "IRQ_PORTH_INTB" | |
241 | default 11 | |
6a01f230 YL |
242 | config IRQ_TIMER0 |
243 | int "IRQ_TIMER0" | |
1fa9be72 | 244 | default 7 if TICKSOURCE_GPTMR0 |
6a01f230 YL |
245 | default 8 |
246 | config IRQ_TIMER1 | |
247 | int "IRQ_TIMER1" | |
2f6f4bcd | 248 | default 12 |
6a01f230 YL |
249 | config IRQ_TIMER2 |
250 | int "IRQ_TIMER2" | |
2f6f4bcd | 251 | default 12 |
6a01f230 YL |
252 | config IRQ_TIMER3 |
253 | int "IRQ_TIMER3" | |
2f6f4bcd | 254 | default 12 |
6a01f230 YL |
255 | config IRQ_TIMER4 |
256 | int "IRQ_TIMER4" | |
2f6f4bcd | 257 | default 12 |
6a01f230 YL |
258 | config IRQ_TIMER5 |
259 | int "IRQ_TIMER5" | |
2f6f4bcd | 260 | default 12 |
6a01f230 YL |
261 | config IRQ_TIMER6 |
262 | int "IRQ_TIMER6" | |
2f6f4bcd | 263 | default 12 |
6a01f230 YL |
264 | config IRQ_TIMER7 |
265 | int "IRQ_TIMER7" | |
2f6f4bcd BW |
266 | default 12 |
267 | config IRQ_PORTG_INTA | |
268 | int "IRQ_PORTG_INTA" | |
269 | default 12 | |
270 | config IRQ_PORTG_INTB | |
271 | int "IRQ_PORTG_INTB" | |
272 | default 12 | |
273 | config IRQ_MEM_DMA0 | |
274 | int "IRQ_MEM_DMA0" | |
275 | default 13 | |
276 | config IRQ_MEM_DMA1 | |
277 | int "IRQ_MEM_DMA1" | |
278 | default 13 | |
279 | config IRQ_WATCH | |
280 | int "IRQ_WATCH" | |
281 | default 13 | |
282 | config IRQ_PORTF_INTA | |
283 | int "IRQ_PORTF_INTA" | |
284 | default 13 | |
285 | config IRQ_PORTF_INTB | |
286 | int "IRQ_PORTF_INTB" | |
287 | default 13 | |
288 | config IRQ_SPI0_ERROR | |
289 | int "IRQ_SPI0_ERROR" | |
290 | default 7 | |
291 | config IRQ_SPI1_ERROR | |
292 | int "IRQ_SPI1_ERROR" | |
293 | default 7 | |
294 | config IRQ_RSI_INT0 | |
295 | int "IRQ_RSI_INT0" | |
296 | default 7 | |
297 | config IRQ_RSI_INT1 | |
298 | int "IRQ_RSI_INT1" | |
299 | default 7 | |
300 | config IRQ_PWM_TRIP | |
301 | int "IRQ_PWM_TRIP" | |
302 | default 10 | |
303 | config IRQ_PWM_SYNC | |
304 | int "IRQ_PWM_SYNC" | |
305 | default 10 | |
306 | config IRQ_PTP_STAT | |
307 | int "IRQ_PTP_STAT" | |
308 | default 10 | |
309 | ||
310 | help | |
311 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. | |
312 | This applies to all the above. It is not recommended to assign the | |
313 | highest priority number 7 to UART or any other device. | |
314 | ||
315 | endmenu | |
316 | ||
317 | endmenu | |
318 | ||
319 | endif |