Commit | Line | Data |
---|---|---|
5df326ac MF |
1 | config BF52x |
2 | def_bool y | |
3 | depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527) | |
4 | ||
59003145 MH |
5 | if (BF52x) |
6 | ||
4f25eb85 MF |
7 | source "arch/blackfin/mach-bf527/boards/Kconfig" |
8 | ||
59003145 MH |
9 | menu "BF527 Specific Configuration" |
10 | ||
11 | comment "Alternative Multiplexing Scheme" | |
12 | ||
13 | choice | |
14 | prompt "SPORT0" | |
15 | default BF527_SPORT0_PORTG | |
16 | help | |
17 | Select PORT used for SPORT0. See Hardware Reference Manual | |
18 | ||
19 | config BF527_SPORT0_PORTF | |
20 | bool "PORT F" | |
21 | help | |
22 | PORT F | |
23 | ||
24 | config BF527_SPORT0_PORTG | |
25 | bool "PORT G" | |
26 | help | |
27 | PORT G | |
28 | endchoice | |
29 | ||
30 | choice | |
31 | prompt "SPORT0 TSCLK Location" | |
32 | depends on BF527_SPORT0_PORTG | |
33 | default BF527_SPORT0_TSCLK_PG10 | |
34 | help | |
35 | Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual | |
36 | ||
37 | config BF527_SPORT0_TSCLK_PG10 | |
38 | bool "PORT PG10" | |
39 | help | |
40 | PORT PG10 | |
41 | ||
42 | config BF527_SPORT0_TSCLK_PG14 | |
43 | bool "PORT PG14" | |
44 | help | |
45 | PORT PG14 | |
46 | endchoice | |
47 | ||
48 | choice | |
49 | prompt "UART1" | |
0e85e302 | 50 | default BF527_UART1_PORTF |
59003145 MH |
51 | help |
52 | Select PORT used for UART1. See Hardware Reference Manual | |
53 | ||
54 | config BF527_UART1_PORTF | |
55 | bool "PORT F" | |
56 | help | |
57 | PORT F | |
58 | ||
59 | config BF527_UART1_PORTG | |
60 | bool "PORT G" | |
61 | help | |
62 | PORT G | |
63 | endchoice | |
64 | ||
65 | choice | |
66 | prompt "NAND (NFC) Data" | |
67 | default BF527_NAND_D_PORTH | |
68 | help | |
69 | Select PORT used for NAND Data Bus. See Hardware Reference Manual | |
70 | ||
71 | config BF527_NAND_D_PORTF | |
72 | bool "PORT F" | |
73 | help | |
74 | PORT F | |
75 | ||
76 | config BF527_NAND_D_PORTH | |
77 | bool "PORT H" | |
78 | help | |
79 | PORT H | |
80 | endchoice | |
81 | ||
7a4a207e MH |
82 | comment "Hysteresis/Schmitt Trigger Control" |
83 | config BFIN_HYSTERESIS_CONTROL | |
84 | bool "Enable Hysteresis Control" | |
85 | help | |
86 | The ADSP-BF52x allows to control input hysteresis for Port F, | |
87 | Port G and Port H and other processor signal inputs. | |
88 | The Schmitt trigger enables can be set only for pin groups. | |
89 | Saying Y will overwrite the default reset or boot loader | |
90 | initialization. | |
91 | ||
92 | menu "PORT F" | |
93 | depends on BFIN_HYSTERESIS_CONTROL | |
94 | config GPIO_HYST_PORTF_0_7 | |
95 | bool "Enable Hysteresis on PORTF {0...7}" | |
96 | config GPIO_HYST_PORTF_8_9 | |
97 | bool "Enable Hysteresis on PORTF {8, 9}" | |
98 | config GPIO_HYST_PORTF_10 | |
99 | bool "Enable Hysteresis on PORTF 10" | |
100 | config GPIO_HYST_PORTF_11 | |
101 | bool "Enable Hysteresis on PORTF 11" | |
102 | config GPIO_HYST_PORTF_12_13 | |
103 | bool "Enable Hysteresis on PORTF {12, 13}" | |
104 | config GPIO_HYST_PORTF_14_15 | |
105 | bool "Enable Hysteresis on PORTF {14, 15}" | |
106 | endmenu | |
107 | ||
108 | menu "PORT G" | |
109 | depends on BFIN_HYSTERESIS_CONTROL | |
110 | config GPIO_HYST_PORTG_0 | |
111 | bool "Enable Hysteresis on PORTG 0" | |
112 | config GPIO_HYST_PORTG_1_4 | |
113 | bool "Enable Hysteresis on PORTG {1...4}" | |
114 | config GPIO_HYST_PORTG_5_6 | |
115 | bool "Enable Hysteresis on PORTG {5, 6}" | |
116 | config GPIO_HYST_PORTG_7_8 | |
117 | bool "Enable Hysteresis on PORTG {7, 8}" | |
118 | config GPIO_HYST_PORTG_9 | |
119 | bool "Enable Hysteresis on PORTG 9" | |
120 | config GPIO_HYST_PORTG_10 | |
121 | bool "Enable Hysteresis on PORTG 10" | |
122 | config GPIO_HYST_PORTG_11_13 | |
123 | bool "Enable Hysteresis on PORTG {11...13}" | |
124 | config GPIO_HYST_PORTG_14_15 | |
125 | bool "Enable Hysteresis on PORTG {14, 15}" | |
126 | endmenu | |
127 | ||
128 | menu "PORT H" | |
129 | depends on BFIN_HYSTERESIS_CONTROL | |
130 | config GPIO_HYST_PORTH_0_7 | |
131 | bool "Enable Hysteresis on PORTH {0...7}" | |
132 | config GPIO_HYST_PORTH_8 | |
133 | bool "Enable Hysteresis on PORTH 8" | |
134 | config GPIO_HYST_PORTH_9_15 | |
135 | bool "Enable Hysteresis on PORTH {9...15}" | |
136 | endmenu | |
137 | ||
138 | menu "None-GPIO" | |
139 | depends on BFIN_HYSTERESIS_CONTROL | |
140 | config NONEGPIO_HYST_TMR0_FS1_PPICLK | |
141 | bool "Enable Hysteresis on {TMR0, PPI_FS1, PPI_CLK}" | |
142 | config NONEGPIO_HYST_NMI_RST_BMODE | |
143 | bool "Enable Hysteresis on {NMI, RESET, BMODE}" | |
144 | config NONEGPIO_HYST_JTAG | |
145 | bool "Enable Hysteresis on JTAG" | |
146 | endmenu | |
147 | ||
59003145 MH |
148 | comment "Interrupt Priority Assignment" |
149 | menu "Priority" | |
150 | ||
151 | config IRQ_PLL_WAKEUP | |
152 | int "IRQ_PLL_WAKEUP" | |
153 | default 7 | |
154 | config IRQ_DMA0_ERROR | |
155 | int "IRQ_DMA0_ERROR" | |
156 | default 7 | |
157 | config IRQ_DMAR0_BLK | |
158 | int "IRQ_DMAR0_BLK" | |
159 | default 7 | |
160 | config IRQ_DMAR1_BLK | |
161 | int "IRQ_DMAR1_BLK" | |
162 | default 7 | |
163 | config IRQ_DMAR0_OVR | |
164 | int "IRQ_DMAR0_OVR" | |
165 | default 7 | |
166 | config IRQ_DMAR1_OVR | |
167 | int "IRQ_DMAR1_OVR" | |
168 | default 7 | |
169 | config IRQ_PPI_ERROR | |
170 | int "IRQ_PPI_ERROR" | |
171 | default 7 | |
172 | config IRQ_MAC_ERROR | |
173 | int "IRQ_MAC_ERROR" | |
174 | default 7 | |
175 | config IRQ_SPORT0_ERROR | |
176 | int "IRQ_SPORT0_ERROR" | |
177 | default 7 | |
178 | config IRQ_SPORT1_ERROR | |
179 | int "IRQ_SPORT1_ERROR" | |
180 | default 7 | |
181 | config IRQ_UART0_ERROR | |
182 | int "IRQ_UART0_ERROR" | |
183 | default 7 | |
184 | config IRQ_UART1_ERROR | |
185 | int "IRQ_UART1_ERROR" | |
186 | default 7 | |
187 | config IRQ_RTC | |
188 | int "IRQ_RTC" | |
189 | default 8 | |
190 | config IRQ_PPI | |
191 | int "IRQ_PPI" | |
192 | default 8 | |
193 | config IRQ_SPORT0_RX | |
194 | int "IRQ_SPORT0_RX" | |
195 | default 9 | |
196 | config IRQ_SPORT0_TX | |
197 | int "IRQ_SPORT0_TX" | |
198 | default 9 | |
199 | config IRQ_SPORT1_RX | |
200 | int "IRQ_SPORT1_RX" | |
201 | default 9 | |
202 | config IRQ_SPORT1_TX | |
203 | int "IRQ_SPORT1_TX" | |
204 | default 9 | |
205 | config IRQ_TWI | |
206 | int "IRQ_TWI" | |
207 | default 10 | |
208 | config IRQ_SPI | |
209 | int "IRQ_SPI" | |
210 | default 10 | |
211 | config IRQ_UART0_RX | |
212 | int "IRQ_UART0_RX" | |
213 | default 10 | |
214 | config IRQ_UART0_TX | |
215 | int "IRQ_UART0_TX" | |
216 | default 10 | |
217 | config IRQ_UART1_RX | |
218 | int "IRQ_UART1_RX" | |
219 | default 10 | |
220 | config IRQ_UART1_TX | |
221 | int "IRQ_UART1_TX" | |
222 | default 10 | |
223 | config IRQ_OPTSEC | |
224 | int "IRQ_OPTSEC" | |
225 | default 11 | |
226 | config IRQ_CNT | |
227 | int "IRQ_CNT" | |
228 | default 11 | |
229 | config IRQ_MAC_RX | |
230 | int "IRQ_MAC_RX" | |
231 | default 11 | |
232 | config IRQ_PORTH_INTA | |
233 | int "IRQ_PORTH_INTA" | |
234 | default 11 | |
235 | config IRQ_MAC_TX | |
236 | int "IRQ_MAC_TX/NFC" | |
237 | default 11 | |
238 | config IRQ_PORTH_INTB | |
239 | int "IRQ_PORTH_INTB" | |
240 | default 11 | |
6a01f230 YL |
241 | config IRQ_TIMER0 |
242 | int "IRQ_TIMER0" | |
1fa9be72 | 243 | default 7 if TICKSOURCE_GPTMR0 |
6a01f230 YL |
244 | default 8 |
245 | config IRQ_TIMER1 | |
246 | int "IRQ_TIMER1" | |
59003145 | 247 | default 12 |
6a01f230 YL |
248 | config IRQ_TIMER2 |
249 | int "IRQ_TIMER2" | |
59003145 | 250 | default 12 |
6a01f230 YL |
251 | config IRQ_TIMER3 |
252 | int "IRQ_TIMER3" | |
59003145 | 253 | default 12 |
6a01f230 YL |
254 | config IRQ_TIMER4 |
255 | int "IRQ_TIMER4" | |
59003145 | 256 | default 12 |
6a01f230 YL |
257 | config IRQ_TIMER5 |
258 | int "IRQ_TIMER5" | |
59003145 | 259 | default 12 |
6a01f230 YL |
260 | config IRQ_TIMER6 |
261 | int "IRQ_TIMER6" | |
59003145 | 262 | default 12 |
6a01f230 YL |
263 | config IRQ_TIMER7 |
264 | int "IRQ_TIMER7" | |
59003145 MH |
265 | default 12 |
266 | config IRQ_PORTG_INTA | |
267 | int "IRQ_PORTG_INTA" | |
268 | default 12 | |
269 | config IRQ_PORTG_INTB | |
270 | int "IRQ_PORTG_INTB" | |
271 | default 12 | |
272 | config IRQ_MEM_DMA0 | |
273 | int "IRQ_MEM_DMA0" | |
274 | default 13 | |
275 | config IRQ_MEM_DMA1 | |
276 | int "IRQ_MEM_DMA1" | |
277 | default 13 | |
278 | config IRQ_WATCH | |
279 | int "IRQ_WATCH" | |
280 | default 13 | |
281 | config IRQ_PORTF_INTA | |
282 | int "IRQ_PORTF_INTA" | |
283 | default 13 | |
284 | config IRQ_PORTF_INTB | |
285 | int "IRQ_PORTF_INTB" | |
286 | default 13 | |
287 | config IRQ_SPI_ERROR | |
288 | int "IRQ_SPI_ERROR" | |
289 | default 7 | |
290 | config IRQ_NFC_ERROR | |
291 | int "IRQ_NFC_ERROR" | |
292 | default 7 | |
293 | config IRQ_HDMA_ERROR | |
294 | int "IRQ_HDMA_ERROR" | |
295 | default 7 | |
296 | config IRQ_HDMA | |
297 | int "IRQ_HDMA" | |
298 | default 7 | |
299 | config IRQ_USB_EINT | |
300 | int "IRQ_USB_EINT" | |
301 | default 10 | |
302 | config IRQ_USB_INT0 | |
303 | int "IRQ_USB_INT0" | |
304 | default 10 | |
305 | config IRQ_USB_INT1 | |
306 | int "IRQ_USB_INT1" | |
307 | default 10 | |
308 | config IRQ_USB_INT2 | |
309 | int "IRQ_USB_INT2" | |
310 | default 10 | |
311 | config IRQ_USB_DMA | |
312 | int "IRQ_USB_DMA" | |
313 | default 10 | |
314 | ||
315 | help | |
316 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. | |
317 | This applies to all the above. It is not recommended to assign the | |
318 | highest priority number 7 to UART or any other device. | |
319 | ||
320 | endmenu | |
321 | ||
322 | endmenu | |
323 | ||
324 | endif |