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Blackfin: bf527-ezkit: add support for V2.1 boards
[deliverable/linux.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
d7e5dd41 13#include <linux/mtd/physmap.h>
59003145
MH		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
72268689 16#include <linux/i2c.h>
59003145
MH		 17#include <linux/irq.h>
18#include <linux/interrupt.h>
632f658b 19#include <linux/usb/sl811.h>
1089e228 20#include <linux/usb/musb.h>
6924dfb0
MH		 21#include <linux/leds.h>
22#include <linux/input.h>
59003145
MH		 23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
64307f7d 26#include <asm/nand.h>
5d448dd5 27#include <asm/portmux.h>
14b03204 28#include <asm/dpmc.h>
59003145
MH		 29#include <linux/spi/ad7877.h>
30
31/*
32 * Name the Board for the /proc/cpuinfo
33 */
6924dfb0
MH		 34#ifdef CONFIG_BFIN527_EZKIT_V2
35const char bfin_board_name[] = "ADI BF527-EZKIT V2";
36#else
fe85cad2 37const char bfin_board_name[] = "ADI BF527-EZKIT";
6924dfb0 38#endif
59003145
MH		 39
40/*
41 * Driver needs to know address, irq and flag pin.
42 */
43
59003145 44#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 45#include <linux/usb/isp1760.h>
46static struct resource bfin_isp1760_resources[] = {
59003145 47 [0] = {
3f375690
MH		 48 .start = 0x203C0000,
49 .end = 0x203C0000 + 0x000fffff,
59003145
MH		 50 .flags = IORESOURCE_MEM,
51 },
52 [1] = {
3f375690
MH		 53 .start = IRQ_PF7,
54 .end = IRQ_PF7,
59003145
MH		 55 .flags = IORESOURCE_IRQ,
56 },
57};
58
3f375690
MH		 59static struct isp1760_platform_data isp1760_priv = {
60 .is_isp1761 = 0,
3f375690
MH		 61 .bus_width_16 = 1,
62 .port1_otg = 0,
63 .analog_oc = 0,
64 .dack_polarity_high = 0,
65 .dreq_polarity_high = 0,
59003145
MH		 66};
67
3f375690 68static struct platform_device bfin_isp1760_device = {
c6feb768 69 .name = "isp1760",
3f375690
MH		 70 .id = 0,
71 .dev = {
72 .platform_data = &isp1760_priv,
73 },
74 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
75 .resource = bfin_isp1760_resources,
59003145 76};
59003145
MH		 77#endif
78
1089e228
MH		 79#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
80static struct resource musb_resources[] = {
81 [0] = {
82 .start = 0xffc03800,
83 .end = 0xffc03cff,
84 .flags = IORESOURCE_MEM,
85 },
86 [1] = { /* general IRQ */
87 .start = IRQ_USB_INT0,
88 .end = IRQ_USB_INT0,
89 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
90 },
91 [2] = { /* DMA IRQ */
92 .start = IRQ_USB_DMA,
93 .end = IRQ_USB_DMA,
94 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
95 },
96};
97
50041acb
BW		 98static struct musb_hdrc_config musb_config = {
99 .multipoint = 0,
100 .dyn_fifo = 0,
101 .soft_con = 1,
102 .dma = 1,
fea05dac
BW		 103 .num_eps = 8,
104 .dma_channels = 8,
50041acb
BW		 105 .gpio_vrsel = GPIO_PG13,
106};
107
1089e228
MH		 108static struct musb_hdrc_platform_data musb_plat = {
109#if defined(CONFIG_USB_MUSB_OTG)
110 .mode = MUSB_OTG,
111#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
112 .mode = MUSB_HOST,
113#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
114 .mode = MUSB_PERIPHERAL,
115#endif
50041acb 116 .config = &musb_config,
1089e228
MH		 117};
118
119static u64 musb_dmamask = ~(u32)0;
120
121static struct platform_device musb_device = {
122 .name = "musb_hdrc",
123 .id = 0,
124 .dev = {
125 .dma_mask = &musb_dmamask,
126 .coherent_dma_mask = 0xffffffff,
127 .platform_data = &musb_plat,
128 },
129 .num_resources = ARRAY_SIZE(musb_resources),
130 .resource = musb_resources,
131};
132#endif
133
134#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
135
136static struct resource bf52x_t350mcqb_resources[] = {
137 {
138 .start = IRQ_PPI_ERROR,
139 .end = IRQ_PPI_ERROR,
140 .flags = IORESOURCE_IRQ,
141 },
142};
143
144static struct platform_device bf52x_t350mcqb_device = {
145 .name = "bfin-t350mcqb",
146 .id = -1,
147 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
148 .resource = bf52x_t350mcqb_resources,
149};
150#endif
151
6924dfb0
MH		 152#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
153#include <asm/bfin-lq035q1.h>
154
155static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
156 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
157};
158
159static struct resource bfin_lq035q1_resources[] = {
160 {
161 .start = IRQ_PPI_ERROR,
162 .end = IRQ_PPI_ERROR,
163 .flags = IORESOURCE_IRQ,
164 },
165};
166
167static struct platform_device bfin_lq035q1_device = {
168 .name = "bfin-lq035q1",
169 .id = -1,
170 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
171 .resource = bfin_lq035q1_resources,
172 .dev = {
173 .platform_data = &bfin_lq035q1_data,
174 },
175};
176#endif
177
d7e5dd41
MH		 178#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
179static struct mtd_partition ezkit_partitions[] = {
180 {
aa582977 181 .name = "bootloader(nor)",
d7e5dd41
MH		 182 .size = 0x40000,
183 .offset = 0,
184 }, {
aa582977 185 .name = "linux kernel(nor)",
d7e5dd41
MH		 186 .size = 0x1C0000,
187 .offset = MTDPART_OFS_APPEND,
188 }, {
aa582977 189 .name = "file system(nor)",
d7e5dd41
MH		 190 .size = MTDPART_SIZ_FULL,
191 .offset = MTDPART_OFS_APPEND,
192 }
193};
194
195static struct physmap_flash_data ezkit_flash_data = {
196 .width = 2,
197 .parts = ezkit_partitions,
198 .nr_parts = ARRAY_SIZE(ezkit_partitions),
199};
200
201static struct resource ezkit_flash_resource = {
202 .start = 0x20000000,
203 .end = 0x203fffff,
204 .flags = IORESOURCE_MEM,
205};
206
207static struct platform_device ezkit_flash_device = {
208 .name = "physmap-flash",
209 .id = 0,
210 .dev = {
211 .platform_data = &ezkit_flash_data,
212 },
213 .num_resources = 1,
214 .resource = &ezkit_flash_resource,
215};
216#endif
217
64307f7d
MH		 218#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
219static struct mtd_partition partition_info[] = {
220 {
aa582977 221 .name = "linux kernel(nand)",
64307f7d 222 .offset = 0,
f4585a08 223 .size = 4 * 1024 * 1024,
64307f7d
MH		 224 },
225 {
aa582977 226 .name = "file system(nand)",
edf05641
MF		 227 .offset = MTDPART_OFS_APPEND,
228 .size = MTDPART_SIZ_FULL,
64307f7d
MH		 229 },
230};
231
232static struct bf5xx_nand_platform bf5xx_nand_platform = {
233 .page_size = NFC_PG_SIZE_256,
234 .data_width = NFC_NWIDTH_8,
235 .partitions = partition_info,
236 .nr_partitions = ARRAY_SIZE(partition_info),
237 .rd_dly = 3,
238 .wr_dly = 3,
239};
240
241static struct resource bf5xx_nand_resources[] = {
242 {
243 .start = NFC_CTL,
244 .end = NFC_DATA_RD + 2,
245 .flags = IORESOURCE_MEM,
246 },
247 {
248 .start = CH_NFC,
249 .end = CH_NFC,
250 .flags = IORESOURCE_IRQ,
251 },
252};
253
254static struct platform_device bf5xx_nand_device = {
255 .name = "bf5xx-nand",
256 .id = 0,
257 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
258 .resource = bf5xx_nand_resources,
259 .dev = {
260 .platform_data = &bf5xx_nand_platform,
261 },
262};
263#endif
264
59003145
MH		 265#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
266static struct resource bfin_pcmcia_cf_resources[] = {
267 {
268 .start = 0x20310000, /* IO PORT */
269 .end = 0x20312000,
270 .flags = IORESOURCE_MEM,
271 }, {
272 .start = 0x20311000, /* Attribute Memory */
273 .end = 0x20311FFF,
274 .flags = IORESOURCE_MEM,
275 }, {
276 .start = IRQ_PF4,
277 .end = IRQ_PF4,
278 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
279 }, {
280 .start = 6, /* Card Detect PF6 */
281 .end = 6,
282 .flags = IORESOURCE_IRQ,
283 },
284};
285
286static struct platform_device bfin_pcmcia_cf_device = {
287 .name = "bfin_cf_pcmcia",
288 .id = -1,
289 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
290 .resource = bfin_pcmcia_cf_resources,
291};
292#endif
293
294#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
295static struct platform_device rtc_device = {
296 .name = "rtc-bfin",
297 .id = -1,
298};
299#endif
300
301#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 302#include <linux/smc91x.h>
303
304static struct smc91x_platdata smc91x_info = {
305 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
306 .leda = RPC_LED_100_10,
307 .ledb = RPC_LED_TX_RX,
308};
309
59003145
MH		 310static struct resource smc91x_resources[] = {
311 {
312 .name = "smc91x-regs",
313 .start = 0x20300300,
314 .end = 0x20300300 + 16,
315 .flags = IORESOURCE_MEM,
316 }, {
317
318 .start = IRQ_PF7,
319 .end = IRQ_PF7,
320 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
321 },
322};
323static struct platform_device smc91x_device = {
324 .name = "smc91x",
325 .id = 0,
326 .num_resources = ARRAY_SIZE(smc91x_resources),
327 .resource = smc91x_resources,
61f09b5a
MH		 328 .dev = {
329 .platform_data = &smc91x_info,
330 },
59003145
MH		 331};
332#endif
333
334#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
335static struct resource dm9000_resources[] = {
336 [0] = {
337 .start = 0x203FB800,
da3854fc 338 .end = 0x203FB800 + 1,
59003145
MH		 339 .flags = IORESOURCE_MEM,
340 },
341 [1] = {
da3854fc
LP		 342 .start = 0x203FB800 + 4,
343 .end = 0x203FB800 + 5,
344 .flags = IORESOURCE_MEM,
345 },
346 [2] = {
59003145
MH		 347 .start = IRQ_PF9,
348 .end = IRQ_PF9,
349 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
350 },
351};
352
353static struct platform_device dm9000_device = {
354 .name = "dm9000",
355 .id = -1,
356 .num_resources = ARRAY_SIZE(dm9000_resources),
357 .resource = dm9000_resources,
358};
359#endif
360
361#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
362static struct resource sl811_hcd_resources[] = {
363 {
364 .start = 0x20340000,
365 .end = 0x20340000,
366 .flags = IORESOURCE_MEM,
367 }, {
368 .start = 0x20340004,
369 .end = 0x20340004,
370 .flags = IORESOURCE_MEM,
371 }, {
372 .start = CONFIG_USB_SL811_BFIN_IRQ,
373 .end = CONFIG_USB_SL811_BFIN_IRQ,
374 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
375 },
376};
377
378#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
379void sl811_port_power(struct device *dev, int is_on)
380{
381 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 382 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
59003145
MH		 383}
384#endif
385
386static struct sl811_platform_data sl811_priv = {
387 .potpg = 10,
388 .power = 250, /* == 500mA */
389#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
390 .port_power = &sl811_port_power,
391#endif
392};
393
394static struct platform_device sl811_hcd_device = {
395 .name = "sl811-hcd",
396 .id = 0,
397 .dev = {
398 .platform_data = &sl811_priv,
399 },
400 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
401 .resource = sl811_hcd_resources,
402};
403#endif
404
59003145 405#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 406static struct platform_device bfin_mii_bus = {
407 .name = "bfin_mii_bus",
408};
409
59003145
MH		 410static struct platform_device bfin_mac_device = {
411 .name = "bfin_mac",
65319628 412 .dev.platform_data = &bfin_mii_bus,
59003145
MH		 413};
414#endif
415
416#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
417static struct resource net2272_bfin_resources[] = {
418 {
419 .start = 0x20300000,
420 .end = 0x20300000 + 0x100,
421 .flags = IORESOURCE_MEM,
422 }, {
423 .start = IRQ_PF7,
424 .end = IRQ_PF7,
425 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
426 },
427};
428
429static struct platform_device net2272_bfin_device = {
430 .name = "net2272",
431 .id = -1,
432 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
433 .resource = net2272_bfin_resources,
434};
435#endif
436
59003145
MH		 437#if defined(CONFIG_MTD_M25P80) \
438 || defined(CONFIG_MTD_M25P80_MODULE)
439static struct mtd_partition bfin_spi_flash_partitions[] = {
440 {
aa582977 441 .name = "bootloader(spi)",
ac76d889 442 .size = 0x00040000,
59003145
MH		 443 .offset = 0,
444 .mask_flags = MTD_CAP_ROM
445 }, {
aa582977 446 .name = "linux kernel(spi)",
edf05641
MF		 447 .size = MTDPART_SIZ_FULL,
448 .offset = MTDPART_OFS_APPEND,
59003145
MH		 449 }
450};
451
452static struct flash_platform_data bfin_spi_flash_data = {
453 .name = "m25p80",
454 .parts = bfin_spi_flash_partitions,
455 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 456 .type = "m25p16",
59003145
MH		 457};
458
459/* SPI flash chip (m25p64) */
460static struct bfin5xx_spi_chip spi_flash_chip_info = {
461 .enable_dma = 0, /* use dma transfer with this chip*/
462 .bits_per_word = 8,
463};
464#endif
465
a261eec0
MF		 466#if defined(CONFIG_BFIN_SPI_ADC) \
467 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 468/* SPI ADC chip */
469static struct bfin5xx_spi_chip spi_adc_chip_info = {
470 .enable_dma = 1, /* use dma transfer with this chip*/
471 .bits_per_word = 16,
472};
473#endif
474
475#if defined(CONFIG_SND_BLACKFIN_AD1836) \
476 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
477static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
478 .enable_dma = 0,
479 .bits_per_word = 16,
480};
481#endif
482
ffdf3ec8
YL		 483#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
484static struct bfin5xx_spi_chip mmc_spi_chip_info = {
485 .enable_dma = 0,
486 .bits_per_word = 8,
487};
488#endif
489
59003145
MH		 490#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
491static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
492 .enable_dma = 0,
493 .bits_per_word = 16,
494};
495
496static const struct ad7877_platform_data bfin_ad7877_ts_info = {
497 .model = 7877,
498 .vref_delay_usecs = 50, /* internal, no capacitor */
499 .x_plate_ohms = 419,
500 .y_plate_ohms = 486,
501 .pressure_max = 1000,
502 .pressure_min = 0,
503 .stopacq_polarity = 1,
504 .first_conversion_delay = 3,
505 .acquisition_time = 1,
506 .averaging = 1,
507 .pen_down_acc_interval = 1,
508};
509#endif
510
5105432a
MH		 511#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
512#include <linux/spi/ad7879.h>
513static const struct ad7879_platform_data bfin_ad7879_ts_info = {
514 .model = 7879, /* Model = AD7879 */
515 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
516 .pressure_max = 10000,
517 .pressure_min = 0,
518 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
519 .acquisition_time = 1, /* 4us acquisition time per sample */
520 .median = 2, /* do 8 measurements */
521 .averaging = 1, /* take the average of 4 middle samples */
522 .pen_down_acc_interval = 255, /* 9.4 ms */
523 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
524 .gpio_default = 1, /* During initialization set GPIO = HIGH */
525};
526#endif
527
528#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
529static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
530 .enable_dma = 0,
531 .bits_per_word = 16,
532};
533#endif
534
6e668936
MH		 535#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
536static struct bfin5xx_spi_chip spidev_chip_info = {
537 .enable_dma = 0,
538 .bits_per_word = 8,
539};
540#endif
541
6924dfb0
MH		 542#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
543static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
544 .enable_dma = 0,
545 .bits_per_word = 8,
546};
547#endif
548
59003145
MH		 549static struct spi_board_info bfin_spi_board_info[] __initdata = {
550#if defined(CONFIG_MTD_M25P80) \
551 || defined(CONFIG_MTD_M25P80_MODULE)
552 {
553 /* the modalias must be the same as spi device driver name */
554 .modalias = "m25p80", /* Name of spi_driver for this device */
555 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
556 .bus_num = 0, /* Framework bus number */
557 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
558 .platform_data = &bfin_spi_flash_data,
559 .controller_data = &spi_flash_chip_info,
560 .mode = SPI_MODE_3,
561 },
562#endif
563
a261eec0
MF		 564#if defined(CONFIG_BFIN_SPI_ADC) \
565 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 566 {
567 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
568 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
569 .bus_num = 0, /* Framework bus number */
570 .chip_select = 1, /* Framework chip select. */
571 .platform_data = NULL, /* No spi_driver specific config */
572 .controller_data = &spi_adc_chip_info,
573 },
574#endif
575
576#if defined(CONFIG_SND_BLACKFIN_AD1836) \
577 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
578 {
dac98174 579 .modalias = "ad1836",
59003145
MH		 580 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
581 .bus_num = 0,
582 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
583 .controller_data = &ad1836_spi_chip_info,
584 },
585#endif
ffdf3ec8
YL		 586#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
587 {
588 .modalias = "mmc_spi",
589 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
590 .bus_num = 0,
591 .chip_select = 3,
592 .controller_data = &mmc_spi_chip_info,
593 .mode = SPI_MODE_0,
594 },
595#endif
596
59003145
MH		 597#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
598 {
599 .modalias = "ad7877",
600 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 601 .irq = IRQ_PF8,
59003145 602 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 603 .bus_num = 0,
2eb74ae2 604 .chip_select = 2,
59003145
MH		 605 .controller_data = &spi_ad7877_chip_info,
606 },
607#endif
5105432a
MH		 608#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
609 {
610 .modalias = "ad7879",
611 .platform_data = &bfin_ad7879_ts_info,
612 .irq = IRQ_PF8,
613 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
614 .bus_num = 0,
615 .chip_select = 3,
616 .controller_data = &spi_ad7879_chip_info,
617 .mode = SPI_CPHA | SPI_CPOL,
618 },
619#endif
6e668936
MH		 620#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
621 {
622 .modalias = "spidev",
623 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
624 .bus_num = 0,
625 .chip_select = 1,
626 .controller_data = &spidev_chip_info,
627 },
628#endif
6924dfb0
MH		 629#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
630 {
631 .modalias = "bfin-lq035q1-spi",
632 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
633 .bus_num = 0,
634 .chip_select = 7,
635 .controller_data = &lq035q1_spi_chip_info,
636 .mode = SPI_CPHA | SPI_CPOL,
637 },
638#endif
59003145
MH		 639};
640
5bda2723 641#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
59003145
MH		 642/* SPI controller data */
643static struct bfin5xx_spi_master bfin_spi0_info = {
644 .num_chipselect = 8,
645 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 646 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 647};
648
649/* SPI (0) */
650static struct resource bfin_spi0_resource[] = {
651 [0] = {
652 .start = SPI0_REGBASE,
653 .end = SPI0_REGBASE + 0xFF,
654 .flags = IORESOURCE_MEM,
655 },
656 [1] = {
657 .start = CH_SPI,
658 .end = CH_SPI,
53122693
YL		 659 .flags = IORESOURCE_DMA,
660 },
661 [2] = {
662 .start = IRQ_SPI,
663 .end = IRQ_SPI,
59003145
MH		 664 .flags = IORESOURCE_IRQ,
665 },
666};
667
668static struct platform_device bfin_spi0_device = {
669 .name = "bfin-spi",
670 .id = 0, /* Bus number */
671 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
672 .resource = bfin_spi0_resource,
673 .dev = {
674 .platform_data = &bfin_spi0_info, /* Passed to driver */
675 },
676};
677#endif /* spi master and devices */
678
59003145 679#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
59003145 680#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 681static struct resource bfin_uart0_resources[] = {
59003145 682 {
6bd1fbea
SZ		 683 .start = UART0_THR,
684 .end = UART0_GCTL+2,
59003145
MH		 685 .flags = IORESOURCE_MEM,
686 },
6bd1fbea
SZ		 687 {
688 .start = IRQ_UART0_RX,
689 .end = IRQ_UART0_RX+1,
690 .flags = IORESOURCE_IRQ,
691 },
692 {
693 .start = IRQ_UART0_ERROR,
694 .end = IRQ_UART0_ERROR,
695 .flags = IORESOURCE_IRQ,
696 },
697 {
698 .start = CH_UART0_TX,
699 .end = CH_UART0_TX,
700 .flags = IORESOURCE_DMA,
701 },
702 {
703 .start = CH_UART0_RX,
704 .end = CH_UART0_RX,
705 .flags = IORESOURCE_DMA,
706 },
707};
708
709unsigned short bfin_uart0_peripherals[] = {
710 P_UART0_TX, P_UART0_RX, 0
711};
712
713static struct platform_device bfin_uart0_device = {
714 .name = "bfin-uart",
715 .id = 0,
716 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
717 .resource = bfin_uart0_resources,
718 .dev = {
719 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
720 },
721};
59003145
MH		 722#endif
723#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 724static struct resource bfin_uart1_resources[] = {
59003145 725 {
6bd1fbea
SZ		 726 .start = UART1_THR,
727 .end = UART1_GCTL+2,
59003145
MH		 728 .flags = IORESOURCE_MEM,
729 },
6bd1fbea
SZ		 730 {
731 .start = IRQ_UART1_RX,
732 .end = IRQ_UART1_RX+1,
733 .flags = IORESOURCE_IRQ,
734 },
735 {
736 .start = IRQ_UART1_ERROR,
737 .end = IRQ_UART1_ERROR,
738 .flags = IORESOURCE_IRQ,
739 },
740 {
741 .start = CH_UART1_TX,
742 .end = CH_UART1_TX,
743 .flags = IORESOURCE_DMA,
744 },
745 {
746 .start = CH_UART1_RX,
747 .end = CH_UART1_RX,
748 .flags = IORESOURCE_DMA,
749 },
750#ifdef CONFIG_BFIN_UART1_CTSRTS
751 { /* CTS pin */
752 .start = GPIO_PF9,
753 .end = GPIO_PF9,
754 .flags = IORESOURCE_IO,
755 },
756 { /* RTS pin */
757 .start = GPIO_PF10,
758 .end = GPIO_PF10,
759 .flags = IORESOURCE_IO,
760 },
59003145
MH		 761#endif
762};
763
6bd1fbea
SZ		 764unsigned short bfin_uart1_peripherals[] = {
765 P_UART1_TX, P_UART1_RX, 0
766};
767
768static struct platform_device bfin_uart1_device = {
59003145
MH		 769 .name = "bfin-uart",
770 .id = 1,
6bd1fbea
SZ		 771 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
772 .resource = bfin_uart1_resources,
773 .dev = {
774 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
775 },
59003145
MH		 776};
777#endif
6bd1fbea 778#endif
59003145 779
5be36d22 780#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 781#ifdef CONFIG_BFIN_SIR0
42bd8bcb 782static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 783 {
784 .start = 0xFFC00400,
785 .end = 0xFFC004FF,
786 .flags = IORESOURCE_MEM,
787 },
42bd8bcb
GY		 788 {
789 .start = IRQ_UART0_RX,
790 .end = IRQ_UART0_RX+1,
791 .flags = IORESOURCE_IRQ,
792 },
793 {
794 .start = CH_UART0_RX,
795 .end = CH_UART0_RX+1,
796 .flags = IORESOURCE_DMA,
797 },
798};
799
800static struct platform_device bfin_sir0_device = {
801 .name = "bfin_sir",
802 .id = 0,
803 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
804 .resource = bfin_sir0_resources,
805};
5be36d22
GY		 806#endif
807#ifdef CONFIG_BFIN_SIR1
42bd8bcb 808static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 809 {
810 .start = 0xFFC02000,
811 .end = 0xFFC020FF,
812 .flags = IORESOURCE_MEM,
813 },
42bd8bcb
GY		 814 {
815 .start = IRQ_UART1_RX,
816 .end = IRQ_UART1_RX+1,
817 .flags = IORESOURCE_IRQ,
818 },
819 {
820 .start = CH_UART1_RX,
821 .end = CH_UART1_RX+1,
822 .flags = IORESOURCE_DMA,
823 },
5be36d22
GY		 824};
825
42bd8bcb 826static struct platform_device bfin_sir1_device = {
5be36d22 827 .name = "bfin_sir",
42bd8bcb
GY		 828 .id = 1,
829 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
830 .resource = bfin_sir1_resources,
5be36d22
GY		 831};
832#endif
42bd8bcb 833#endif
5be36d22 834
59003145
MH		 835#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
836static struct resource bfin_twi0_resource[] = {
837 [0] = {
838 .start = TWI0_REGBASE,
839 .end = TWI0_REGBASE,
840 .flags = IORESOURCE_MEM,
841 },
842 [1] = {
843 .start = IRQ_TWI,
844 .end = IRQ_TWI,
845 .flags = IORESOURCE_IRQ,
846 },
847};
848
849static struct platform_device i2c_bfin_twi_device = {
850 .name = "i2c-bfin-twi",
851 .id = 0,
852 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
853 .resource = bfin_twi0_resource,
854};
855#endif
856
6924dfb0
MH		 857#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
858#include <linux/mfd/adp5520.h>
859
860 /*
861 * ADP5520/5501 LEDs Data
862 */
863
864static struct led_info adp5520_leds[] = {
865 {
866 .name = "adp5520-led1",
867 .default_trigger = "none",
868 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
869 },
870};
871
872static struct adp5520_leds_platform_data adp5520_leds_data = {
873 .num_leds = ARRAY_SIZE(adp5520_leds),
874 .leds = adp5520_leds,
875 .fade_in = ADP5520_FADE_T_600ms,
876 .fade_out = ADP5520_FADE_T_600ms,
877 .led_on_time = ADP5520_LED_ONT_600ms,
878};
879
880 /*
881 * ADP5520 Keypad Data
882 */
883
884static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
885 [ADP5520_KEY(3, 3)] = KEY_1,
886 [ADP5520_KEY(2, 3)] = KEY_2,
887 [ADP5520_KEY(1, 3)] = KEY_3,
888 [ADP5520_KEY(0, 3)] = KEY_UP,
889 [ADP5520_KEY(3, 2)] = KEY_4,
890 [ADP5520_KEY(2, 2)] = KEY_5,
891 [ADP5520_KEY(1, 2)] = KEY_6,
892 [ADP5520_KEY(0, 2)] = KEY_DOWN,
893 [ADP5520_KEY(3, 1)] = KEY_7,
894 [ADP5520_KEY(2, 1)] = KEY_8,
895 [ADP5520_KEY(1, 1)] = KEY_9,
896 [ADP5520_KEY(0, 1)] = KEY_DOT,
897 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
898 [ADP5520_KEY(2, 0)] = KEY_0,
899 [ADP5520_KEY(1, 0)] = KEY_HELP,
900 [ADP5520_KEY(0, 0)] = KEY_ENTER,
901};
902
903static struct adp5520_keys_platform_data adp5520_keys_data = {
904 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
905 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
906 .keymap = adp5520_keymap,
907 .keymapsize = ARRAY_SIZE(adp5520_keymap),
908 .repeat = 0,
909};
910
911 /*
912 * ADP5520/5501 Multifuction Device Init Data
913 */
914
915static struct adp5520_platform_data adp5520_pdev_data = {
916 .leds = &adp5520_leds_data,
917 .keys = &adp5520_keys_data,
918};
919
920#endif
921
72268689 922static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
ebd58333 923#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
72268689
BW		 924 {
925 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW		 926 },
927#endif
204844eb 928#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
72268689
BW		 929 {
930 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW		 931 .irq = IRQ_PF8,
932 },
933#endif
50c4c086
MH		 934#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
935 {
936 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
937 },
938#endif
6924dfb0
MH		 939#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
940 {
941 I2C_BOARD_INFO("ad7879", 0x2C),
942 .irq = IRQ_PF8,
943 .platform_data = (void *)&bfin_ad7879_ts_info,
944 },
945#endif
946#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
947 {
948 I2C_BOARD_INFO("pmic-adp5520", 0x32),
949 .irq = IRQ_PF9,
950 .platform_data = (void *)&adp5520_pdev_data,
951 },
952#endif
72268689 953};
72268689 954
59003145 955#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 956#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
957static struct resource bfin_sport0_uart_resources[] = {
958 {
959 .start = SPORT0_TCR1,
960 .end = SPORT0_MRCS3+4,
961 .flags = IORESOURCE_MEM,
962 },
963 {
964 .start = IRQ_SPORT0_RX,
965 .end = IRQ_SPORT0_RX+1,
966 .flags = IORESOURCE_IRQ,
967 },
968 {
969 .start = IRQ_SPORT0_ERROR,
970 .end = IRQ_SPORT0_ERROR,
971 .flags = IORESOURCE_IRQ,
972 },
973};
974
975unsigned short bfin_sport0_peripherals[] = {
976 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
977 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
978};
979
59003145
MH		 980static struct platform_device bfin_sport0_uart_device = {
981 .name = "bfin-sport-uart",
982 .id = 0,
df5de261
SZ		 983 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
984 .resource = bfin_sport0_uart_resources,
985 .dev = {
986 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
987 },
988};
989#endif
990#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
991static struct resource bfin_sport1_uart_resources[] = {
992 {
993 .start = SPORT1_TCR1,
994 .end = SPORT1_MRCS3+4,
995 .flags = IORESOURCE_MEM,
996 },
997 {
998 .start = IRQ_SPORT1_RX,
999 .end = IRQ_SPORT1_RX+1,
1000 .flags = IORESOURCE_IRQ,
1001 },
1002 {
1003 .start = IRQ_SPORT1_ERROR,
1004 .end = IRQ_SPORT1_ERROR,
1005 .flags = IORESOURCE_IRQ,
1006 },
1007};
1008
1009unsigned short bfin_sport1_peripherals[] = {
1010 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1011 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
59003145
MH		 1012};
1013
1014static struct platform_device bfin_sport1_uart_device = {
1015 .name = "bfin-sport-uart",
1016 .id = 1,
df5de261
SZ		 1017 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1018 .resource = bfin_sport1_uart_resources,
1019 .dev = {
1020 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1021 },
59003145
MH		 1022};
1023#endif
df5de261 1024#endif
59003145 1025
1089e228 1026#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1089e228
MH		 1027#include <linux/gpio_keys.h>
1028
1029static struct gpio_keys_button bfin_gpio_keys_table[] = {
1030 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1031 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1032};
1033
1034static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1035 .buttons = bfin_gpio_keys_table,
1036 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1037};
1038
1039static struct platform_device bfin_device_gpiokeys = {
1040 .name = "gpio-keys",
1041 .dev = {
1042 .platform_data = &bfin_gpio_keys_data,
1043 },
1044};
1045#endif
1046
adfc0467 1047#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1048#include <asm/bfin_rotary.h>
1049
1050static struct bfin_rotary_platform_data bfin_rotary_data = {
1051 /*.rotary_up_key = KEY_UP,*/
1052 /*.rotary_down_key = KEY_DOWN,*/
1053 .rotary_rel_code = REL_WHEEL,
1054 .rotary_button_key = KEY_ENTER,
1055 .debounce = 10, /* 0..17 */
1056 .mode = ROT_QUAD_ENC | ROT_DEBE,
1057};
1058
1059static struct resource bfin_rotary_resources[] = {
1060 {
1061 .start = IRQ_CNT,
1062 .end = IRQ_CNT,
1063 .flags = IORESOURCE_IRQ,
1064 },
1065};
1066
1067static struct platform_device bfin_rotary_device = {
1068 .name = "bfin-rotary",
1069 .id = -1,
1070 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1071 .resource = bfin_rotary_resources,
1072 .dev = {
1073 .platform_data = &bfin_rotary_data,
1074 },
1075};
1076#endif
1077
14b03204
MH		 1078static const unsigned int cclk_vlev_datasheet[] =
1079{
1080 VRPAIR(VLEV_100, 400000000),
1081 VRPAIR(VLEV_105, 426000000),
1082 VRPAIR(VLEV_110, 500000000),
1083 VRPAIR(VLEV_115, 533000000),
1084 VRPAIR(VLEV_120, 600000000),
1085};
1086
1087static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1088 .tuple_tab = cclk_vlev_datasheet,
1089 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1090 .vr_settling_time = 25 /* us */,
1091};
1092
1093static struct platform_device bfin_dpmc = {
1094 .name = "bfin dpmc",
1095 .dev = {
1096 .platform_data = &bfin_dmpc_vreg_data,
1097 },
1098};
1099
59003145 1100static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1101
1102 &bfin_dpmc,
1103
64307f7d
MH		 1104#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1105 &bf5xx_nand_device,
1106#endif
1107
59003145
MH		 1108#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1109 &bfin_pcmcia_cf_device,
1110#endif
1111
1112#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1113 &rtc_device,
1114#endif
1115
1116#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1117 &sl811_hcd_device,
1118#endif
1119
3f375690
MH		 1120#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1121 &bfin_isp1760_device,
1122#endif
1123
1089e228
MH		 1124#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1125 &musb_device,
1126#endif
1127
59003145
MH		 1128#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1129 &smc91x_device,
1130#endif
1131
1132#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1133 &dm9000_device,
1134#endif
1135
1136#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1137 &bfin_mii_bus,
59003145
MH		 1138 &bfin_mac_device,
1139#endif
1140
1141#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1142 &net2272_bfin_device,
1143#endif
1144
1145#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1146 &bfin_spi0_device,
1147#endif
1148
1089e228
MH		 1149#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1150 &bf52x_t350mcqb_device,
1151#endif
1152
6924dfb0
MH		 1153#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1154 &bfin_lq035q1_device,
1155#endif
1156
59003145 1157#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1158#ifdef CONFIG_SERIAL_BFIN_UART0
1159 &bfin_uart0_device,
1160#endif
1161#ifdef CONFIG_SERIAL_BFIN_UART1
1162 &bfin_uart1_device,
1163#endif
59003145
MH		 1164#endif
1165
5be36d22 1166#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1167#ifdef CONFIG_BFIN_SIR0
1168 &bfin_sir0_device,
1169#endif
1170#ifdef CONFIG_BFIN_SIR1
1171 &bfin_sir1_device,
1172#endif
5be36d22
GY		 1173#endif
1174
59003145
MH		 1175#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1176 &i2c_bfin_twi_device,
1177#endif
1178
1179#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 1180#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
59003145 1181 &bfin_sport0_uart_device,
df5de261
SZ		 1182#endif
1183#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
59003145
MH		 1184 &bfin_sport1_uart_device,
1185#endif
df5de261 1186#endif
59003145 1187
1089e228
MH		 1188#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1189 &bfin_device_gpiokeys,
1190#endif
cad2ab65 1191
adfc0467 1192#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1193 &bfin_rotary_device,
1194#endif
1195
d7e5dd41
MH		 1196#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1197 &ezkit_flash_device,
1198#endif
59003145
MH		 1199};
1200
7f6678c5 1201static int __init ezkit_init(void)
59003145 1202{
b85d858b 1203 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW		 1204 i2c_register_board_info(0, bfin_i2c_board_info,
1205 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1206 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1207 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH		 1208 return 0;
1209}
1210
7f6678c5 1211arch_initcall(ezkit_init);
59003145 1212
c13ce9fd
SZ		 1213static struct platform_device *ezkit_early_devices[] __initdata = {
1214#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1215#ifdef CONFIG_SERIAL_BFIN_UART0
1216 &bfin_uart0_device,
1217#endif
1218#ifdef CONFIG_SERIAL_BFIN_UART1
1219 &bfin_uart1_device,
1220#endif
1221#endif
1222
1223#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1224#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1225 &bfin_sport0_uart_device,
1226#endif
1227#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1228 &bfin_sport1_uart_device,
1229#endif
1230#endif
1231};
1232
1233void __init native_machine_early_platform_add_devices(void)
1234{
1235 printk(KERN_INFO "register early platform devices\n");
1236 early_platform_add_devices(ezkit_early_devices,
1237 ARRAY_SIZE(ezkit_early_devices));
1238}
1239
59003145
MH		 1240void native_machine_restart(char *cmd)
1241{
1242 /* workaround reboot hang when booting from SPI */
1243 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1244 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1245}
137b1529 1246
9862cc52 1247void bfin_get_ether_addr(char *addr)
137b1529 1248{
181afa94
MF		 1249 /* the MAC is stored in OTP memory page 0xDF */
1250 u32 ret;
1251 u64 otp_mac;
1252 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1253
1254 ret = otp_read(0xDF, 0x00, &otp_mac);
1255 if (!(ret & 0x1)) {
1256 char *otp_mac_p = (char *)&otp_mac;
1257 for (ret = 0; ret < 6; ++ret)
1258 addr[ret] = otp_mac_p[5 - ret];
1259 }
137b1529 1260}
9862cc52 1261EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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