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Blackfin: SMP: punt unused atomic_test_mask helper
[deliverable/linux.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
d7e5dd41 13#include <linux/mtd/physmap.h>
59003145
MH		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
72268689 16#include <linux/i2c.h>
59003145
MH		 17#include <linux/irq.h>
18#include <linux/interrupt.h>
1089e228 19#include <linux/usb/musb.h>
6924dfb0
MH		 20#include <linux/leds.h>
21#include <linux/input.h>
59003145
MH		 22#include <asm/dma.h>
23#include <asm/bfin5xx_spi.h>
24#include <asm/reboot.h>
64307f7d 25#include <asm/nand.h>
5d448dd5 26#include <asm/portmux.h>
14b03204 27#include <asm/dpmc.h>
59003145 28#include <linux/spi/ad7877.h>
6f53dbbb 29#include <asm/bfin_sport.h>
59003145
MH		 30
31/*
32 * Name the Board for the /proc/cpuinfo
33 */
6924dfb0
MH		 34#ifdef CONFIG_BFIN527_EZKIT_V2
35const char bfin_board_name[] = "ADI BF527-EZKIT V2";
36#else
fe85cad2 37const char bfin_board_name[] = "ADI BF527-EZKIT";
6924dfb0 38#endif
59003145
MH		 39
40/*
41 * Driver needs to know address, irq and flag pin.
42 */
43
59003145 44#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 45#include <linux/usb/isp1760.h>
46static struct resource bfin_isp1760_resources[] = {
59003145 47 [0] = {
3f375690
MH		 48 .start = 0x203C0000,
49 .end = 0x203C0000 + 0x000fffff,
59003145
MH		 50 .flags = IORESOURCE_MEM,
51 },
52 [1] = {
3f375690
MH		 53 .start = IRQ_PF7,
54 .end = IRQ_PF7,
59003145
MH		 55 .flags = IORESOURCE_IRQ,
56 },
57};
58
3f375690
MH		 59static struct isp1760_platform_data isp1760_priv = {
60 .is_isp1761 = 0,
3f375690
MH		 61 .bus_width_16 = 1,
62 .port1_otg = 0,
63 .analog_oc = 0,
64 .dack_polarity_high = 0,
65 .dreq_polarity_high = 0,
59003145
MH		 66};
67
3f375690 68static struct platform_device bfin_isp1760_device = {
c6feb768 69 .name = "isp1760",
3f375690
MH		 70 .id = 0,
71 .dev = {
72 .platform_data = &isp1760_priv,
73 },
74 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
75 .resource = bfin_isp1760_resources,
59003145 76};
59003145
MH		 77#endif
78
1089e228
MH		 79#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
80static struct resource musb_resources[] = {
81 [0] = {
82 .start = 0xffc03800,
83 .end = 0xffc03cff,
84 .flags = IORESOURCE_MEM,
85 },
86 [1] = { /* general IRQ */
87 .start = IRQ_USB_INT0,
88 .end = IRQ_USB_INT0,
89 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 90 .name = "mc"
1089e228
MH		 91 },
92 [2] = { /* DMA IRQ */
93 .start = IRQ_USB_DMA,
94 .end = IRQ_USB_DMA,
95 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 96 .name = "dma"
1089e228
MH		 97 },
98};
99
50041acb
BW		 100static struct musb_hdrc_config musb_config = {
101 .multipoint = 0,
102 .dyn_fifo = 0,
103 .soft_con = 1,
104 .dma = 1,
fea05dac
BW		 105 .num_eps = 8,
106 .dma_channels = 8,
50041acb 107 .gpio_vrsel = GPIO_PG13,
85eb0e4b
CC		 108 /* Some custom boards need to be active low, just set it to "0"
109 * if it is the case.
110 */
111 .gpio_vrsel_active = 1,
759a3f3f 112 .clkin = 24, /* musb CLKIN in MHZ */
50041acb
BW		 113};
114
1089e228
MH		 115static struct musb_hdrc_platform_data musb_plat = {
116#if defined(CONFIG_USB_MUSB_OTG)
117 .mode = MUSB_OTG,
118#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
119 .mode = MUSB_HOST,
120#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
121 .mode = MUSB_PERIPHERAL,
122#endif
50041acb 123 .config = &musb_config,
1089e228
MH		 124};
125
126static u64 musb_dmamask = ~(u32)0;
127
128static struct platform_device musb_device = {
9cb0308e 129 .name = "musb-blackfin",
1089e228
MH		 130 .id = 0,
131 .dev = {
132 .dma_mask = &musb_dmamask,
133 .coherent_dma_mask = 0xffffffff,
134 .platform_data = &musb_plat,
135 },
136 .num_resources = ARRAY_SIZE(musb_resources),
137 .resource = musb_resources,
138};
139#endif
140
141#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
142
143static struct resource bf52x_t350mcqb_resources[] = {
144 {
145 .start = IRQ_PPI_ERROR,
146 .end = IRQ_PPI_ERROR,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151static struct platform_device bf52x_t350mcqb_device = {
152 .name = "bfin-t350mcqb",
153 .id = -1,
154 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
155 .resource = bf52x_t350mcqb_resources,
156};
157#endif
158
6924dfb0
MH		 159#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
160#include <asm/bfin-lq035q1.h>
161
162static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
163 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
d94a1aa4 164 .ppi_mode = USE_RGB565_8_BIT_PPI,
6924dfb0
MH		 165};
166
167static struct resource bfin_lq035q1_resources[] = {
168 {
169 .start = IRQ_PPI_ERROR,
170 .end = IRQ_PPI_ERROR,
171 .flags = IORESOURCE_IRQ,
172 },
173};
174
175static struct platform_device bfin_lq035q1_device = {
176 .name = "bfin-lq035q1",
177 .id = -1,
178 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
179 .resource = bfin_lq035q1_resources,
180 .dev = {
181 .platform_data = &bfin_lq035q1_data,
182 },
183};
184#endif
185
d7e5dd41
MH		 186#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
187static struct mtd_partition ezkit_partitions[] = {
188 {
aa582977 189 .name = "bootloader(nor)",
d7e5dd41
MH		 190 .size = 0x40000,
191 .offset = 0,
192 }, {
aa582977 193 .name = "linux kernel(nor)",
d7e5dd41
MH		 194 .size = 0x1C0000,
195 .offset = MTDPART_OFS_APPEND,
196 }, {
aa582977 197 .name = "file system(nor)",
d7e5dd41
MH		 198 .size = MTDPART_SIZ_FULL,
199 .offset = MTDPART_OFS_APPEND,
200 }
201};
202
203static struct physmap_flash_data ezkit_flash_data = {
204 .width = 2,
205 .parts = ezkit_partitions,
206 .nr_parts = ARRAY_SIZE(ezkit_partitions),
207};
208
209static struct resource ezkit_flash_resource = {
210 .start = 0x20000000,
211 .end = 0x203fffff,
212 .flags = IORESOURCE_MEM,
213};
214
215static struct platform_device ezkit_flash_device = {
216 .name = "physmap-flash",
217 .id = 0,
218 .dev = {
219 .platform_data = &ezkit_flash_data,
220 },
221 .num_resources = 1,
222 .resource = &ezkit_flash_resource,
223};
224#endif
225
64307f7d
MH		 226#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
227static struct mtd_partition partition_info[] = {
228 {
5cc1c567 229 .name = "bootloader(nand)",
64307f7d 230 .offset = 0,
5cc1c567
MF		 231 .size = 0x40000,
232 }, {
233 .name = "linux kernel(nand)",
234 .offset = MTDPART_OFS_APPEND,
f4585a08 235 .size = 4 * 1024 * 1024,
64307f7d
MH		 236 },
237 {
aa582977 238 .name = "file system(nand)",
edf05641
MF		 239 .offset = MTDPART_OFS_APPEND,
240 .size = MTDPART_SIZ_FULL,
64307f7d
MH		 241 },
242};
243
244static struct bf5xx_nand_platform bf5xx_nand_platform = {
64307f7d
MH		 245 .data_width = NFC_NWIDTH_8,
246 .partitions = partition_info,
247 .nr_partitions = ARRAY_SIZE(partition_info),
248 .rd_dly = 3,
249 .wr_dly = 3,
250};
251
252static struct resource bf5xx_nand_resources[] = {
253 {
254 .start = NFC_CTL,
255 .end = NFC_DATA_RD + 2,
256 .flags = IORESOURCE_MEM,
257 },
258 {
259 .start = CH_NFC,
260 .end = CH_NFC,
261 .flags = IORESOURCE_IRQ,
262 },
263};
264
265static struct platform_device bf5xx_nand_device = {
266 .name = "bf5xx-nand",
267 .id = 0,
268 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
269 .resource = bf5xx_nand_resources,
270 .dev = {
271 .platform_data = &bf5xx_nand_platform,
272 },
273};
274#endif
275
59003145
MH		 276#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
277static struct resource bfin_pcmcia_cf_resources[] = {
278 {
279 .start = 0x20310000, /* IO PORT */
280 .end = 0x20312000,
281 .flags = IORESOURCE_MEM,
282 }, {
283 .start = 0x20311000, /* Attribute Memory */
284 .end = 0x20311FFF,
285 .flags = IORESOURCE_MEM,
286 }, {
287 .start = IRQ_PF4,
288 .end = IRQ_PF4,
289 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
290 }, {
291 .start = 6, /* Card Detect PF6 */
292 .end = 6,
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297static struct platform_device bfin_pcmcia_cf_device = {
298 .name = "bfin_cf_pcmcia",
299 .id = -1,
300 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
301 .resource = bfin_pcmcia_cf_resources,
302};
303#endif
304
305#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
306static struct platform_device rtc_device = {
307 .name = "rtc-bfin",
308 .id = -1,
309};
310#endif
311
312#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 313#include <linux/smc91x.h>
314
315static struct smc91x_platdata smc91x_info = {
316 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
317 .leda = RPC_LED_100_10,
318 .ledb = RPC_LED_TX_RX,
319};
320
59003145
MH		 321static struct resource smc91x_resources[] = {
322 {
323 .name = "smc91x-regs",
324 .start = 0x20300300,
325 .end = 0x20300300 + 16,
326 .flags = IORESOURCE_MEM,
327 }, {
328
329 .start = IRQ_PF7,
330 .end = IRQ_PF7,
331 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
332 },
333};
334static struct platform_device smc91x_device = {
335 .name = "smc91x",
336 .id = 0,
337 .num_resources = ARRAY_SIZE(smc91x_resources),
338 .resource = smc91x_resources,
61f09b5a
MH		 339 .dev = {
340 .platform_data = &smc91x_info,
341 },
59003145
MH		 342};
343#endif
344
345#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
346static struct resource dm9000_resources[] = {
347 [0] = {
348 .start = 0x203FB800,
da3854fc 349 .end = 0x203FB800 + 1,
59003145
MH		 350 .flags = IORESOURCE_MEM,
351 },
352 [1] = {
da3854fc
LP		 353 .start = 0x203FB800 + 4,
354 .end = 0x203FB800 + 5,
355 .flags = IORESOURCE_MEM,
356 },
357 [2] = {
59003145
MH		 358 .start = IRQ_PF9,
359 .end = IRQ_PF9,
360 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
361 },
362};
363
364static struct platform_device dm9000_device = {
365 .name = "dm9000",
366 .id = -1,
367 .num_resources = ARRAY_SIZE(dm9000_resources),
368 .resource = dm9000_resources,
369};
370#endif
371
59003145 372#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
02460d08
SZ		 373#include <linux/bfin_mac.h>
374static const unsigned short bfin_mac_peripherals[] = P_RMII0;
375
376static struct bfin_phydev_platform_data bfin_phydev_data[] = {
377 {
378 .addr = 1,
379 .irq = IRQ_MAC_PHYINT,
380 },
381};
382
383static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
384 .phydev_number = 1,
385 .phydev_data = bfin_phydev_data,
386 .phy_mode = PHY_INTERFACE_MODE_RMII,
387 .mac_peripherals = bfin_mac_peripherals,
388};
389
65319628
GY		 390static struct platform_device bfin_mii_bus = {
391 .name = "bfin_mii_bus",
02460d08
SZ		 392 .dev = {
393 .platform_data = &bfin_mii_bus_data,
394 }
65319628
GY		 395};
396
59003145
MH		 397static struct platform_device bfin_mac_device = {
398 .name = "bfin_mac",
02460d08
SZ		 399 .dev = {
400 .platform_data = &bfin_mii_bus,
401 }
59003145
MH		 402};
403#endif
404
405#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
406static struct resource net2272_bfin_resources[] = {
407 {
408 .start = 0x20300000,
409 .end = 0x20300000 + 0x100,
410 .flags = IORESOURCE_MEM,
9be8631b
MF		 411 }, {
412 .start = 1,
413 .flags = IORESOURCE_BUS,
59003145
MH		 414 }, {
415 .start = IRQ_PF7,
416 .end = IRQ_PF7,
417 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
418 },
419};
420
421static struct platform_device net2272_bfin_device = {
422 .name = "net2272",
423 .id = -1,
424 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
425 .resource = net2272_bfin_resources,
426};
427#endif
428
59003145
MH		 429#if defined(CONFIG_MTD_M25P80) \
430 || defined(CONFIG_MTD_M25P80_MODULE)
431static struct mtd_partition bfin_spi_flash_partitions[] = {
432 {
aa582977 433 .name = "bootloader(spi)",
ac76d889 434 .size = 0x00040000,
59003145
MH		 435 .offset = 0,
436 .mask_flags = MTD_CAP_ROM
437 }, {
aa582977 438 .name = "linux kernel(spi)",
edf05641
MF		 439 .size = MTDPART_SIZ_FULL,
440 .offset = MTDPART_OFS_APPEND,
59003145
MH		 441 }
442};
443
444static struct flash_platform_data bfin_spi_flash_data = {
445 .name = "m25p80",
446 .parts = bfin_spi_flash_partitions,
447 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 448 .type = "m25p16",
59003145
MH		 449};
450
451/* SPI flash chip (m25p64) */
452static struct bfin5xx_spi_chip spi_flash_chip_info = {
453 .enable_dma = 0, /* use dma transfer with this chip*/
59003145
MH		 454};
455#endif
456
ffdf3ec8
YL		 457#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
458static struct bfin5xx_spi_chip mmc_spi_chip_info = {
459 .enable_dma = 0,
ffdf3ec8
YL		 460};
461#endif
462
59003145 463#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
59003145
MH		 464static const struct ad7877_platform_data bfin_ad7877_ts_info = {
465 .model = 7877,
466 .vref_delay_usecs = 50, /* internal, no capacitor */
467 .x_plate_ohms = 419,
468 .y_plate_ohms = 486,
469 .pressure_max = 1000,
470 .pressure_min = 0,
471 .stopacq_polarity = 1,
472 .first_conversion_delay = 3,
473 .acquisition_time = 1,
474 .averaging = 1,
475 .pen_down_acc_interval = 1,
476};
477#endif
478
5105432a
MH		 479#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
480#include <linux/spi/ad7879.h>
481static const struct ad7879_platform_data bfin_ad7879_ts_info = {
482 .model = 7879, /* Model = AD7879 */
483 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
484 .pressure_max = 10000,
485 .pressure_min = 0,
486 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
487 .acquisition_time = 1, /* 4us acquisition time per sample */
488 .median = 2, /* do 8 measurements */
489 .averaging = 1, /* take the average of 4 middle samples */
490 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423 491 .gpio_export = 0, /* Export GPIO to gpiolib */
5105432a
MH		 492};
493#endif
494
6f53dbbb
SJ		 495#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
496 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
497
498static const u16 bfin_snd_pin[][7] = {
499 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
500 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0, 0},
501 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
502 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_TFS, 0},
503};
504
505static struct bfin_snd_platform_data bfin_snd_data[] = {
506 {
507 .pin_req = &bfin_snd_pin[0][0],
508 },
509 {
510 .pin_req = &bfin_snd_pin[1][0],
511 },
512};
513
514#define BFIN_SND_RES(x) \
515 [x] = { \
516 { \
517 .start = SPORT##x##_TCR1, \
518 .end = SPORT##x##_TCR1, \
519 .flags = IORESOURCE_MEM \
520 }, \
521 { \
522 .start = CH_SPORT##x##_RX, \
523 .end = CH_SPORT##x##_RX, \
524 .flags = IORESOURCE_DMA, \
525 }, \
526 { \
527 .start = CH_SPORT##x##_TX, \
528 .end = CH_SPORT##x##_TX, \
529 .flags = IORESOURCE_DMA, \
530 }, \
531 { \
532 .start = IRQ_SPORT##x##_ERROR, \
533 .end = IRQ_SPORT##x##_ERROR, \
534 .flags = IORESOURCE_IRQ, \
535 } \
536 }
537
538static struct resource bfin_snd_resources[][4] = {
539 BFIN_SND_RES(0),
540 BFIN_SND_RES(1),
541};
542
543static struct platform_device bfin_pcm = {
544 .name = "bfin-pcm-audio",
545 .id = -1,
546};
547#endif
548
336746ed
BS		 549#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
550static struct platform_device bfin_i2s = {
551 .name = "bfin-i2s",
552 .id = CONFIG_SND_BF5XX_SPORT_NUM,
6f53dbbb
SJ		 553 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
554 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
555 .dev = {
556 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
557 },
336746ed
BS		 558};
559#endif
560
561#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
562static struct platform_device bfin_tdm = {
563 .name = "bfin-tdm",
564 .id = CONFIG_SND_BF5XX_SPORT_NUM,
6f53dbbb
SJ		 565 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
566 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
567 .dev = {
568 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
569 },
336746ed
BS		 570};
571#endif
572
59003145
MH		 573static struct spi_board_info bfin_spi_board_info[] __initdata = {
574#if defined(CONFIG_MTD_M25P80) \
575 || defined(CONFIG_MTD_M25P80_MODULE)
576 {
577 /* the modalias must be the same as spi device driver name */
578 .modalias = "m25p80", /* Name of spi_driver for this device */
579 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
580 .bus_num = 0, /* Framework bus number */
581 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
582 .platform_data = &bfin_spi_flash_data,
583 .controller_data = &spi_flash_chip_info,
584 .mode = SPI_MODE_3,
585 },
586#endif
587
7ba80063
BS		 588#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
589 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
59003145 590 {
7ba80063 591 .modalias = "ad183x",
59003145
MH		 592 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
593 .bus_num = 0,
7ba80063 594 .chip_select = 4,
6f53dbbb 595 .platform_data = "ad1836",
6f53dbbb 596 .mode = SPI_MODE_3,
59003145
MH		 597 },
598#endif
ffdf3ec8
YL		 599#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
600 {
601 .modalias = "mmc_spi",
602 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
603 .bus_num = 0,
604 .chip_select = 3,
605 .controller_data = &mmc_spi_chip_info,
606 .mode = SPI_MODE_0,
607 },
608#endif
609
59003145
MH		 610#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
611 {
612 .modalias = "ad7877",
613 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 614 .irq = IRQ_PF8,
59003145 615 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 616 .bus_num = 0,
2eb74ae2 617 .chip_select = 2,
59003145
MH		 618 },
619#endif
5105432a
MH		 620#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
621 {
622 .modalias = "ad7879",
623 .platform_data = &bfin_ad7879_ts_info,
624 .irq = IRQ_PF8,
625 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
626 .bus_num = 0,
627 .chip_select = 3,
5105432a
MH		 628 .mode = SPI_CPHA | SPI_CPOL,
629 },
630#endif
6e668936
MH		 631#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
632 {
633 .modalias = "spidev",
634 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
635 .bus_num = 0,
636 .chip_select = 1,
6e668936
MH		 637 },
638#endif
6924dfb0
MH		 639#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
640 {
641 .modalias = "bfin-lq035q1-spi",
642 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
643 .bus_num = 0,
644 .chip_select = 7,
6924dfb0
MH		 645 .mode = SPI_CPHA | SPI_CPOL,
646 },
647#endif
59003145
MH		 648};
649
5bda2723 650#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
59003145
MH		 651/* SPI controller data */
652static struct bfin5xx_spi_master bfin_spi0_info = {
653 .num_chipselect = 8,
654 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 655 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 656};
657
658/* SPI (0) */
659static struct resource bfin_spi0_resource[] = {
660 [0] = {
661 .start = SPI0_REGBASE,
662 .end = SPI0_REGBASE + 0xFF,
663 .flags = IORESOURCE_MEM,
664 },
665 [1] = {
666 .start = CH_SPI,
667 .end = CH_SPI,
53122693
YL		 668 .flags = IORESOURCE_DMA,
669 },
670 [2] = {
671 .start = IRQ_SPI,
672 .end = IRQ_SPI,
59003145
MH		 673 .flags = IORESOURCE_IRQ,
674 },
675};
676
677static struct platform_device bfin_spi0_device = {
678 .name = "bfin-spi",
679 .id = 0, /* Bus number */
680 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
681 .resource = bfin_spi0_resource,
682 .dev = {
683 .platform_data = &bfin_spi0_info, /* Passed to driver */
684 },
685};
686#endif /* spi master and devices */
687
59003145 688#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
59003145 689#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 690static struct resource bfin_uart0_resources[] = {
59003145 691 {
6bd1fbea
SZ		 692 .start = UART0_THR,
693 .end = UART0_GCTL+2,
59003145
MH		 694 .flags = IORESOURCE_MEM,
695 },
6bd1fbea
SZ		 696 {
697 .start = IRQ_UART0_RX,
698 .end = IRQ_UART0_RX+1,
699 .flags = IORESOURCE_IRQ,
700 },
701 {
702 .start = IRQ_UART0_ERROR,
703 .end = IRQ_UART0_ERROR,
704 .flags = IORESOURCE_IRQ,
705 },
706 {
707 .start = CH_UART0_TX,
708 .end = CH_UART0_TX,
709 .flags = IORESOURCE_DMA,
710 },
711 {
712 .start = CH_UART0_RX,
713 .end = CH_UART0_RX,
714 .flags = IORESOURCE_DMA,
715 },
716};
717
a8b19886 718static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea
SZ		 719 P_UART0_TX, P_UART0_RX, 0
720};
721
722static struct platform_device bfin_uart0_device = {
723 .name = "bfin-uart",
724 .id = 0,
725 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
726 .resource = bfin_uart0_resources,
727 .dev = {
728 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
729 },
730};
59003145
MH		 731#endif
732#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 733static struct resource bfin_uart1_resources[] = {
59003145 734 {
6bd1fbea
SZ		 735 .start = UART1_THR,
736 .end = UART1_GCTL+2,
59003145
MH		 737 .flags = IORESOURCE_MEM,
738 },
6bd1fbea
SZ		 739 {
740 .start = IRQ_UART1_RX,
741 .end = IRQ_UART1_RX+1,
742 .flags = IORESOURCE_IRQ,
743 },
744 {
745 .start = IRQ_UART1_ERROR,
746 .end = IRQ_UART1_ERROR,
747 .flags = IORESOURCE_IRQ,
748 },
749 {
750 .start = CH_UART1_TX,
751 .end = CH_UART1_TX,
752 .flags = IORESOURCE_DMA,
753 },
754 {
755 .start = CH_UART1_RX,
756 .end = CH_UART1_RX,
757 .flags = IORESOURCE_DMA,
758 },
759#ifdef CONFIG_BFIN_UART1_CTSRTS
760 { /* CTS pin */
761 .start = GPIO_PF9,
762 .end = GPIO_PF9,
763 .flags = IORESOURCE_IO,
764 },
765 { /* RTS pin */
766 .start = GPIO_PF10,
767 .end = GPIO_PF10,
768 .flags = IORESOURCE_IO,
769 },
59003145
MH		 770#endif
771};
772
a8b19886 773static unsigned short bfin_uart1_peripherals[] = {
6bd1fbea
SZ		 774 P_UART1_TX, P_UART1_RX, 0
775};
776
777static struct platform_device bfin_uart1_device = {
59003145
MH		 778 .name = "bfin-uart",
779 .id = 1,
6bd1fbea
SZ		 780 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
781 .resource = bfin_uart1_resources,
782 .dev = {
783 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
784 },
59003145
MH		 785};
786#endif
6bd1fbea 787#endif
59003145 788
5be36d22 789#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 790#ifdef CONFIG_BFIN_SIR0
42bd8bcb 791static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 792 {
793 .start = 0xFFC00400,
794 .end = 0xFFC004FF,
795 .flags = IORESOURCE_MEM,
796 },
42bd8bcb
GY		 797 {
798 .start = IRQ_UART0_RX,
799 .end = IRQ_UART0_RX+1,
800 .flags = IORESOURCE_IRQ,
801 },
802 {
803 .start = CH_UART0_RX,
804 .end = CH_UART0_RX+1,
805 .flags = IORESOURCE_DMA,
806 },
807};
808
809static struct platform_device bfin_sir0_device = {
810 .name = "bfin_sir",
811 .id = 0,
812 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
813 .resource = bfin_sir0_resources,
814};
5be36d22
GY		 815#endif
816#ifdef CONFIG_BFIN_SIR1
42bd8bcb 817static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 818 {
819 .start = 0xFFC02000,
820 .end = 0xFFC020FF,
821 .flags = IORESOURCE_MEM,
822 },
42bd8bcb
GY		 823 {
824 .start = IRQ_UART1_RX,
825 .end = IRQ_UART1_RX+1,
826 .flags = IORESOURCE_IRQ,
827 },
828 {
829 .start = CH_UART1_RX,
830 .end = CH_UART1_RX+1,
831 .flags = IORESOURCE_DMA,
832 },
5be36d22
GY		 833};
834
42bd8bcb 835static struct platform_device bfin_sir1_device = {
5be36d22 836 .name = "bfin_sir",
42bd8bcb
GY		 837 .id = 1,
838 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
839 .resource = bfin_sir1_resources,
5be36d22
GY		 840};
841#endif
42bd8bcb 842#endif
5be36d22 843
59003145
MH		 844#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
845static struct resource bfin_twi0_resource[] = {
846 [0] = {
847 .start = TWI0_REGBASE,
848 .end = TWI0_REGBASE,
849 .flags = IORESOURCE_MEM,
850 },
851 [1] = {
852 .start = IRQ_TWI,
853 .end = IRQ_TWI,
854 .flags = IORESOURCE_IRQ,
855 },
856};
857
858static struct platform_device i2c_bfin_twi_device = {
859 .name = "i2c-bfin-twi",
860 .id = 0,
861 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
862 .resource = bfin_twi0_resource,
863};
864#endif
865
6924dfb0
MH		 866#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
867#include <linux/mfd/adp5520.h>
868
869 /*
870 * ADP5520/5501 LEDs Data
871 */
872
873static struct led_info adp5520_leds[] = {
874 {
875 .name = "adp5520-led1",
876 .default_trigger = "none",
877 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
878 },
879};
880
881static struct adp5520_leds_platform_data adp5520_leds_data = {
882 .num_leds = ARRAY_SIZE(adp5520_leds),
883 .leds = adp5520_leds,
884 .fade_in = ADP5520_FADE_T_600ms,
885 .fade_out = ADP5520_FADE_T_600ms,
886 .led_on_time = ADP5520_LED_ONT_600ms,
887};
888
889 /*
890 * ADP5520 Keypad Data
891 */
892
893static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
894 [ADP5520_KEY(3, 3)] = KEY_1,
895 [ADP5520_KEY(2, 3)] = KEY_2,
896 [ADP5520_KEY(1, 3)] = KEY_3,
897 [ADP5520_KEY(0, 3)] = KEY_UP,
898 [ADP5520_KEY(3, 2)] = KEY_4,
899 [ADP5520_KEY(2, 2)] = KEY_5,
900 [ADP5520_KEY(1, 2)] = KEY_6,
901 [ADP5520_KEY(0, 2)] = KEY_DOWN,
902 [ADP5520_KEY(3, 1)] = KEY_7,
903 [ADP5520_KEY(2, 1)] = KEY_8,
904 [ADP5520_KEY(1, 1)] = KEY_9,
905 [ADP5520_KEY(0, 1)] = KEY_DOT,
906 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
907 [ADP5520_KEY(2, 0)] = KEY_0,
908 [ADP5520_KEY(1, 0)] = KEY_HELP,
909 [ADP5520_KEY(0, 0)] = KEY_ENTER,
910};
911
912static struct adp5520_keys_platform_data adp5520_keys_data = {
913 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
914 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
915 .keymap = adp5520_keymap,
916 .keymapsize = ARRAY_SIZE(adp5520_keymap),
917 .repeat = 0,
918};
919
920 /*
eef35c2d 921 * ADP5520/5501 Multifunction Device Init Data
6924dfb0
MH		 922 */
923
924static struct adp5520_platform_data adp5520_pdev_data = {
925 .leds = &adp5520_leds_data,
926 .keys = &adp5520_keys_data,
927};
928
929#endif
930
72268689 931static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
ebd58333 932#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
72268689
BW		 933 {
934 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW		 935 },
936#endif
204844eb 937#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
72268689
BW		 938 {
939 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW		 940 .irq = IRQ_PF8,
941 },
942#endif
50c4c086
MH		 943#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
944 {
945 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
946 },
947#endif
6924dfb0
MH		 948#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
949 {
950 I2C_BOARD_INFO("ad7879", 0x2C),
951 .irq = IRQ_PF8,
952 .platform_data = (void *)&bfin_ad7879_ts_info,
953 },
954#endif
955#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
956 {
957 I2C_BOARD_INFO("pmic-adp5520", 0x32),
958 .irq = IRQ_PF9,
959 .platform_data = (void *)&adp5520_pdev_data,
960 },
961#endif
29bb3bc0
CC		 962#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
963 {
964 I2C_BOARD_INFO("ssm2602", 0x1b),
965 },
966#endif
39d3c1ca 967#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
968 {
969 I2C_BOARD_INFO("ad5252", 0x2f),
970 },
971#endif
624fab3b
SZ		 972#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
973 {
974 I2C_BOARD_INFO("adau1373", 0x1A),
975 },
976#endif
72268689 977};
72268689 978
59003145 979#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 980#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
981static struct resource bfin_sport0_uart_resources[] = {
982 {
983 .start = SPORT0_TCR1,
984 .end = SPORT0_MRCS3+4,
985 .flags = IORESOURCE_MEM,
986 },
987 {
988 .start = IRQ_SPORT0_RX,
989 .end = IRQ_SPORT0_RX+1,
990 .flags = IORESOURCE_IRQ,
991 },
992 {
993 .start = IRQ_SPORT0_ERROR,
994 .end = IRQ_SPORT0_ERROR,
995 .flags = IORESOURCE_IRQ,
996 },
997};
998
a8b19886 999static unsigned short bfin_sport0_peripherals[] = {
df5de261 1000 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
e54b6730 1001 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
df5de261
SZ		 1002};
1003
59003145
MH		 1004static struct platform_device bfin_sport0_uart_device = {
1005 .name = "bfin-sport-uart",
1006 .id = 0,
df5de261
SZ		 1007 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1008 .resource = bfin_sport0_uart_resources,
1009 .dev = {
1010 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1011 },
1012};
1013#endif
1014#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1015static struct resource bfin_sport1_uart_resources[] = {
1016 {
1017 .start = SPORT1_TCR1,
1018 .end = SPORT1_MRCS3+4,
1019 .flags = IORESOURCE_MEM,
1020 },
1021 {
1022 .start = IRQ_SPORT1_RX,
1023 .end = IRQ_SPORT1_RX+1,
1024 .flags = IORESOURCE_IRQ,
1025 },
1026 {
1027 .start = IRQ_SPORT1_ERROR,
1028 .end = IRQ_SPORT1_ERROR,
1029 .flags = IORESOURCE_IRQ,
1030 },
1031};
1032
a8b19886 1033static unsigned short bfin_sport1_peripherals[] = {
df5de261 1034 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
e54b6730 1035 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
59003145
MH		 1036};
1037
1038static struct platform_device bfin_sport1_uart_device = {
1039 .name = "bfin-sport-uart",
1040 .id = 1,
df5de261
SZ		 1041 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1042 .resource = bfin_sport1_uart_resources,
1043 .dev = {
1044 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1045 },
59003145
MH		 1046};
1047#endif
df5de261 1048#endif
59003145 1049
1089e228 1050#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1089e228
MH		 1051#include <linux/gpio_keys.h>
1052
1053static struct gpio_keys_button bfin_gpio_keys_table[] = {
1054 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1055 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1056};
1057
1058static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1059 .buttons = bfin_gpio_keys_table,
1060 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1061};
1062
1063static struct platform_device bfin_device_gpiokeys = {
1064 .name = "gpio-keys",
1065 .dev = {
1066 .platform_data = &bfin_gpio_keys_data,
1067 },
1068};
1069#endif
1070
adfc0467 1071#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1072#include <asm/bfin_rotary.h>
1073
1074static struct bfin_rotary_platform_data bfin_rotary_data = {
1075 /*.rotary_up_key = KEY_UP,*/
1076 /*.rotary_down_key = KEY_DOWN,*/
1077 .rotary_rel_code = REL_WHEEL,
1078 .rotary_button_key = KEY_ENTER,
1079 .debounce = 10, /* 0..17 */
1080 .mode = ROT_QUAD_ENC | ROT_DEBE,
1081};
1082
1083static struct resource bfin_rotary_resources[] = {
1084 {
1085 .start = IRQ_CNT,
1086 .end = IRQ_CNT,
1087 .flags = IORESOURCE_IRQ,
1088 },
1089};
1090
1091static struct platform_device bfin_rotary_device = {
1092 .name = "bfin-rotary",
1093 .id = -1,
1094 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1095 .resource = bfin_rotary_resources,
1096 .dev = {
1097 .platform_data = &bfin_rotary_data,
1098 },
1099};
1100#endif
1101
14b03204
MH		 1102static const unsigned int cclk_vlev_datasheet[] =
1103{
1104 VRPAIR(VLEV_100, 400000000),
1105 VRPAIR(VLEV_105, 426000000),
1106 VRPAIR(VLEV_110, 500000000),
1107 VRPAIR(VLEV_115, 533000000),
1108 VRPAIR(VLEV_120, 600000000),
1109};
1110
1111static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1112 .tuple_tab = cclk_vlev_datasheet,
1113 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1114 .vr_settling_time = 25 /* us */,
1115};
1116
1117static struct platform_device bfin_dpmc = {
1118 .name = "bfin dpmc",
1119 .dev = {
1120 .platform_data = &bfin_dmpc_vreg_data,
1121 },
1122};
1123
59003145 1124static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1125
1126 &bfin_dpmc,
1127
64307f7d
MH		 1128#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1129 &bf5xx_nand_device,
1130#endif
1131
59003145
MH		 1132#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1133 &bfin_pcmcia_cf_device,
1134#endif
1135
1136#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1137 &rtc_device,
1138#endif
1139
3f375690
MH		 1140#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1141 &bfin_isp1760_device,
1142#endif
1143
1089e228
MH		 1144#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1145 &musb_device,
1146#endif
1147
59003145
MH		 1148#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1149 &smc91x_device,
1150#endif
1151
1152#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1153 &dm9000_device,
1154#endif
1155
1156#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1157 &bfin_mii_bus,
59003145
MH		 1158 &bfin_mac_device,
1159#endif
1160
1161#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1162 &net2272_bfin_device,
1163#endif
1164
1165#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1166 &bfin_spi0_device,
1167#endif
1168
1089e228
MH		 1169#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1170 &bf52x_t350mcqb_device,
1171#endif
1172
6924dfb0
MH		 1173#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1174 &bfin_lq035q1_device,
1175#endif
1176
59003145 1177#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1178#ifdef CONFIG_SERIAL_BFIN_UART0
1179 &bfin_uart0_device,
1180#endif
1181#ifdef CONFIG_SERIAL_BFIN_UART1
1182 &bfin_uart1_device,
1183#endif
59003145
MH		 1184#endif
1185
5be36d22 1186#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1187#ifdef CONFIG_BFIN_SIR0
1188 &bfin_sir0_device,
1189#endif
1190#ifdef CONFIG_BFIN_SIR1
1191 &bfin_sir1_device,
1192#endif
5be36d22
GY		 1193#endif
1194
59003145
MH		 1195#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1196 &i2c_bfin_twi_device,
1197#endif
1198
1199#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 1200#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
59003145 1201 &bfin_sport0_uart_device,
df5de261
SZ		 1202#endif
1203#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
59003145
MH		 1204 &bfin_sport1_uart_device,
1205#endif
df5de261 1206#endif
59003145 1207
1089e228
MH		 1208#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1209 &bfin_device_gpiokeys,
1210#endif
cad2ab65 1211
adfc0467 1212#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1213 &bfin_rotary_device,
1214#endif
1215
d7e5dd41
MH		 1216#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1217 &ezkit_flash_device,
1218#endif
336746ed 1219
6f53dbbb
SJ		 1220#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
1221 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1222 &bfin_pcm,
1223#endif
1224
336746ed
BS		 1225#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1226 &bfin_i2s,
1227#endif
1228
1229#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1230 &bfin_tdm,
1231#endif
59003145
MH		 1232};
1233
7f6678c5 1234static int __init ezkit_init(void)
59003145 1235{
b85d858b 1236 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW		 1237 i2c_register_board_info(0, bfin_i2c_board_info,
1238 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1239 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1240 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH		 1241 return 0;
1242}
1243
7f6678c5 1244arch_initcall(ezkit_init);
59003145 1245
c13ce9fd
SZ		 1246static struct platform_device *ezkit_early_devices[] __initdata = {
1247#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1248#ifdef CONFIG_SERIAL_BFIN_UART0
1249 &bfin_uart0_device,
1250#endif
1251#ifdef CONFIG_SERIAL_BFIN_UART1
1252 &bfin_uart1_device,
1253#endif
1254#endif
1255
1256#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1257#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1258 &bfin_sport0_uart_device,
1259#endif
1260#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1261 &bfin_sport1_uart_device,
1262#endif
1263#endif
1264};
1265
1266void __init native_machine_early_platform_add_devices(void)
1267{
1268 printk(KERN_INFO "register early platform devices\n");
1269 early_platform_add_devices(ezkit_early_devices,
1270 ARRAY_SIZE(ezkit_early_devices));
1271}
1272
59003145
MH		 1273void native_machine_restart(char *cmd)
1274{
1275 /* workaround reboot hang when booting from SPI */
1276 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1277 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1278}
137b1529 1279
9862cc52 1280void bfin_get_ether_addr(char *addr)
137b1529 1281{
181afa94
MF		 1282 /* the MAC is stored in OTP memory page 0xDF */
1283 u32 ret;
1284 u64 otp_mac;
1285 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1286
1287 ret = otp_read(0xDF, 0x00, &otp_mac);
1288 if (!(ret & 0x1)) {
1289 char *otp_mac_p = (char *)&otp_mac;
1290 for (ret = 0; ret < 6; ++ret)
1291 addr[ret] = otp_mac_p[5 - ret];
1292 }
137b1529 1293}
9862cc52 1294EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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