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blackfin: Add export.h to files using EXPORT_SYMBOL/THIS_MODULE
[deliverable/linux.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH		 7 */
8
9#include <linux/device.h>
8dc7a9c8 10#include <linux/export.h>
59003145
MH		 11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
d7e5dd41 14#include <linux/mtd/physmap.h>
59003145
MH		 15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
72268689 17#include <linux/i2c.h>
59003145
MH		 18#include <linux/irq.h>
19#include <linux/interrupt.h>
1089e228 20#include <linux/usb/musb.h>
6924dfb0
MH		 21#include <linux/leds.h>
22#include <linux/input.h>
59003145
MH		 23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
64307f7d 26#include <asm/nand.h>
5d448dd5 27#include <asm/portmux.h>
14b03204 28#include <asm/dpmc.h>
59003145 29#include <linux/spi/ad7877.h>
6f53dbbb 30#include <asm/bfin_sport.h>
59003145
MH		 31
32/*
33 * Name the Board for the /proc/cpuinfo
34 */
6924dfb0
MH		 35#ifdef CONFIG_BFIN527_EZKIT_V2
36const char bfin_board_name[] = "ADI BF527-EZKIT V2";
37#else
fe85cad2 38const char bfin_board_name[] = "ADI BF527-EZKIT";
6924dfb0 39#endif
59003145
MH		 40
41/*
42 * Driver needs to know address, irq and flag pin.
43 */
44
59003145 45#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 46#include <linux/usb/isp1760.h>
47static struct resource bfin_isp1760_resources[] = {
59003145 48 [0] = {
3f375690
MH		 49 .start = 0x203C0000,
50 .end = 0x203C0000 + 0x000fffff,
59003145
MH		 51 .flags = IORESOURCE_MEM,
52 },
53 [1] = {
3f375690
MH		 54 .start = IRQ_PF7,
55 .end = IRQ_PF7,
59003145
MH		 56 .flags = IORESOURCE_IRQ,
57 },
58};
59
3f375690
MH		 60static struct isp1760_platform_data isp1760_priv = {
61 .is_isp1761 = 0,
3f375690
MH		 62 .bus_width_16 = 1,
63 .port1_otg = 0,
64 .analog_oc = 0,
65 .dack_polarity_high = 0,
66 .dreq_polarity_high = 0,
59003145
MH		 67};
68
3f375690 69static struct platform_device bfin_isp1760_device = {
c6feb768 70 .name = "isp1760",
3f375690
MH		 71 .id = 0,
72 .dev = {
73 .platform_data = &isp1760_priv,
74 },
75 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
76 .resource = bfin_isp1760_resources,
59003145 77};
59003145
MH		 78#endif
79
1089e228
MH		 80#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
81static struct resource musb_resources[] = {
82 [0] = {
83 .start = 0xffc03800,
84 .end = 0xffc03cff,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = { /* general IRQ */
88 .start = IRQ_USB_INT0,
89 .end = IRQ_USB_INT0,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 91 .name = "mc"
1089e228
MH		 92 },
93 [2] = { /* DMA IRQ */
94 .start = IRQ_USB_DMA,
95 .end = IRQ_USB_DMA,
96 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 97 .name = "dma"
1089e228
MH		 98 },
99};
100
50041acb
BW		 101static struct musb_hdrc_config musb_config = {
102 .multipoint = 0,
103 .dyn_fifo = 0,
104 .soft_con = 1,
105 .dma = 1,
fea05dac
BW		 106 .num_eps = 8,
107 .dma_channels = 8,
50041acb 108 .gpio_vrsel = GPIO_PG13,
85eb0e4b
CC		 109 /* Some custom boards need to be active low, just set it to "0"
110 * if it is the case.
111 */
112 .gpio_vrsel_active = 1,
759a3f3f 113 .clkin = 24, /* musb CLKIN in MHZ */
50041acb
BW		 114};
115
1089e228
MH		 116static struct musb_hdrc_platform_data musb_plat = {
117#if defined(CONFIG_USB_MUSB_OTG)
118 .mode = MUSB_OTG,
119#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
120 .mode = MUSB_HOST,
121#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
122 .mode = MUSB_PERIPHERAL,
123#endif
50041acb 124 .config = &musb_config,
1089e228
MH		 125};
126
127static u64 musb_dmamask = ~(u32)0;
128
129static struct platform_device musb_device = {
9cb0308e 130 .name = "musb-blackfin",
1089e228
MH		 131 .id = 0,
132 .dev = {
133 .dma_mask = &musb_dmamask,
134 .coherent_dma_mask = 0xffffffff,
135 .platform_data = &musb_plat,
136 },
137 .num_resources = ARRAY_SIZE(musb_resources),
138 .resource = musb_resources,
139};
140#endif
141
142#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
143
144static struct resource bf52x_t350mcqb_resources[] = {
145 {
146 .start = IRQ_PPI_ERROR,
147 .end = IRQ_PPI_ERROR,
148 .flags = IORESOURCE_IRQ,
149 },
150};
151
152static struct platform_device bf52x_t350mcqb_device = {
153 .name = "bfin-t350mcqb",
154 .id = -1,
155 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
156 .resource = bf52x_t350mcqb_resources,
157};
158#endif
159
6924dfb0
MH		 160#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
161#include <asm/bfin-lq035q1.h>
162
163static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
164 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
d94a1aa4 165 .ppi_mode = USE_RGB565_8_BIT_PPI,
6924dfb0
MH		 166};
167
168static struct resource bfin_lq035q1_resources[] = {
169 {
170 .start = IRQ_PPI_ERROR,
171 .end = IRQ_PPI_ERROR,
172 .flags = IORESOURCE_IRQ,
173 },
174};
175
176static struct platform_device bfin_lq035q1_device = {
177 .name = "bfin-lq035q1",
178 .id = -1,
179 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
180 .resource = bfin_lq035q1_resources,
181 .dev = {
182 .platform_data = &bfin_lq035q1_data,
183 },
184};
185#endif
186
d7e5dd41
MH		 187#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
188static struct mtd_partition ezkit_partitions[] = {
189 {
aa582977 190 .name = "bootloader(nor)",
d7e5dd41
MH		 191 .size = 0x40000,
192 .offset = 0,
193 }, {
aa582977 194 .name = "linux kernel(nor)",
d7e5dd41
MH		 195 .size = 0x1C0000,
196 .offset = MTDPART_OFS_APPEND,
197 }, {
aa582977 198 .name = "file system(nor)",
d7e5dd41
MH		 199 .size = MTDPART_SIZ_FULL,
200 .offset = MTDPART_OFS_APPEND,
201 }
202};
203
204static struct physmap_flash_data ezkit_flash_data = {
205 .width = 2,
206 .parts = ezkit_partitions,
207 .nr_parts = ARRAY_SIZE(ezkit_partitions),
208};
209
210static struct resource ezkit_flash_resource = {
211 .start = 0x20000000,
212 .end = 0x203fffff,
213 .flags = IORESOURCE_MEM,
214};
215
216static struct platform_device ezkit_flash_device = {
217 .name = "physmap-flash",
218 .id = 0,
219 .dev = {
220 .platform_data = &ezkit_flash_data,
221 },
222 .num_resources = 1,
223 .resource = &ezkit_flash_resource,
224};
225#endif
226
64307f7d
MH		 227#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
228static struct mtd_partition partition_info[] = {
229 {
5cc1c567 230 .name = "bootloader(nand)",
64307f7d 231 .offset = 0,
5cc1c567
MF		 232 .size = 0x40000,
233 }, {
234 .name = "linux kernel(nand)",
235 .offset = MTDPART_OFS_APPEND,
f4585a08 236 .size = 4 * 1024 * 1024,
64307f7d
MH		 237 },
238 {
aa582977 239 .name = "file system(nand)",
edf05641
MF		 240 .offset = MTDPART_OFS_APPEND,
241 .size = MTDPART_SIZ_FULL,
64307f7d
MH		 242 },
243};
244
245static struct bf5xx_nand_platform bf5xx_nand_platform = {
64307f7d
MH		 246 .data_width = NFC_NWIDTH_8,
247 .partitions = partition_info,
248 .nr_partitions = ARRAY_SIZE(partition_info),
249 .rd_dly = 3,
250 .wr_dly = 3,
251};
252
253static struct resource bf5xx_nand_resources[] = {
254 {
255 .start = NFC_CTL,
256 .end = NFC_DATA_RD + 2,
257 .flags = IORESOURCE_MEM,
258 },
259 {
260 .start = CH_NFC,
261 .end = CH_NFC,
262 .flags = IORESOURCE_IRQ,
263 },
264};
265
266static struct platform_device bf5xx_nand_device = {
267 .name = "bf5xx-nand",
268 .id = 0,
269 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
270 .resource = bf5xx_nand_resources,
271 .dev = {
272 .platform_data = &bf5xx_nand_platform,
273 },
274};
275#endif
276
59003145
MH		 277#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
278static struct resource bfin_pcmcia_cf_resources[] = {
279 {
280 .start = 0x20310000, /* IO PORT */
281 .end = 0x20312000,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = 0x20311000, /* Attribute Memory */
285 .end = 0x20311FFF,
286 .flags = IORESOURCE_MEM,
287 }, {
288 .start = IRQ_PF4,
289 .end = IRQ_PF4,
290 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
291 }, {
292 .start = 6, /* Card Detect PF6 */
293 .end = 6,
294 .flags = IORESOURCE_IRQ,
295 },
296};
297
298static struct platform_device bfin_pcmcia_cf_device = {
299 .name = "bfin_cf_pcmcia",
300 .id = -1,
301 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
302 .resource = bfin_pcmcia_cf_resources,
303};
304#endif
305
306#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
307static struct platform_device rtc_device = {
308 .name = "rtc-bfin",
309 .id = -1,
310};
311#endif
312
313#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 314#include <linux/smc91x.h>
315
316static struct smc91x_platdata smc91x_info = {
317 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
318 .leda = RPC_LED_100_10,
319 .ledb = RPC_LED_TX_RX,
320};
321
59003145
MH		 322static struct resource smc91x_resources[] = {
323 {
324 .name = "smc91x-regs",
325 .start = 0x20300300,
326 .end = 0x20300300 + 16,
327 .flags = IORESOURCE_MEM,
328 }, {
329
330 .start = IRQ_PF7,
331 .end = IRQ_PF7,
332 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
333 },
334};
335static struct platform_device smc91x_device = {
336 .name = "smc91x",
337 .id = 0,
338 .num_resources = ARRAY_SIZE(smc91x_resources),
339 .resource = smc91x_resources,
61f09b5a
MH		 340 .dev = {
341 .platform_data = &smc91x_info,
342 },
59003145
MH		 343};
344#endif
345
346#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
347static struct resource dm9000_resources[] = {
348 [0] = {
349 .start = 0x203FB800,
da3854fc 350 .end = 0x203FB800 + 1,
59003145
MH		 351 .flags = IORESOURCE_MEM,
352 },
353 [1] = {
da3854fc
LP		 354 .start = 0x203FB800 + 4,
355 .end = 0x203FB800 + 5,
356 .flags = IORESOURCE_MEM,
357 },
358 [2] = {
59003145
MH		 359 .start = IRQ_PF9,
360 .end = IRQ_PF9,
361 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
362 },
363};
364
365static struct platform_device dm9000_device = {
366 .name = "dm9000",
367 .id = -1,
368 .num_resources = ARRAY_SIZE(dm9000_resources),
369 .resource = dm9000_resources,
370};
371#endif
372
59003145 373#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
02460d08
SZ		 374#include <linux/bfin_mac.h>
375static const unsigned short bfin_mac_peripherals[] = P_RMII0;
376
377static struct bfin_phydev_platform_data bfin_phydev_data[] = {
378 {
379 .addr = 1,
380 .irq = IRQ_MAC_PHYINT,
381 },
382};
383
384static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
385 .phydev_number = 1,
386 .phydev_data = bfin_phydev_data,
387 .phy_mode = PHY_INTERFACE_MODE_RMII,
388 .mac_peripherals = bfin_mac_peripherals,
389};
390
65319628
GY		 391static struct platform_device bfin_mii_bus = {
392 .name = "bfin_mii_bus",
02460d08
SZ		 393 .dev = {
394 .platform_data = &bfin_mii_bus_data,
395 }
65319628
GY		 396};
397
59003145
MH		 398static struct platform_device bfin_mac_device = {
399 .name = "bfin_mac",
02460d08
SZ		 400 .dev = {
401 .platform_data = &bfin_mii_bus,
402 }
59003145
MH		 403};
404#endif
405
406#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
407static struct resource net2272_bfin_resources[] = {
408 {
409 .start = 0x20300000,
410 .end = 0x20300000 + 0x100,
411 .flags = IORESOURCE_MEM,
9be8631b
MF		 412 }, {
413 .start = 1,
414 .flags = IORESOURCE_BUS,
59003145
MH		 415 }, {
416 .start = IRQ_PF7,
417 .end = IRQ_PF7,
418 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
419 },
420};
421
422static struct platform_device net2272_bfin_device = {
423 .name = "net2272",
424 .id = -1,
425 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
426 .resource = net2272_bfin_resources,
427};
428#endif
429
59003145
MH		 430#if defined(CONFIG_MTD_M25P80) \
431 || defined(CONFIG_MTD_M25P80_MODULE)
432static struct mtd_partition bfin_spi_flash_partitions[] = {
433 {
aa582977 434 .name = "bootloader(spi)",
ac76d889 435 .size = 0x00040000,
59003145
MH		 436 .offset = 0,
437 .mask_flags = MTD_CAP_ROM
438 }, {
aa582977 439 .name = "linux kernel(spi)",
edf05641
MF		 440 .size = MTDPART_SIZ_FULL,
441 .offset = MTDPART_OFS_APPEND,
59003145
MH		 442 }
443};
444
445static struct flash_platform_data bfin_spi_flash_data = {
446 .name = "m25p80",
447 .parts = bfin_spi_flash_partitions,
448 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 449 .type = "m25p16",
59003145
MH		 450};
451
452/* SPI flash chip (m25p64) */
453static struct bfin5xx_spi_chip spi_flash_chip_info = {
454 .enable_dma = 0, /* use dma transfer with this chip*/
59003145
MH		 455};
456#endif
457
ffdf3ec8
YL		 458#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
459static struct bfin5xx_spi_chip mmc_spi_chip_info = {
460 .enable_dma = 0,
ffdf3ec8
YL		 461};
462#endif
463
59003145 464#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
59003145
MH		 465static const struct ad7877_platform_data bfin_ad7877_ts_info = {
466 .model = 7877,
467 .vref_delay_usecs = 50, /* internal, no capacitor */
468 .x_plate_ohms = 419,
469 .y_plate_ohms = 486,
470 .pressure_max = 1000,
471 .pressure_min = 0,
472 .stopacq_polarity = 1,
473 .first_conversion_delay = 3,
474 .acquisition_time = 1,
475 .averaging = 1,
476 .pen_down_acc_interval = 1,
477};
478#endif
479
5105432a
MH		 480#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
481#include <linux/spi/ad7879.h>
482static const struct ad7879_platform_data bfin_ad7879_ts_info = {
483 .model = 7879, /* Model = AD7879 */
484 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
485 .pressure_max = 10000,
486 .pressure_min = 0,
487 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
488 .acquisition_time = 1, /* 4us acquisition time per sample */
489 .median = 2, /* do 8 measurements */
490 .averaging = 1, /* take the average of 4 middle samples */
491 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423 492 .gpio_export = 0, /* Export GPIO to gpiolib */
5105432a
MH		 493};
494#endif
495
6f53dbbb
SJ		 496#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
497 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
498
499static const u16 bfin_snd_pin[][7] = {
500 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
501 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0, 0},
502 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
503 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_TFS, 0},
504};
505
506static struct bfin_snd_platform_data bfin_snd_data[] = {
507 {
508 .pin_req = &bfin_snd_pin[0][0],
509 },
510 {
511 .pin_req = &bfin_snd_pin[1][0],
512 },
513};
514
515#define BFIN_SND_RES(x) \
516 [x] = { \
517 { \
518 .start = SPORT##x##_TCR1, \
519 .end = SPORT##x##_TCR1, \
520 .flags = IORESOURCE_MEM \
521 }, \
522 { \
523 .start = CH_SPORT##x##_RX, \
524 .end = CH_SPORT##x##_RX, \
525 .flags = IORESOURCE_DMA, \
526 }, \
527 { \
528 .start = CH_SPORT##x##_TX, \
529 .end = CH_SPORT##x##_TX, \
530 .flags = IORESOURCE_DMA, \
531 }, \
532 { \
533 .start = IRQ_SPORT##x##_ERROR, \
534 .end = IRQ_SPORT##x##_ERROR, \
535 .flags = IORESOURCE_IRQ, \
536 } \
537 }
538
539static struct resource bfin_snd_resources[][4] = {
540 BFIN_SND_RES(0),
541 BFIN_SND_RES(1),
542};
2b6678c5
SJ		 543#endif
544
545#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
546static struct platform_device bfin_i2s_pcm = {
547 .name = "bfin-i2s-pcm-audio",
548 .id = -1,
549};
550#endif
6f53dbbb 551
2b6678c5
SJ		 552#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
553static struct platform_device bfin_tdm_pcm = {
554 .name = "bfin-tdm-pcm-audio",
555 .id = -1,
556};
557#endif
558
559#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
560static struct platform_device bfin_ac97_pcm = {
561 .name = "bfin-ac97-pcm-audio",
6f53dbbb
SJ		 562 .id = -1,
563};
564#endif
565
336746ed
BS		 566#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
567static struct platform_device bfin_i2s = {
568 .name = "bfin-i2s",
569 .id = CONFIG_SND_BF5XX_SPORT_NUM,
6f53dbbb
SJ		 570 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
571 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
572 .dev = {
573 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
574 },
336746ed
BS		 575};
576#endif
577
578#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
579static struct platform_device bfin_tdm = {
580 .name = "bfin-tdm",
581 .id = CONFIG_SND_BF5XX_SPORT_NUM,
6f53dbbb
SJ		 582 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
583 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
584 .dev = {
585 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
586 },
336746ed
BS		 587};
588#endif
589
59003145
MH		 590static struct spi_board_info bfin_spi_board_info[] __initdata = {
591#if defined(CONFIG_MTD_M25P80) \
592 || defined(CONFIG_MTD_M25P80_MODULE)
593 {
594 /* the modalias must be the same as spi device driver name */
595 .modalias = "m25p80", /* Name of spi_driver for this device */
596 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
597 .bus_num = 0, /* Framework bus number */
598 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
599 .platform_data = &bfin_spi_flash_data,
600 .controller_data = &spi_flash_chip_info,
601 .mode = SPI_MODE_3,
602 },
603#endif
604
7ba80063
BS		 605#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
606 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
59003145 607 {
7ba80063 608 .modalias = "ad183x",
59003145
MH		 609 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
610 .bus_num = 0,
7ba80063 611 .chip_select = 4,
6f53dbbb 612 .platform_data = "ad1836",
6f53dbbb 613 .mode = SPI_MODE_3,
59003145
MH		 614 },
615#endif
ffdf3ec8
YL		 616#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
617 {
618 .modalias = "mmc_spi",
619 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
620 .bus_num = 0,
621 .chip_select = 3,
622 .controller_data = &mmc_spi_chip_info,
623 .mode = SPI_MODE_0,
624 },
625#endif
626
59003145
MH		 627#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
628 {
629 .modalias = "ad7877",
630 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 631 .irq = IRQ_PF8,
59003145 632 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 633 .bus_num = 0,
2eb74ae2 634 .chip_select = 2,
59003145
MH		 635 },
636#endif
5105432a
MH		 637#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
638 {
639 .modalias = "ad7879",
640 .platform_data = &bfin_ad7879_ts_info,
641 .irq = IRQ_PF8,
642 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
643 .bus_num = 0,
644 .chip_select = 3,
5105432a
MH		 645 .mode = SPI_CPHA | SPI_CPOL,
646 },
647#endif
6e668936
MH		 648#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
649 {
650 .modalias = "spidev",
651 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
652 .bus_num = 0,
653 .chip_select = 1,
6e668936
MH		 654 },
655#endif
6924dfb0
MH		 656#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
657 {
658 .modalias = "bfin-lq035q1-spi",
659 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
660 .bus_num = 0,
661 .chip_select = 7,
6924dfb0
MH		 662 .mode = SPI_CPHA | SPI_CPOL,
663 },
664#endif
59003145
MH		 665};
666
5bda2723 667#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
59003145
MH		 668/* SPI controller data */
669static struct bfin5xx_spi_master bfin_spi0_info = {
670 .num_chipselect = 8,
671 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 672 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 673};
674
675/* SPI (0) */
676static struct resource bfin_spi0_resource[] = {
677 [0] = {
678 .start = SPI0_REGBASE,
679 .end = SPI0_REGBASE + 0xFF,
680 .flags = IORESOURCE_MEM,
681 },
682 [1] = {
683 .start = CH_SPI,
684 .end = CH_SPI,
53122693
YL		 685 .flags = IORESOURCE_DMA,
686 },
687 [2] = {
688 .start = IRQ_SPI,
689 .end = IRQ_SPI,
59003145
MH		 690 .flags = IORESOURCE_IRQ,
691 },
692};
693
694static struct platform_device bfin_spi0_device = {
695 .name = "bfin-spi",
696 .id = 0, /* Bus number */
697 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
698 .resource = bfin_spi0_resource,
699 .dev = {
700 .platform_data = &bfin_spi0_info, /* Passed to driver */
701 },
702};
703#endif /* spi master and devices */
704
59003145 705#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
59003145 706#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 707static struct resource bfin_uart0_resources[] = {
59003145 708 {
6bd1fbea
SZ		 709 .start = UART0_THR,
710 .end = UART0_GCTL+2,
59003145
MH		 711 .flags = IORESOURCE_MEM,
712 },
6bd1fbea
SZ		 713 {
714 .start = IRQ_UART0_RX,
715 .end = IRQ_UART0_RX+1,
716 .flags = IORESOURCE_IRQ,
717 },
718 {
719 .start = IRQ_UART0_ERROR,
720 .end = IRQ_UART0_ERROR,
721 .flags = IORESOURCE_IRQ,
722 },
723 {
724 .start = CH_UART0_TX,
725 .end = CH_UART0_TX,
726 .flags = IORESOURCE_DMA,
727 },
728 {
729 .start = CH_UART0_RX,
730 .end = CH_UART0_RX,
731 .flags = IORESOURCE_DMA,
732 },
733};
734
a8b19886 735static unsigned short bfin_uart0_peripherals[] = {
6bd1fbea
SZ		 736 P_UART0_TX, P_UART0_RX, 0
737};
738
739static struct platform_device bfin_uart0_device = {
740 .name = "bfin-uart",
741 .id = 0,
742 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
743 .resource = bfin_uart0_resources,
744 .dev = {
745 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
746 },
747};
59003145
MH		 748#endif
749#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 750static struct resource bfin_uart1_resources[] = {
59003145 751 {
6bd1fbea
SZ		 752 .start = UART1_THR,
753 .end = UART1_GCTL+2,
59003145
MH		 754 .flags = IORESOURCE_MEM,
755 },
6bd1fbea
SZ		 756 {
757 .start = IRQ_UART1_RX,
758 .end = IRQ_UART1_RX+1,
759 .flags = IORESOURCE_IRQ,
760 },
761 {
762 .start = IRQ_UART1_ERROR,
763 .end = IRQ_UART1_ERROR,
764 .flags = IORESOURCE_IRQ,
765 },
766 {
767 .start = CH_UART1_TX,
768 .end = CH_UART1_TX,
769 .flags = IORESOURCE_DMA,
770 },
771 {
772 .start = CH_UART1_RX,
773 .end = CH_UART1_RX,
774 .flags = IORESOURCE_DMA,
775 },
776#ifdef CONFIG_BFIN_UART1_CTSRTS
777 { /* CTS pin */
778 .start = GPIO_PF9,
779 .end = GPIO_PF9,
780 .flags = IORESOURCE_IO,
781 },
782 { /* RTS pin */
783 .start = GPIO_PF10,
784 .end = GPIO_PF10,
785 .flags = IORESOURCE_IO,
786 },
59003145
MH		 787#endif
788};
789
a8b19886 790static unsigned short bfin_uart1_peripherals[] = {
6bd1fbea
SZ		 791 P_UART1_TX, P_UART1_RX, 0
792};
793
794static struct platform_device bfin_uart1_device = {
59003145
MH		 795 .name = "bfin-uart",
796 .id = 1,
6bd1fbea
SZ		 797 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
798 .resource = bfin_uart1_resources,
799 .dev = {
800 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
801 },
59003145
MH		 802};
803#endif
6bd1fbea 804#endif
59003145 805
5be36d22 806#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 807#ifdef CONFIG_BFIN_SIR0
42bd8bcb 808static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 809 {
810 .start = 0xFFC00400,
811 .end = 0xFFC004FF,
812 .flags = IORESOURCE_MEM,
813 },
42bd8bcb
GY		 814 {
815 .start = IRQ_UART0_RX,
816 .end = IRQ_UART0_RX+1,
817 .flags = IORESOURCE_IRQ,
818 },
819 {
820 .start = CH_UART0_RX,
821 .end = CH_UART0_RX+1,
822 .flags = IORESOURCE_DMA,
823 },
824};
825
826static struct platform_device bfin_sir0_device = {
827 .name = "bfin_sir",
828 .id = 0,
829 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
830 .resource = bfin_sir0_resources,
831};
5be36d22
GY		 832#endif
833#ifdef CONFIG_BFIN_SIR1
42bd8bcb 834static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 835 {
836 .start = 0xFFC02000,
837 .end = 0xFFC020FF,
838 .flags = IORESOURCE_MEM,
839 },
42bd8bcb
GY		 840 {
841 .start = IRQ_UART1_RX,
842 .end = IRQ_UART1_RX+1,
843 .flags = IORESOURCE_IRQ,
844 },
845 {
846 .start = CH_UART1_RX,
847 .end = CH_UART1_RX+1,
848 .flags = IORESOURCE_DMA,
849 },
5be36d22
GY		 850};
851
42bd8bcb 852static struct platform_device bfin_sir1_device = {
5be36d22 853 .name = "bfin_sir",
42bd8bcb
GY		 854 .id = 1,
855 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
856 .resource = bfin_sir1_resources,
5be36d22
GY		 857};
858#endif
42bd8bcb 859#endif
5be36d22 860
59003145
MH		 861#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
862static struct resource bfin_twi0_resource[] = {
863 [0] = {
864 .start = TWI0_REGBASE,
865 .end = TWI0_REGBASE,
866 .flags = IORESOURCE_MEM,
867 },
868 [1] = {
869 .start = IRQ_TWI,
870 .end = IRQ_TWI,
871 .flags = IORESOURCE_IRQ,
872 },
873};
874
875static struct platform_device i2c_bfin_twi_device = {
876 .name = "i2c-bfin-twi",
877 .id = 0,
878 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
879 .resource = bfin_twi0_resource,
880};
881#endif
882
6924dfb0
MH		 883#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
884#include <linux/mfd/adp5520.h>
885
886 /*
887 * ADP5520/5501 LEDs Data
888 */
889
890static struct led_info adp5520_leds[] = {
891 {
892 .name = "adp5520-led1",
893 .default_trigger = "none",
894 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
895 },
896};
897
898static struct adp5520_leds_platform_data adp5520_leds_data = {
899 .num_leds = ARRAY_SIZE(adp5520_leds),
900 .leds = adp5520_leds,
901 .fade_in = ADP5520_FADE_T_600ms,
902 .fade_out = ADP5520_FADE_T_600ms,
903 .led_on_time = ADP5520_LED_ONT_600ms,
904};
905
906 /*
907 * ADP5520 Keypad Data
908 */
909
910static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
911 [ADP5520_KEY(3, 3)] = KEY_1,
912 [ADP5520_KEY(2, 3)] = KEY_2,
913 [ADP5520_KEY(1, 3)] = KEY_3,
914 [ADP5520_KEY(0, 3)] = KEY_UP,
915 [ADP5520_KEY(3, 2)] = KEY_4,
916 [ADP5520_KEY(2, 2)] = KEY_5,
917 [ADP5520_KEY(1, 2)] = KEY_6,
918 [ADP5520_KEY(0, 2)] = KEY_DOWN,
919 [ADP5520_KEY(3, 1)] = KEY_7,
920 [ADP5520_KEY(2, 1)] = KEY_8,
921 [ADP5520_KEY(1, 1)] = KEY_9,
922 [ADP5520_KEY(0, 1)] = KEY_DOT,
923 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
924 [ADP5520_KEY(2, 0)] = KEY_0,
925 [ADP5520_KEY(1, 0)] = KEY_HELP,
926 [ADP5520_KEY(0, 0)] = KEY_ENTER,
927};
928
929static struct adp5520_keys_platform_data adp5520_keys_data = {
930 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
931 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
932 .keymap = adp5520_keymap,
933 .keymapsize = ARRAY_SIZE(adp5520_keymap),
934 .repeat = 0,
935};
936
937 /*
eef35c2d 938 * ADP5520/5501 Multifunction Device Init Data
6924dfb0
MH		 939 */
940
941static struct adp5520_platform_data adp5520_pdev_data = {
942 .leds = &adp5520_leds_data,
943 .keys = &adp5520_keys_data,
944};
945
946#endif
947
72268689 948static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
ebd58333 949#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
72268689
BW		 950 {
951 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW		 952 },
953#endif
204844eb 954#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
72268689
BW		 955 {
956 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW		 957 .irq = IRQ_PF8,
958 },
959#endif
50c4c086
MH		 960#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
961 {
962 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
963 },
964#endif
6924dfb0
MH		 965#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
966 {
967 I2C_BOARD_INFO("ad7879", 0x2C),
968 .irq = IRQ_PF8,
969 .platform_data = (void *)&bfin_ad7879_ts_info,
970 },
971#endif
972#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
973 {
974 I2C_BOARD_INFO("pmic-adp5520", 0x32),
975 .irq = IRQ_PF9,
976 .platform_data = (void *)&adp5520_pdev_data,
977 },
978#endif
29bb3bc0
CC		 979#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
980 {
981 I2C_BOARD_INFO("ssm2602", 0x1b),
982 },
983#endif
39d3c1ca 984#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
985 {
986 I2C_BOARD_INFO("ad5252", 0x2f),
987 },
988#endif
624fab3b
SZ		 989#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
990 {
991 I2C_BOARD_INFO("adau1373", 0x1A),
992 },
993#endif
72268689 994};
72268689 995
59003145 996#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 997#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
998static struct resource bfin_sport0_uart_resources[] = {
999 {
1000 .start = SPORT0_TCR1,
1001 .end = SPORT0_MRCS3+4,
1002 .flags = IORESOURCE_MEM,
1003 },
1004 {
1005 .start = IRQ_SPORT0_RX,
1006 .end = IRQ_SPORT0_RX+1,
1007 .flags = IORESOURCE_IRQ,
1008 },
1009 {
1010 .start = IRQ_SPORT0_ERROR,
1011 .end = IRQ_SPORT0_ERROR,
1012 .flags = IORESOURCE_IRQ,
1013 },
1014};
1015
a8b19886 1016static unsigned short bfin_sport0_peripherals[] = {
df5de261 1017 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
e54b6730 1018 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
df5de261
SZ		 1019};
1020
59003145
MH		 1021static struct platform_device bfin_sport0_uart_device = {
1022 .name = "bfin-sport-uart",
1023 .id = 0,
df5de261
SZ		 1024 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1025 .resource = bfin_sport0_uart_resources,
1026 .dev = {
1027 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1028 },
1029};
1030#endif
1031#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1032static struct resource bfin_sport1_uart_resources[] = {
1033 {
1034 .start = SPORT1_TCR1,
1035 .end = SPORT1_MRCS3+4,
1036 .flags = IORESOURCE_MEM,
1037 },
1038 {
1039 .start = IRQ_SPORT1_RX,
1040 .end = IRQ_SPORT1_RX+1,
1041 .flags = IORESOURCE_IRQ,
1042 },
1043 {
1044 .start = IRQ_SPORT1_ERROR,
1045 .end = IRQ_SPORT1_ERROR,
1046 .flags = IORESOURCE_IRQ,
1047 },
1048};
1049
a8b19886 1050static unsigned short bfin_sport1_peripherals[] = {
df5de261 1051 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
e54b6730 1052 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
59003145
MH		 1053};
1054
1055static struct platform_device bfin_sport1_uart_device = {
1056 .name = "bfin-sport-uart",
1057 .id = 1,
df5de261
SZ		 1058 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1059 .resource = bfin_sport1_uart_resources,
1060 .dev = {
1061 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1062 },
59003145
MH		 1063};
1064#endif
df5de261 1065#endif
59003145 1066
1089e228 1067#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1089e228
MH		 1068#include <linux/gpio_keys.h>
1069
1070static struct gpio_keys_button bfin_gpio_keys_table[] = {
1071 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1072 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1073};
1074
1075static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1076 .buttons = bfin_gpio_keys_table,
1077 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1078};
1079
1080static struct platform_device bfin_device_gpiokeys = {
1081 .name = "gpio-keys",
1082 .dev = {
1083 .platform_data = &bfin_gpio_keys_data,
1084 },
1085};
1086#endif
1087
adfc0467 1088#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1089#include <asm/bfin_rotary.h>
1090
1091static struct bfin_rotary_platform_data bfin_rotary_data = {
1092 /*.rotary_up_key = KEY_UP,*/
1093 /*.rotary_down_key = KEY_DOWN,*/
1094 .rotary_rel_code = REL_WHEEL,
1095 .rotary_button_key = KEY_ENTER,
1096 .debounce = 10, /* 0..17 */
1097 .mode = ROT_QUAD_ENC | ROT_DEBE,
1098};
1099
1100static struct resource bfin_rotary_resources[] = {
1101 {
1102 .start = IRQ_CNT,
1103 .end = IRQ_CNT,
1104 .flags = IORESOURCE_IRQ,
1105 },
1106};
1107
1108static struct platform_device bfin_rotary_device = {
1109 .name = "bfin-rotary",
1110 .id = -1,
1111 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1112 .resource = bfin_rotary_resources,
1113 .dev = {
1114 .platform_data = &bfin_rotary_data,
1115 },
1116};
1117#endif
1118
14b03204
MH		 1119static const unsigned int cclk_vlev_datasheet[] =
1120{
1121 VRPAIR(VLEV_100, 400000000),
1122 VRPAIR(VLEV_105, 426000000),
1123 VRPAIR(VLEV_110, 500000000),
1124 VRPAIR(VLEV_115, 533000000),
1125 VRPAIR(VLEV_120, 600000000),
1126};
1127
1128static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1129 .tuple_tab = cclk_vlev_datasheet,
1130 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1131 .vr_settling_time = 25 /* us */,
1132};
1133
1134static struct platform_device bfin_dpmc = {
1135 .name = "bfin dpmc",
1136 .dev = {
1137 .platform_data = &bfin_dmpc_vreg_data,
1138 },
1139};
1140
59003145 1141static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1142
1143 &bfin_dpmc,
1144
64307f7d
MH		 1145#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1146 &bf5xx_nand_device,
1147#endif
1148
59003145
MH		 1149#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1150 &bfin_pcmcia_cf_device,
1151#endif
1152
1153#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1154 &rtc_device,
1155#endif
1156
3f375690
MH		 1157#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1158 &bfin_isp1760_device,
1159#endif
1160
1089e228
MH		 1161#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1162 &musb_device,
1163#endif
1164
59003145
MH		 1165#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1166 &smc91x_device,
1167#endif
1168
1169#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1170 &dm9000_device,
1171#endif
1172
1173#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1174 &bfin_mii_bus,
59003145
MH		 1175 &bfin_mac_device,
1176#endif
1177
1178#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1179 &net2272_bfin_device,
1180#endif
1181
1182#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1183 &bfin_spi0_device,
1184#endif
1185
1089e228
MH		 1186#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1187 &bf52x_t350mcqb_device,
1188#endif
1189
6924dfb0
MH		 1190#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1191 &bfin_lq035q1_device,
1192#endif
1193
59003145 1194#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1195#ifdef CONFIG_SERIAL_BFIN_UART0
1196 &bfin_uart0_device,
1197#endif
1198#ifdef CONFIG_SERIAL_BFIN_UART1
1199 &bfin_uart1_device,
1200#endif
59003145
MH		 1201#endif
1202
5be36d22 1203#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1204#ifdef CONFIG_BFIN_SIR0
1205 &bfin_sir0_device,
1206#endif
1207#ifdef CONFIG_BFIN_SIR1
1208 &bfin_sir1_device,
1209#endif
5be36d22
GY		 1210#endif
1211
59003145
MH		 1212#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1213 &i2c_bfin_twi_device,
1214#endif
1215
1216#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 1217#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
59003145 1218 &bfin_sport0_uart_device,
df5de261
SZ		 1219#endif
1220#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
59003145
MH		 1221 &bfin_sport1_uart_device,
1222#endif
df5de261 1223#endif
59003145 1224
1089e228
MH		 1225#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1226 &bfin_device_gpiokeys,
1227#endif
cad2ab65 1228
adfc0467 1229#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1230 &bfin_rotary_device,
1231#endif
1232
d7e5dd41
MH		 1233#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1234 &ezkit_flash_device,
1235#endif
336746ed 1236
2b6678c5
SJ		 1237#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1238 &bfin_i2s_pcm,
1239#endif
1240
1241#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1242 &bfin_tdm_pcm,
1243#endif
1244
1245#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1246 &bfin_ac97_pcm,
6f53dbbb
SJ		 1247#endif
1248
336746ed
BS		 1249#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1250 &bfin_i2s,
1251#endif
1252
1253#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1254 &bfin_tdm,
1255#endif
59003145
MH		 1256};
1257
7f6678c5 1258static int __init ezkit_init(void)
59003145 1259{
b85d858b 1260 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW		 1261 i2c_register_board_info(0, bfin_i2c_board_info,
1262 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1263 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1264 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH		 1265 return 0;
1266}
1267
7f6678c5 1268arch_initcall(ezkit_init);
59003145 1269
c13ce9fd
SZ		 1270static struct platform_device *ezkit_early_devices[] __initdata = {
1271#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1272#ifdef CONFIG_SERIAL_BFIN_UART0
1273 &bfin_uart0_device,
1274#endif
1275#ifdef CONFIG_SERIAL_BFIN_UART1
1276 &bfin_uart1_device,
1277#endif
1278#endif
1279
1280#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1281#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1282 &bfin_sport0_uart_device,
1283#endif
1284#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1285 &bfin_sport1_uart_device,
1286#endif
1287#endif
1288};
1289
1290void __init native_machine_early_platform_add_devices(void)
1291{
1292 printk(KERN_INFO "register early platform devices\n");
1293 early_platform_add_devices(ezkit_early_devices,
1294 ARRAY_SIZE(ezkit_early_devices));
1295}
1296
59003145
MH		 1297void native_machine_restart(char *cmd)
1298{
1299 /* workaround reboot hang when booting from SPI */
1300 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1301 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1302}
137b1529 1303
9862cc52 1304void bfin_get_ether_addr(char *addr)
137b1529 1305{
181afa94
MF		 1306 /* the MAC is stored in OTP memory page 0xDF */
1307 u32 ret;
1308 u64 otp_mac;
1309 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1310
1311 ret = otp_read(0xDF, 0x00, &otp_mac);
1312 if (!(ret & 0x1)) {
1313 char *otp_mac_p = (char *)&otp_mac;
1314 for (ret = 0; ret < 6; ++ret)
1315 addr[ret] = otp_mac_p[5 - ret];
1316 }
137b1529 1317}
9862cc52 1318EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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