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[Blackfin] arch: Initial checkin of the memory protection support.
[deliverable/linux.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145
MH		 1/*
2 * File: arch/blackfin/mach-bf527/boards/ezkit.c
3 * Based on: arch/blackfin/mach-bf537/boards/stamp.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2007 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 38#include <linux/usb/isp1362.h>
59003145
MH		 39#endif
40#include <linux/pata_platform.h>
41#include <linux/irq.h>
42#include <linux/interrupt.h>
632f658b 43#include <linux/usb/sl811.h>
1089e228 44#include <linux/usb/musb.h>
64307f7d 45#include <asm/cplb.h>
59003145
MH		 46#include <asm/dma.h>
47#include <asm/bfin5xx_spi.h>
48#include <asm/reboot.h>
64307f7d 49#include <asm/nand.h>
5d448dd5 50#include <asm/portmux.h>
59003145
MH		 51#include <linux/spi/ad7877.h>
52
53/*
54 * Name the Board for the /proc/cpuinfo
55 */
066954a3 56const char bfin_board_name[] = "ADDS-BF527-EZKIT";
59003145
MH		 57
58/*
59 * Driver needs to know address, irq and flag pin.
60 */
61
62#define ISP1761_BASE 0x203C0000
63#define ISP1761_IRQ IRQ_PF7
64
65#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
66static struct resource bfin_isp1761_resources[] = {
67 [0] = {
68 .name = "isp1761-regs",
69 .start = ISP1761_BASE + 0x00000000,
70 .end = ISP1761_BASE + 0x000fffff,
71 .flags = IORESOURCE_MEM,
72 },
73 [1] = {
74 .start = ISP1761_IRQ,
75 .end = ISP1761_IRQ,
76 .flags = IORESOURCE_IRQ,
77 },
78};
79
80static struct platform_device bfin_isp1761_device = {
81 .name = "isp1761",
82 .id = 0,
83 .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
84 .resource = bfin_isp1761_resources,
85};
86
87static struct platform_device *bfin_isp1761_devices[] = {
88 &bfin_isp1761_device,
89};
90
91int __init bfin_isp1761_init(void)
92{
93 unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
94
95 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
96 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
97
98 return platform_add_devices(bfin_isp1761_devices, num_devices);
99}
100
101void __exit bfin_isp1761_exit(void)
102{
103 platform_device_unregister(&bfin_isp1761_device);
104}
105
106arch_initcall(bfin_isp1761_init);
107#endif
108
1089e228
MH		 109#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
110static struct resource musb_resources[] = {
111 [0] = {
112 .start = 0xffc03800,
113 .end = 0xffc03cff,
114 .flags = IORESOURCE_MEM,
115 },
116 [1] = { /* general IRQ */
117 .start = IRQ_USB_INT0,
118 .end = IRQ_USB_INT0,
119 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
120 },
121 [2] = { /* DMA IRQ */
122 .start = IRQ_USB_DMA,
123 .end = IRQ_USB_DMA,
124 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
125 },
126};
127
128static struct musb_hdrc_platform_data musb_plat = {
129#if defined(CONFIG_USB_MUSB_OTG)
130 .mode = MUSB_OTG,
131#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
132 .mode = MUSB_HOST,
133#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
134 .mode = MUSB_PERIPHERAL,
135#endif
136 .multipoint = 0,
137};
138
139static u64 musb_dmamask = ~(u32)0;
140
141static struct platform_device musb_device = {
142 .name = "musb_hdrc",
143 .id = 0,
144 .dev = {
145 .dma_mask = &musb_dmamask,
146 .coherent_dma_mask = 0xffffffff,
147 .platform_data = &musb_plat,
148 },
149 .num_resources = ARRAY_SIZE(musb_resources),
150 .resource = musb_resources,
151};
152#endif
153
154#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
155
156static struct resource bf52x_t350mcqb_resources[] = {
157 {
158 .start = IRQ_PPI_ERROR,
159 .end = IRQ_PPI_ERROR,
160 .flags = IORESOURCE_IRQ,
161 },
162};
163
164static struct platform_device bf52x_t350mcqb_device = {
165 .name = "bfin-t350mcqb",
166 .id = -1,
167 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
168 .resource = bf52x_t350mcqb_resources,
169};
170#endif
171
64307f7d
MH		 172#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
173static struct mtd_partition partition_info[] = {
174 {
175 .name = "Linux Kernel",
176 .offset = 0,
177 .size = 4 * SIZE_1M,
178 },
179 {
180 .name = "File System",
181 .offset = 4 * SIZE_1M,
182 .size = (256 - 4) * SIZE_1M,
183 },
184};
185
186static struct bf5xx_nand_platform bf5xx_nand_platform = {
187 .page_size = NFC_PG_SIZE_256,
188 .data_width = NFC_NWIDTH_8,
189 .partitions = partition_info,
190 .nr_partitions = ARRAY_SIZE(partition_info),
191 .rd_dly = 3,
192 .wr_dly = 3,
193};
194
195static struct resource bf5xx_nand_resources[] = {
196 {
197 .start = NFC_CTL,
198 .end = NFC_DATA_RD + 2,
199 .flags = IORESOURCE_MEM,
200 },
201 {
202 .start = CH_NFC,
203 .end = CH_NFC,
204 .flags = IORESOURCE_IRQ,
205 },
206};
207
208static struct platform_device bf5xx_nand_device = {
209 .name = "bf5xx-nand",
210 .id = 0,
211 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
212 .resource = bf5xx_nand_resources,
213 .dev = {
214 .platform_data = &bf5xx_nand_platform,
215 },
216};
217#endif
218
59003145
MH		 219#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
220static struct resource bfin_pcmcia_cf_resources[] = {
221 {
222 .start = 0x20310000, /* IO PORT */
223 .end = 0x20312000,
224 .flags = IORESOURCE_MEM,
225 }, {
226 .start = 0x20311000, /* Attribute Memory */
227 .end = 0x20311FFF,
228 .flags = IORESOURCE_MEM,
229 }, {
230 .start = IRQ_PF4,
231 .end = IRQ_PF4,
232 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
233 }, {
234 .start = 6, /* Card Detect PF6 */
235 .end = 6,
236 .flags = IORESOURCE_IRQ,
237 },
238};
239
240static struct platform_device bfin_pcmcia_cf_device = {
241 .name = "bfin_cf_pcmcia",
242 .id = -1,
243 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
244 .resource = bfin_pcmcia_cf_resources,
245};
246#endif
247
248#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
249static struct platform_device rtc_device = {
250 .name = "rtc-bfin",
251 .id = -1,
252};
253#endif
254
255#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
256static struct resource smc91x_resources[] = {
257 {
258 .name = "smc91x-regs",
259 .start = 0x20300300,
260 .end = 0x20300300 + 16,
261 .flags = IORESOURCE_MEM,
262 }, {
263
264 .start = IRQ_PF7,
265 .end = IRQ_PF7,
266 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
267 },
268};
269static struct platform_device smc91x_device = {
270 .name = "smc91x",
271 .id = 0,
272 .num_resources = ARRAY_SIZE(smc91x_resources),
273 .resource = smc91x_resources,
274};
275#endif
276
277#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
278static struct resource dm9000_resources[] = {
279 [0] = {
280 .start = 0x203FB800,
281 .end = 0x203FB800 + 8,
282 .flags = IORESOURCE_MEM,
283 },
284 [1] = {
285 .start = IRQ_PF9,
286 .end = IRQ_PF9,
287 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
288 },
289};
290
291static struct platform_device dm9000_device = {
292 .name = "dm9000",
293 .id = -1,
294 .num_resources = ARRAY_SIZE(dm9000_resources),
295 .resource = dm9000_resources,
296};
297#endif
298
299#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
300static struct resource sl811_hcd_resources[] = {
301 {
302 .start = 0x20340000,
303 .end = 0x20340000,
304 .flags = IORESOURCE_MEM,
305 }, {
306 .start = 0x20340004,
307 .end = 0x20340004,
308 .flags = IORESOURCE_MEM,
309 }, {
310 .start = CONFIG_USB_SL811_BFIN_IRQ,
311 .end = CONFIG_USB_SL811_BFIN_IRQ,
312 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
313 },
314};
315
316#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
317void sl811_port_power(struct device *dev, int is_on)
318{
319 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
320 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
321
322 if (is_on)
323 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
324 else
325 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
326}
327#endif
328
329static struct sl811_platform_data sl811_priv = {
330 .potpg = 10,
331 .power = 250, /* == 500mA */
332#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
333 .port_power = &sl811_port_power,
334#endif
335};
336
337static struct platform_device sl811_hcd_device = {
338 .name = "sl811-hcd",
339 .id = 0,
340 .dev = {
341 .platform_data = &sl811_priv,
342 },
343 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
344 .resource = sl811_hcd_resources,
345};
346#endif
347
348#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
349static struct resource isp1362_hcd_resources[] = {
350 {
351 .start = 0x20360000,
352 .end = 0x20360000,
353 .flags = IORESOURCE_MEM,
354 }, {
355 .start = 0x20360004,
356 .end = 0x20360004,
357 .flags = IORESOURCE_MEM,
358 }, {
359 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
360 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
361 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
362 },
363};
364
365static struct isp1362_platform_data isp1362_priv = {
366 .sel15Kres = 1,
367 .clknotstop = 0,
368 .oc_enable = 0,
369 .int_act_high = 0,
370 .int_edge_triggered = 0,
371 .remote_wakeup_connected = 0,
372 .no_power_switching = 1,
373 .power_switching_mode = 0,
374};
375
376static struct platform_device isp1362_hcd_device = {
377 .name = "isp1362-hcd",
378 .id = 0,
379 .dev = {
380 .platform_data = &isp1362_priv,
381 },
382 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
383 .resource = isp1362_hcd_resources,
384};
385#endif
386
387#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
388static struct platform_device bfin_mac_device = {
389 .name = "bfin_mac",
390};
391#endif
392
393#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
394static struct resource net2272_bfin_resources[] = {
395 {
396 .start = 0x20300000,
397 .end = 0x20300000 + 0x100,
398 .flags = IORESOURCE_MEM,
399 }, {
400 .start = IRQ_PF7,
401 .end = IRQ_PF7,
402 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
403 },
404};
405
406static struct platform_device net2272_bfin_device = {
407 .name = "net2272",
408 .id = -1,
409 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
410 .resource = net2272_bfin_resources,
411};
412#endif
413
414#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
415/* all SPI peripherals info goes here */
416
417#if defined(CONFIG_MTD_M25P80) \
418 || defined(CONFIG_MTD_M25P80_MODULE)
419static struct mtd_partition bfin_spi_flash_partitions[] = {
420 {
421 .name = "bootloader",
422 .size = 0x00020000,
423 .offset = 0,
424 .mask_flags = MTD_CAP_ROM
425 }, {
426 .name = "kernel",
427 .size = 0xe0000,
428 .offset = 0x20000
429 }, {
430 .name = "file system",
431 .size = 0x700000,
432 .offset = 0x00100000,
433 }
434};
435
436static struct flash_platform_data bfin_spi_flash_data = {
437 .name = "m25p80",
438 .parts = bfin_spi_flash_partitions,
439 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
440 .type = "m25p64",
441};
442
443/* SPI flash chip (m25p64) */
444static struct bfin5xx_spi_chip spi_flash_chip_info = {
445 .enable_dma = 0, /* use dma transfer with this chip*/
446 .bits_per_word = 8,
447};
448#endif
449
450#if defined(CONFIG_SPI_ADC_BF533) \
451 || defined(CONFIG_SPI_ADC_BF533_MODULE)
452/* SPI ADC chip */
453static struct bfin5xx_spi_chip spi_adc_chip_info = {
454 .enable_dma = 1, /* use dma transfer with this chip*/
455 .bits_per_word = 16,
456};
457#endif
458
459#if defined(CONFIG_SND_BLACKFIN_AD1836) \
460 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
461static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
462 .enable_dma = 0,
463 .bits_per_word = 16,
464};
465#endif
466
467#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
468static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
469 .enable_dma = 0,
470 .bits_per_word = 16,
471};
472#endif
473
474#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
475static struct bfin5xx_spi_chip spi_mmc_chip_info = {
476 .enable_dma = 1,
477 .bits_per_word = 8,
478};
479#endif
480
481#if defined(CONFIG_PBX)
482static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
483 .ctl_reg = 0x4, /* send zero */
484 .enable_dma = 0,
485 .bits_per_word = 8,
486 .cs_change_per_word = 1,
487};
488#endif
489
490#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
491static struct bfin5xx_spi_chip ad5304_chip_info = {
492 .enable_dma = 0,
493 .bits_per_word = 16,
494};
495#endif
496
497#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
498static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
499 .enable_dma = 0,
500 .bits_per_word = 16,
501};
502
503static const struct ad7877_platform_data bfin_ad7877_ts_info = {
504 .model = 7877,
505 .vref_delay_usecs = 50, /* internal, no capacitor */
506 .x_plate_ohms = 419,
507 .y_plate_ohms = 486,
508 .pressure_max = 1000,
509 .pressure_min = 0,
510 .stopacq_polarity = 1,
511 .first_conversion_delay = 3,
512 .acquisition_time = 1,
513 .averaging = 1,
514 .pen_down_acc_interval = 1,
515};
516#endif
517
c7d48966 518#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
0954f70a
MH		 519 && defined(CONFIG_SND_SOC_WM8731_SPI)
520static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
521 .enable_dma = 0,
522 .bits_per_word = 16,
523};
524#endif
59003145
MH		 525static struct spi_board_info bfin_spi_board_info[] __initdata = {
526#if defined(CONFIG_MTD_M25P80) \
527 || defined(CONFIG_MTD_M25P80_MODULE)
528 {
529 /* the modalias must be the same as spi device driver name */
530 .modalias = "m25p80", /* Name of spi_driver for this device */
531 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
532 .bus_num = 0, /* Framework bus number */
533 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
534 .platform_data = &bfin_spi_flash_data,
535 .controller_data = &spi_flash_chip_info,
536 .mode = SPI_MODE_3,
537 },
538#endif
539
540#if defined(CONFIG_SPI_ADC_BF533) \
541 || defined(CONFIG_SPI_ADC_BF533_MODULE)
542 {
543 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
544 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
545 .bus_num = 0, /* Framework bus number */
546 .chip_select = 1, /* Framework chip select. */
547 .platform_data = NULL, /* No spi_driver specific config */
548 .controller_data = &spi_adc_chip_info,
549 },
550#endif
551
552#if defined(CONFIG_SND_BLACKFIN_AD1836) \
553 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
554 {
555 .modalias = "ad1836-spi",
556 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
557 .bus_num = 0,
558 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
559 .controller_data = &ad1836_spi_chip_info,
560 },
561#endif
562#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
563 {
564 .modalias = "ad9960-spi",
565 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
566 .bus_num = 0,
567 .chip_select = 1,
568 .controller_data = &ad9960_spi_chip_info,
569 },
570#endif
571#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
572 {
573 .modalias = "spi_mmc_dummy",
574 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
575 .bus_num = 0,
576 .chip_select = 0,
577 .platform_data = NULL,
578 .controller_data = &spi_mmc_chip_info,
579 .mode = SPI_MODE_3,
580 },
581 {
582 .modalias = "spi_mmc",
583 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
584 .bus_num = 0,
585 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
586 .platform_data = NULL,
587 .controller_data = &spi_mmc_chip_info,
588 .mode = SPI_MODE_3,
589 },
590#endif
591#if defined(CONFIG_PBX)
592 {
593 .modalias = "fxs-spi",
594 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
595 .bus_num = 0,
596 .chip_select = 8 - CONFIG_J11_JUMPER,
597 .controller_data = &spi_si3xxx_chip_info,
598 .mode = SPI_MODE_3,
599 },
600 {
601 .modalias = "fxo-spi",
602 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
603 .bus_num = 0,
604 .chip_select = 8 - CONFIG_J19_JUMPER,
605 .controller_data = &spi_si3xxx_chip_info,
606 .mode = SPI_MODE_3,
607 },
608#endif
609#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
610 {
611 .modalias = "ad5304_spi",
612 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
613 .bus_num = 0,
614 .chip_select = 2,
615 .platform_data = NULL,
616 .controller_data = &ad5304_chip_info,
617 .mode = SPI_MODE_2,
618 },
619#endif
620#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
621 {
622 .modalias = "ad7877",
623 .platform_data = &bfin_ad7877_ts_info,
624 .irq = IRQ_PF6,
625 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 626 .bus_num = 0,
59003145
MH		 627 .chip_select = 1,
628 .controller_data = &spi_ad7877_chip_info,
629 },
630#endif
c7d48966 631#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
0954f70a
MH		 632 && defined(CONFIG_SND_SOC_WM8731_SPI)
633 {
634 .modalias = "wm8731",
635 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
636 .bus_num = 0,
637 .chip_select = 5,
638 .controller_data = &spi_wm8731_chip_info,
639 .mode = SPI_MODE_0,
640 },
641#endif
59003145
MH		 642};
643
644/* SPI controller data */
645static struct bfin5xx_spi_master bfin_spi0_info = {
646 .num_chipselect = 8,
647 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 648 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 649};
650
651/* SPI (0) */
652static struct resource bfin_spi0_resource[] = {
653 [0] = {
654 .start = SPI0_REGBASE,
655 .end = SPI0_REGBASE + 0xFF,
656 .flags = IORESOURCE_MEM,
657 },
658 [1] = {
659 .start = CH_SPI,
660 .end = CH_SPI,
661 .flags = IORESOURCE_IRQ,
662 },
663};
664
665static struct platform_device bfin_spi0_device = {
666 .name = "bfin-spi",
667 .id = 0, /* Bus number */
668 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
669 .resource = bfin_spi0_resource,
670 .dev = {
671 .platform_data = &bfin_spi0_info, /* Passed to driver */
672 },
673};
674#endif /* spi master and devices */
675
676#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
677static struct platform_device bfin_fb_device = {
678 .name = "bf537-lq035",
679};
680#endif
681
682#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
683static struct platform_device bfin_fb_adv7393_device = {
684 .name = "bfin-adv7393",
685};
686#endif
687
688#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
689static struct resource bfin_uart_resources[] = {
690#ifdef CONFIG_SERIAL_BFIN_UART0
691 {
692 .start = 0xFFC00400,
693 .end = 0xFFC004FF,
694 .flags = IORESOURCE_MEM,
695 },
696#endif
697#ifdef CONFIG_SERIAL_BFIN_UART1
698 {
699 .start = 0xFFC02000,
700 .end = 0xFFC020FF,
701 .flags = IORESOURCE_MEM,
702 },
703#endif
704};
705
706static struct platform_device bfin_uart_device = {
707 .name = "bfin-uart",
708 .id = 1,
709 .num_resources = ARRAY_SIZE(bfin_uart_resources),
710 .resource = bfin_uart_resources,
711};
712#endif
713
714#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
715static struct resource bfin_twi0_resource[] = {
716 [0] = {
717 .start = TWI0_REGBASE,
718 .end = TWI0_REGBASE,
719 .flags = IORESOURCE_MEM,
720 },
721 [1] = {
722 .start = IRQ_TWI,
723 .end = IRQ_TWI,
724 .flags = IORESOURCE_IRQ,
725 },
726};
727
728static struct platform_device i2c_bfin_twi_device = {
729 .name = "i2c-bfin-twi",
730 .id = 0,
731 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
732 .resource = bfin_twi0_resource,
733};
734#endif
735
736#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
737static struct platform_device bfin_sport0_uart_device = {
738 .name = "bfin-sport-uart",
739 .id = 0,
740};
741
742static struct platform_device bfin_sport1_uart_device = {
743 .name = "bfin-sport-uart",
744 .id = 1,
745};
746#endif
747
748#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
749#define PATA_INT 55
750
751static struct pata_platform_info bfin_pata_platform_data = {
752 .ioport_shift = 1,
753 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
754};
755
756static struct resource bfin_pata_resources[] = {
757 {
758 .start = 0x20314020,
759 .end = 0x2031403F,
760 .flags = IORESOURCE_MEM,
761 },
762 {
763 .start = 0x2031401C,
764 .end = 0x2031401F,
765 .flags = IORESOURCE_MEM,
766 },
767 {
768 .start = PATA_INT,
769 .end = PATA_INT,
770 .flags = IORESOURCE_IRQ,
771 },
772};
773
774static struct platform_device bfin_pata_device = {
775 .name = "pata_platform",
776 .id = -1,
777 .num_resources = ARRAY_SIZE(bfin_pata_resources),
778 .resource = bfin_pata_resources,
779 .dev = {
780 .platform_data = &bfin_pata_platform_data,
781 }
782};
783#endif
784
1089e228
MH		 785#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
786#include <linux/input.h>
787#include <linux/gpio_keys.h>
788
789static struct gpio_keys_button bfin_gpio_keys_table[] = {
790 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
791 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
792};
793
794static struct gpio_keys_platform_data bfin_gpio_keys_data = {
795 .buttons = bfin_gpio_keys_table,
796 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
797};
798
799static struct platform_device bfin_device_gpiokeys = {
800 .name = "gpio-keys",
801 .dev = {
802 .platform_data = &bfin_gpio_keys_data,
803 },
804};
805#endif
806
59003145 807static struct platform_device *stamp_devices[] __initdata = {
64307f7d
MH		 808#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
809 &bf5xx_nand_device,
810#endif
811
59003145
MH		 812#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
813 &bfin_pcmcia_cf_device,
814#endif
815
816#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
817 &rtc_device,
818#endif
819
820#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
821 &sl811_hcd_device,
822#endif
823
824#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
825 &isp1362_hcd_device,
826#endif
827
1089e228
MH		 828#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
829 &musb_device,
830#endif
831
59003145
MH		 832#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
833 &smc91x_device,
834#endif
835
836#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
837 &dm9000_device,
838#endif
839
840#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
841 &bfin_mac_device,
842#endif
843
844#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
845 &net2272_bfin_device,
846#endif
847
848#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
849 &bfin_spi0_device,
850#endif
851
852#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
853 &bfin_fb_device,
854#endif
855
1089e228
MH		 856#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
857 &bf52x_t350mcqb_device,
858#endif
859
59003145
MH		 860#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
861 &bfin_fb_adv7393_device,
862#endif
863
864#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
865 &bfin_uart_device,
866#endif
867
868#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
869 &i2c_bfin_twi_device,
870#endif
871
872#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
873 &bfin_sport0_uart_device,
874 &bfin_sport1_uart_device,
875#endif
876
877#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
878 &bfin_pata_device,
879#endif
1089e228
MH		 880
881#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
882 &bfin_device_gpiokeys,
883#endif
59003145
MH		 884};
885
886static int __init stamp_init(void)
887{
888 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
889 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
890#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
891 spi_register_board_info(bfin_spi_board_info,
892 ARRAY_SIZE(bfin_spi_board_info));
893#endif
894
895#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
896 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
897#endif
898 return 0;
899}
900
901arch_initcall(stamp_init);
902
903void native_machine_restart(char *cmd)
904{
905 /* workaround reboot hang when booting from SPI */
906 if ((bfin_read_SYSCR() & 0x7) == 0x3)
907 bfin_gpio_reset_spi0_ssel1();
908}
137b1529
MF		 909
910/*
911 * Currently the MAC address is saved in Flash by U-Boot
912 */
913#define FLASH_MAC 0x203f0000
9862cc52 914void bfin_get_ether_addr(char *addr)
137b1529
MF		 915{
916 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
917 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
918}
9862cc52 919EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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