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Blackfin: tll6527m: fix spelling in unused code (struct name)
[deliverable/linux.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
d7e5dd41 13#include <linux/mtd/physmap.h>
59003145
MH		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
72268689 16#include <linux/i2c.h>
59003145
MH		 17#include <linux/irq.h>
18#include <linux/interrupt.h>
1089e228 19#include <linux/usb/musb.h>
6924dfb0
MH		 20#include <linux/leds.h>
21#include <linux/input.h>
59003145
MH		 22#include <asm/dma.h>
23#include <asm/bfin5xx_spi.h>
24#include <asm/reboot.h>
64307f7d 25#include <asm/nand.h>
5d448dd5 26#include <asm/portmux.h>
14b03204 27#include <asm/dpmc.h>
59003145
MH		 28#include <linux/spi/ad7877.h>
29
30/*
31 * Name the Board for the /proc/cpuinfo
32 */
6924dfb0
MH		 33#ifdef CONFIG_BFIN527_EZKIT_V2
34const char bfin_board_name[] = "ADI BF527-EZKIT V2";
35#else
fe85cad2 36const char bfin_board_name[] = "ADI BF527-EZKIT";
6924dfb0 37#endif
59003145
MH		 38
39/*
40 * Driver needs to know address, irq and flag pin.
41 */
42
59003145 43#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 44#include <linux/usb/isp1760.h>
45static struct resource bfin_isp1760_resources[] = {
59003145 46 [0] = {
3f375690
MH		 47 .start = 0x203C0000,
48 .end = 0x203C0000 + 0x000fffff,
59003145
MH		 49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
3f375690
MH		 52 .start = IRQ_PF7,
53 .end = IRQ_PF7,
59003145
MH		 54 .flags = IORESOURCE_IRQ,
55 },
56};
57
3f375690
MH		 58static struct isp1760_platform_data isp1760_priv = {
59 .is_isp1761 = 0,
3f375690
MH		 60 .bus_width_16 = 1,
61 .port1_otg = 0,
62 .analog_oc = 0,
63 .dack_polarity_high = 0,
64 .dreq_polarity_high = 0,
59003145
MH		 65};
66
3f375690 67static struct platform_device bfin_isp1760_device = {
c6feb768 68 .name = "isp1760",
3f375690
MH		 69 .id = 0,
70 .dev = {
71 .platform_data = &isp1760_priv,
72 },
73 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
74 .resource = bfin_isp1760_resources,
59003145 75};
59003145
MH		 76#endif
77
1089e228
MH		 78#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
79static struct resource musb_resources[] = {
80 [0] = {
81 .start = 0xffc03800,
82 .end = 0xffc03cff,
83 .flags = IORESOURCE_MEM,
84 },
85 [1] = { /* general IRQ */
86 .start = IRQ_USB_INT0,
87 .end = IRQ_USB_INT0,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 89 .name = "mc"
1089e228
MH		 90 },
91 [2] = { /* DMA IRQ */
92 .start = IRQ_USB_DMA,
93 .end = IRQ_USB_DMA,
94 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
fcf173e4 95 .name = "dma"
1089e228
MH		 96 },
97};
98
50041acb
BW		 99static struct musb_hdrc_config musb_config = {
100 .multipoint = 0,
101 .dyn_fifo = 0,
102 .soft_con = 1,
103 .dma = 1,
fea05dac
BW		 104 .num_eps = 8,
105 .dma_channels = 8,
50041acb 106 .gpio_vrsel = GPIO_PG13,
85eb0e4b
CC		 107 /* Some custom boards need to be active low, just set it to "0"
108 * if it is the case.
109 */
110 .gpio_vrsel_active = 1,
759a3f3f 111 .clkin = 24, /* musb CLKIN in MHZ */
50041acb
BW		 112};
113
1089e228
MH		 114static struct musb_hdrc_platform_data musb_plat = {
115#if defined(CONFIG_USB_MUSB_OTG)
116 .mode = MUSB_OTG,
117#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
118 .mode = MUSB_HOST,
119#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
120 .mode = MUSB_PERIPHERAL,
121#endif
50041acb 122 .config = &musb_config,
1089e228
MH		 123};
124
125static u64 musb_dmamask = ~(u32)0;
126
127static struct platform_device musb_device = {
9cb0308e 128 .name = "musb-blackfin",
1089e228
MH		 129 .id = 0,
130 .dev = {
131 .dma_mask = &musb_dmamask,
132 .coherent_dma_mask = 0xffffffff,
133 .platform_data = &musb_plat,
134 },
135 .num_resources = ARRAY_SIZE(musb_resources),
136 .resource = musb_resources,
137};
138#endif
139
140#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
141
142static struct resource bf52x_t350mcqb_resources[] = {
143 {
144 .start = IRQ_PPI_ERROR,
145 .end = IRQ_PPI_ERROR,
146 .flags = IORESOURCE_IRQ,
147 },
148};
149
150static struct platform_device bf52x_t350mcqb_device = {
151 .name = "bfin-t350mcqb",
152 .id = -1,
153 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
154 .resource = bf52x_t350mcqb_resources,
155};
156#endif
157
6924dfb0
MH		 158#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
159#include <asm/bfin-lq035q1.h>
160
161static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
162 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
d94a1aa4 163 .ppi_mode = USE_RGB565_8_BIT_PPI,
6924dfb0
MH		 164};
165
166static struct resource bfin_lq035q1_resources[] = {
167 {
168 .start = IRQ_PPI_ERROR,
169 .end = IRQ_PPI_ERROR,
170 .flags = IORESOURCE_IRQ,
171 },
172};
173
174static struct platform_device bfin_lq035q1_device = {
175 .name = "bfin-lq035q1",
176 .id = -1,
177 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
178 .resource = bfin_lq035q1_resources,
179 .dev = {
180 .platform_data = &bfin_lq035q1_data,
181 },
182};
183#endif
184
d7e5dd41
MH		 185#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
186static struct mtd_partition ezkit_partitions[] = {
187 {
aa582977 188 .name = "bootloader(nor)",
d7e5dd41
MH		 189 .size = 0x40000,
190 .offset = 0,
191 }, {
aa582977 192 .name = "linux kernel(nor)",
d7e5dd41
MH		 193 .size = 0x1C0000,
194 .offset = MTDPART_OFS_APPEND,
195 }, {
aa582977 196 .name = "file system(nor)",
d7e5dd41
MH		 197 .size = MTDPART_SIZ_FULL,
198 .offset = MTDPART_OFS_APPEND,
199 }
200};
201
202static struct physmap_flash_data ezkit_flash_data = {
203 .width = 2,
204 .parts = ezkit_partitions,
205 .nr_parts = ARRAY_SIZE(ezkit_partitions),
206};
207
208static struct resource ezkit_flash_resource = {
209 .start = 0x20000000,
210 .end = 0x203fffff,
211 .flags = IORESOURCE_MEM,
212};
213
214static struct platform_device ezkit_flash_device = {
215 .name = "physmap-flash",
216 .id = 0,
217 .dev = {
218 .platform_data = &ezkit_flash_data,
219 },
220 .num_resources = 1,
221 .resource = &ezkit_flash_resource,
222};
223#endif
224
64307f7d
MH		 225#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
226static struct mtd_partition partition_info[] = {
227 {
5cc1c567 228 .name = "bootloader(nand)",
64307f7d 229 .offset = 0,
5cc1c567
MF		 230 .size = 0x40000,
231 }, {
232 .name = "linux kernel(nand)",
233 .offset = MTDPART_OFS_APPEND,
f4585a08 234 .size = 4 * 1024 * 1024,
64307f7d
MH		 235 },
236 {
aa582977 237 .name = "file system(nand)",
edf05641
MF		 238 .offset = MTDPART_OFS_APPEND,
239 .size = MTDPART_SIZ_FULL,
64307f7d
MH		 240 },
241};
242
243static struct bf5xx_nand_platform bf5xx_nand_platform = {
64307f7d
MH		 244 .data_width = NFC_NWIDTH_8,
245 .partitions = partition_info,
246 .nr_partitions = ARRAY_SIZE(partition_info),
247 .rd_dly = 3,
248 .wr_dly = 3,
249};
250
251static struct resource bf5xx_nand_resources[] = {
252 {
253 .start = NFC_CTL,
254 .end = NFC_DATA_RD + 2,
255 .flags = IORESOURCE_MEM,
256 },
257 {
258 .start = CH_NFC,
259 .end = CH_NFC,
260 .flags = IORESOURCE_IRQ,
261 },
262};
263
264static struct platform_device bf5xx_nand_device = {
265 .name = "bf5xx-nand",
266 .id = 0,
267 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
268 .resource = bf5xx_nand_resources,
269 .dev = {
270 .platform_data = &bf5xx_nand_platform,
271 },
272};
273#endif
274
59003145
MH		 275#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
276static struct resource bfin_pcmcia_cf_resources[] = {
277 {
278 .start = 0x20310000, /* IO PORT */
279 .end = 0x20312000,
280 .flags = IORESOURCE_MEM,
281 }, {
282 .start = 0x20311000, /* Attribute Memory */
283 .end = 0x20311FFF,
284 .flags = IORESOURCE_MEM,
285 }, {
286 .start = IRQ_PF4,
287 .end = IRQ_PF4,
288 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
289 }, {
290 .start = 6, /* Card Detect PF6 */
291 .end = 6,
292 .flags = IORESOURCE_IRQ,
293 },
294};
295
296static struct platform_device bfin_pcmcia_cf_device = {
297 .name = "bfin_cf_pcmcia",
298 .id = -1,
299 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
300 .resource = bfin_pcmcia_cf_resources,
301};
302#endif
303
304#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
305static struct platform_device rtc_device = {
306 .name = "rtc-bfin",
307 .id = -1,
308};
309#endif
310
311#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 312#include <linux/smc91x.h>
313
314static struct smc91x_platdata smc91x_info = {
315 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
316 .leda = RPC_LED_100_10,
317 .ledb = RPC_LED_TX_RX,
318};
319
59003145
MH		 320static struct resource smc91x_resources[] = {
321 {
322 .name = "smc91x-regs",
323 .start = 0x20300300,
324 .end = 0x20300300 + 16,
325 .flags = IORESOURCE_MEM,
326 }, {
327
328 .start = IRQ_PF7,
329 .end = IRQ_PF7,
330 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
331 },
332};
333static struct platform_device smc91x_device = {
334 .name = "smc91x",
335 .id = 0,
336 .num_resources = ARRAY_SIZE(smc91x_resources),
337 .resource = smc91x_resources,
61f09b5a
MH		 338 .dev = {
339 .platform_data = &smc91x_info,
340 },
59003145
MH		 341};
342#endif
343
344#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
345static struct resource dm9000_resources[] = {
346 [0] = {
347 .start = 0x203FB800,
da3854fc 348 .end = 0x203FB800 + 1,
59003145
MH		 349 .flags = IORESOURCE_MEM,
350 },
351 [1] = {
da3854fc
LP		 352 .start = 0x203FB800 + 4,
353 .end = 0x203FB800 + 5,
354 .flags = IORESOURCE_MEM,
355 },
356 [2] = {
59003145
MH		 357 .start = IRQ_PF9,
358 .end = IRQ_PF9,
359 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
360 },
361};
362
363static struct platform_device dm9000_device = {
364 .name = "dm9000",
365 .id = -1,
366 .num_resources = ARRAY_SIZE(dm9000_resources),
367 .resource = dm9000_resources,
368};
369#endif
370
59003145 371#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
02460d08
SZ		 372#include <linux/bfin_mac.h>
373static const unsigned short bfin_mac_peripherals[] = P_RMII0;
374
375static struct bfin_phydev_platform_data bfin_phydev_data[] = {
376 {
377 .addr = 1,
378 .irq = IRQ_MAC_PHYINT,
379 },
380};
381
382static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
383 .phydev_number = 1,
384 .phydev_data = bfin_phydev_data,
385 .phy_mode = PHY_INTERFACE_MODE_RMII,
386 .mac_peripherals = bfin_mac_peripherals,
387};
388
65319628
GY		 389static struct platform_device bfin_mii_bus = {
390 .name = "bfin_mii_bus",
02460d08
SZ		 391 .dev = {
392 .platform_data = &bfin_mii_bus_data,
393 }
65319628
GY		 394};
395
59003145
MH		 396static struct platform_device bfin_mac_device = {
397 .name = "bfin_mac",
02460d08
SZ		 398 .dev = {
399 .platform_data = &bfin_mii_bus,
400 }
59003145
MH		 401};
402#endif
403
404#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
405static struct resource net2272_bfin_resources[] = {
406 {
407 .start = 0x20300000,
408 .end = 0x20300000 + 0x100,
409 .flags = IORESOURCE_MEM,
410 }, {
411 .start = IRQ_PF7,
412 .end = IRQ_PF7,
413 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
414 },
415};
416
417static struct platform_device net2272_bfin_device = {
418 .name = "net2272",
419 .id = -1,
420 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
421 .resource = net2272_bfin_resources,
422};
423#endif
424
59003145
MH		 425#if defined(CONFIG_MTD_M25P80) \
426 || defined(CONFIG_MTD_M25P80_MODULE)
427static struct mtd_partition bfin_spi_flash_partitions[] = {
428 {
aa582977 429 .name = "bootloader(spi)",
ac76d889 430 .size = 0x00040000,
59003145
MH		 431 .offset = 0,
432 .mask_flags = MTD_CAP_ROM
433 }, {
aa582977 434 .name = "linux kernel(spi)",
edf05641
MF		 435 .size = MTDPART_SIZ_FULL,
436 .offset = MTDPART_OFS_APPEND,
59003145
MH		 437 }
438};
439
440static struct flash_platform_data bfin_spi_flash_data = {
441 .name = "m25p80",
442 .parts = bfin_spi_flash_partitions,
443 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 444 .type = "m25p16",
59003145
MH		 445};
446
447/* SPI flash chip (m25p64) */
448static struct bfin5xx_spi_chip spi_flash_chip_info = {
449 .enable_dma = 0, /* use dma transfer with this chip*/
450 .bits_per_word = 8,
451};
452#endif
453
a261eec0
MF		 454#if defined(CONFIG_BFIN_SPI_ADC) \
455 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 456/* SPI ADC chip */
457static struct bfin5xx_spi_chip spi_adc_chip_info = {
458 .enable_dma = 1, /* use dma transfer with this chip*/
459 .bits_per_word = 16,
460};
461#endif
462
7ba80063
BS		 463#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
464 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
59003145
MH		 465static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
466 .enable_dma = 0,
467 .bits_per_word = 16,
468};
469#endif
470
ffdf3ec8
YL		 471#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
472static struct bfin5xx_spi_chip mmc_spi_chip_info = {
473 .enable_dma = 0,
474 .bits_per_word = 8,
475};
476#endif
477
59003145
MH		 478#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
479static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
480 .enable_dma = 0,
481 .bits_per_word = 16,
482};
483
484static const struct ad7877_platform_data bfin_ad7877_ts_info = {
485 .model = 7877,
486 .vref_delay_usecs = 50, /* internal, no capacitor */
487 .x_plate_ohms = 419,
488 .y_plate_ohms = 486,
489 .pressure_max = 1000,
490 .pressure_min = 0,
491 .stopacq_polarity = 1,
492 .first_conversion_delay = 3,
493 .acquisition_time = 1,
494 .averaging = 1,
495 .pen_down_acc_interval = 1,
496};
497#endif
498
5105432a
MH		 499#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
500#include <linux/spi/ad7879.h>
501static const struct ad7879_platform_data bfin_ad7879_ts_info = {
502 .model = 7879, /* Model = AD7879 */
503 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
504 .pressure_max = 10000,
505 .pressure_min = 0,
506 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
507 .acquisition_time = 1, /* 4us acquisition time per sample */
508 .median = 2, /* do 8 measurements */
509 .averaging = 1, /* take the average of 4 middle samples */
510 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423 511 .gpio_export = 0, /* Export GPIO to gpiolib */
5105432a
MH		 512};
513#endif
514
515#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
516static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
517 .enable_dma = 0,
518 .bits_per_word = 16,
519};
520#endif
521
6e668936
MH		 522#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
523static struct bfin5xx_spi_chip spidev_chip_info = {
524 .enable_dma = 0,
525 .bits_per_word = 8,
526};
527#endif
528
336746ed
BS		 529#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
530static struct platform_device bfin_i2s = {
531 .name = "bfin-i2s",
532 .id = CONFIG_SND_BF5XX_SPORT_NUM,
533 /* TODO: add platform data here */
534};
535#endif
536
537#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
538static struct platform_device bfin_tdm = {
539 .name = "bfin-tdm",
540 .id = CONFIG_SND_BF5XX_SPORT_NUM,
541 /* TODO: add platform data here */
542};
543#endif
544
6924dfb0
MH		 545#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
546static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
547 .enable_dma = 0,
548 .bits_per_word = 8,
549};
550#endif
551
59003145
MH		 552static struct spi_board_info bfin_spi_board_info[] __initdata = {
553#if defined(CONFIG_MTD_M25P80) \
554 || defined(CONFIG_MTD_M25P80_MODULE)
555 {
556 /* the modalias must be the same as spi device driver name */
557 .modalias = "m25p80", /* Name of spi_driver for this device */
558 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
559 .bus_num = 0, /* Framework bus number */
560 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
561 .platform_data = &bfin_spi_flash_data,
562 .controller_data = &spi_flash_chip_info,
563 .mode = SPI_MODE_3,
564 },
565#endif
566
a261eec0
MF		 567#if defined(CONFIG_BFIN_SPI_ADC) \
568 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 569 {
570 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
571 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
572 .bus_num = 0, /* Framework bus number */
573 .chip_select = 1, /* Framework chip select. */
574 .platform_data = NULL, /* No spi_driver specific config */
575 .controller_data = &spi_adc_chip_info,
576 },
577#endif
578
7ba80063
BS		 579#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
580 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
59003145 581 {
7ba80063 582 .modalias = "ad183x",
59003145
MH		 583 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
584 .bus_num = 0,
7ba80063 585 .chip_select = 4,
59003145
MH		 586 .controller_data = &ad1836_spi_chip_info,
587 },
588#endif
ffdf3ec8
YL		 589#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
590 {
591 .modalias = "mmc_spi",
592 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
593 .bus_num = 0,
594 .chip_select = 3,
595 .controller_data = &mmc_spi_chip_info,
596 .mode = SPI_MODE_0,
597 },
598#endif
599
59003145
MH		 600#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
601 {
602 .modalias = "ad7877",
603 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 604 .irq = IRQ_PF8,
59003145 605 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 606 .bus_num = 0,
2eb74ae2 607 .chip_select = 2,
59003145
MH		 608 .controller_data = &spi_ad7877_chip_info,
609 },
610#endif
5105432a
MH		 611#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
612 {
613 .modalias = "ad7879",
614 .platform_data = &bfin_ad7879_ts_info,
615 .irq = IRQ_PF8,
616 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
617 .bus_num = 0,
618 .chip_select = 3,
619 .controller_data = &spi_ad7879_chip_info,
620 .mode = SPI_CPHA | SPI_CPOL,
621 },
622#endif
6e668936
MH		 623#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
624 {
625 .modalias = "spidev",
626 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
627 .bus_num = 0,
628 .chip_select = 1,
629 .controller_data = &spidev_chip_info,
630 },
631#endif
6924dfb0
MH		 632#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
633 {
634 .modalias = "bfin-lq035q1-spi",
635 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
636 .bus_num = 0,
637 .chip_select = 7,
638 .controller_data = &lq035q1_spi_chip_info,
639 .mode = SPI_CPHA | SPI_CPOL,
640 },
641#endif
59003145
MH		 642};
643
5bda2723 644#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
59003145
MH		 645/* SPI controller data */
646static struct bfin5xx_spi_master bfin_spi0_info = {
647 .num_chipselect = 8,
648 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 649 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 650};
651
652/* SPI (0) */
653static struct resource bfin_spi0_resource[] = {
654 [0] = {
655 .start = SPI0_REGBASE,
656 .end = SPI0_REGBASE + 0xFF,
657 .flags = IORESOURCE_MEM,
658 },
659 [1] = {
660 .start = CH_SPI,
661 .end = CH_SPI,
53122693
YL		 662 .flags = IORESOURCE_DMA,
663 },
664 [2] = {
665 .start = IRQ_SPI,
666 .end = IRQ_SPI,
59003145
MH		 667 .flags = IORESOURCE_IRQ,
668 },
669};
670
671static struct platform_device bfin_spi0_device = {
672 .name = "bfin-spi",
673 .id = 0, /* Bus number */
674 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
675 .resource = bfin_spi0_resource,
676 .dev = {
677 .platform_data = &bfin_spi0_info, /* Passed to driver */
678 },
679};
680#endif /* spi master and devices */
681
59003145 682#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
59003145 683#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 684static struct resource bfin_uart0_resources[] = {
59003145 685 {
6bd1fbea
SZ		 686 .start = UART0_THR,
687 .end = UART0_GCTL+2,
59003145
MH		 688 .flags = IORESOURCE_MEM,
689 },
6bd1fbea
SZ		 690 {
691 .start = IRQ_UART0_RX,
692 .end = IRQ_UART0_RX+1,
693 .flags = IORESOURCE_IRQ,
694 },
695 {
696 .start = IRQ_UART0_ERROR,
697 .end = IRQ_UART0_ERROR,
698 .flags = IORESOURCE_IRQ,
699 },
700 {
701 .start = CH_UART0_TX,
702 .end = CH_UART0_TX,
703 .flags = IORESOURCE_DMA,
704 },
705 {
706 .start = CH_UART0_RX,
707 .end = CH_UART0_RX,
708 .flags = IORESOURCE_DMA,
709 },
710};
711
712unsigned short bfin_uart0_peripherals[] = {
713 P_UART0_TX, P_UART0_RX, 0
714};
715
716static struct platform_device bfin_uart0_device = {
717 .name = "bfin-uart",
718 .id = 0,
719 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
720 .resource = bfin_uart0_resources,
721 .dev = {
722 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
723 },
724};
59003145
MH		 725#endif
726#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 727static struct resource bfin_uart1_resources[] = {
59003145 728 {
6bd1fbea
SZ		 729 .start = UART1_THR,
730 .end = UART1_GCTL+2,
59003145
MH		 731 .flags = IORESOURCE_MEM,
732 },
6bd1fbea
SZ		 733 {
734 .start = IRQ_UART1_RX,
735 .end = IRQ_UART1_RX+1,
736 .flags = IORESOURCE_IRQ,
737 },
738 {
739 .start = IRQ_UART1_ERROR,
740 .end = IRQ_UART1_ERROR,
741 .flags = IORESOURCE_IRQ,
742 },
743 {
744 .start = CH_UART1_TX,
745 .end = CH_UART1_TX,
746 .flags = IORESOURCE_DMA,
747 },
748 {
749 .start = CH_UART1_RX,
750 .end = CH_UART1_RX,
751 .flags = IORESOURCE_DMA,
752 },
753#ifdef CONFIG_BFIN_UART1_CTSRTS
754 { /* CTS pin */
755 .start = GPIO_PF9,
756 .end = GPIO_PF9,
757 .flags = IORESOURCE_IO,
758 },
759 { /* RTS pin */
760 .start = GPIO_PF10,
761 .end = GPIO_PF10,
762 .flags = IORESOURCE_IO,
763 },
59003145
MH		 764#endif
765};
766
6bd1fbea
SZ		 767unsigned short bfin_uart1_peripherals[] = {
768 P_UART1_TX, P_UART1_RX, 0
769};
770
771static struct platform_device bfin_uart1_device = {
59003145
MH		 772 .name = "bfin-uart",
773 .id = 1,
6bd1fbea
SZ		 774 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
775 .resource = bfin_uart1_resources,
776 .dev = {
777 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
778 },
59003145
MH		 779};
780#endif
6bd1fbea 781#endif
59003145 782
5be36d22 783#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 784#ifdef CONFIG_BFIN_SIR0
42bd8bcb 785static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 786 {
787 .start = 0xFFC00400,
788 .end = 0xFFC004FF,
789 .flags = IORESOURCE_MEM,
790 },
42bd8bcb
GY		 791 {
792 .start = IRQ_UART0_RX,
793 .end = IRQ_UART0_RX+1,
794 .flags = IORESOURCE_IRQ,
795 },
796 {
797 .start = CH_UART0_RX,
798 .end = CH_UART0_RX+1,
799 .flags = IORESOURCE_DMA,
800 },
801};
802
803static struct platform_device bfin_sir0_device = {
804 .name = "bfin_sir",
805 .id = 0,
806 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
807 .resource = bfin_sir0_resources,
808};
5be36d22
GY		 809#endif
810#ifdef CONFIG_BFIN_SIR1
42bd8bcb 811static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 812 {
813 .start = 0xFFC02000,
814 .end = 0xFFC020FF,
815 .flags = IORESOURCE_MEM,
816 },
42bd8bcb
GY		 817 {
818 .start = IRQ_UART1_RX,
819 .end = IRQ_UART1_RX+1,
820 .flags = IORESOURCE_IRQ,
821 },
822 {
823 .start = CH_UART1_RX,
824 .end = CH_UART1_RX+1,
825 .flags = IORESOURCE_DMA,
826 },
5be36d22
GY		 827};
828
42bd8bcb 829static struct platform_device bfin_sir1_device = {
5be36d22 830 .name = "bfin_sir",
42bd8bcb
GY		 831 .id = 1,
832 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
833 .resource = bfin_sir1_resources,
5be36d22
GY		 834};
835#endif
42bd8bcb 836#endif
5be36d22 837
59003145
MH		 838#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
839static struct resource bfin_twi0_resource[] = {
840 [0] = {
841 .start = TWI0_REGBASE,
842 .end = TWI0_REGBASE,
843 .flags = IORESOURCE_MEM,
844 },
845 [1] = {
846 .start = IRQ_TWI,
847 .end = IRQ_TWI,
848 .flags = IORESOURCE_IRQ,
849 },
850};
851
852static struct platform_device i2c_bfin_twi_device = {
853 .name = "i2c-bfin-twi",
854 .id = 0,
855 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
856 .resource = bfin_twi0_resource,
857};
858#endif
859
6924dfb0
MH		 860#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
861#include <linux/mfd/adp5520.h>
862
863 /*
864 * ADP5520/5501 LEDs Data
865 */
866
867static struct led_info adp5520_leds[] = {
868 {
869 .name = "adp5520-led1",
870 .default_trigger = "none",
871 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
872 },
873};
874
875static struct adp5520_leds_platform_data adp5520_leds_data = {
876 .num_leds = ARRAY_SIZE(adp5520_leds),
877 .leds = adp5520_leds,
878 .fade_in = ADP5520_FADE_T_600ms,
879 .fade_out = ADP5520_FADE_T_600ms,
880 .led_on_time = ADP5520_LED_ONT_600ms,
881};
882
883 /*
884 * ADP5520 Keypad Data
885 */
886
887static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
888 [ADP5520_KEY(3, 3)] = KEY_1,
889 [ADP5520_KEY(2, 3)] = KEY_2,
890 [ADP5520_KEY(1, 3)] = KEY_3,
891 [ADP5520_KEY(0, 3)] = KEY_UP,
892 [ADP5520_KEY(3, 2)] = KEY_4,
893 [ADP5520_KEY(2, 2)] = KEY_5,
894 [ADP5520_KEY(1, 2)] = KEY_6,
895 [ADP5520_KEY(0, 2)] = KEY_DOWN,
896 [ADP5520_KEY(3, 1)] = KEY_7,
897 [ADP5520_KEY(2, 1)] = KEY_8,
898 [ADP5520_KEY(1, 1)] = KEY_9,
899 [ADP5520_KEY(0, 1)] = KEY_DOT,
900 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
901 [ADP5520_KEY(2, 0)] = KEY_0,
902 [ADP5520_KEY(1, 0)] = KEY_HELP,
903 [ADP5520_KEY(0, 0)] = KEY_ENTER,
904};
905
906static struct adp5520_keys_platform_data adp5520_keys_data = {
907 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
908 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
909 .keymap = adp5520_keymap,
910 .keymapsize = ARRAY_SIZE(adp5520_keymap),
911 .repeat = 0,
912};
913
914 /*
eef35c2d 915 * ADP5520/5501 Multifunction Device Init Data
6924dfb0
MH		 916 */
917
918static struct adp5520_platform_data adp5520_pdev_data = {
919 .leds = &adp5520_leds_data,
920 .keys = &adp5520_keys_data,
921};
922
923#endif
924
72268689 925static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
ebd58333 926#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
72268689
BW		 927 {
928 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW		 929 },
930#endif
204844eb 931#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
72268689
BW		 932 {
933 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW		 934 .irq = IRQ_PF8,
935 },
936#endif
50c4c086
MH		 937#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
938 {
939 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
940 },
941#endif
6924dfb0
MH		 942#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
943 {
944 I2C_BOARD_INFO("ad7879", 0x2C),
945 .irq = IRQ_PF8,
946 .platform_data = (void *)&bfin_ad7879_ts_info,
947 },
948#endif
949#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
950 {
951 I2C_BOARD_INFO("pmic-adp5520", 0x32),
952 .irq = IRQ_PF9,
953 .platform_data = (void *)&adp5520_pdev_data,
954 },
955#endif
29bb3bc0
CC		 956#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
957 {
958 I2C_BOARD_INFO("ssm2602", 0x1b),
959 },
960#endif
39d3c1ca 961#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
962 {
963 I2C_BOARD_INFO("ad5252", 0x2f),
964 },
965#endif
624fab3b
SZ		 966#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
967 {
968 I2C_BOARD_INFO("adau1373", 0x1A),
969 },
970#endif
72268689 971};
72268689 972
59003145 973#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 974#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
975static struct resource bfin_sport0_uart_resources[] = {
976 {
977 .start = SPORT0_TCR1,
978 .end = SPORT0_MRCS3+4,
979 .flags = IORESOURCE_MEM,
980 },
981 {
982 .start = IRQ_SPORT0_RX,
983 .end = IRQ_SPORT0_RX+1,
984 .flags = IORESOURCE_IRQ,
985 },
986 {
987 .start = IRQ_SPORT0_ERROR,
988 .end = IRQ_SPORT0_ERROR,
989 .flags = IORESOURCE_IRQ,
990 },
991};
992
993unsigned short bfin_sport0_peripherals[] = {
994 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
995 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
996};
997
59003145
MH		 998static struct platform_device bfin_sport0_uart_device = {
999 .name = "bfin-sport-uart",
1000 .id = 0,
df5de261
SZ		 1001 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1002 .resource = bfin_sport0_uart_resources,
1003 .dev = {
1004 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1005 },
1006};
1007#endif
1008#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1009static struct resource bfin_sport1_uart_resources[] = {
1010 {
1011 .start = SPORT1_TCR1,
1012 .end = SPORT1_MRCS3+4,
1013 .flags = IORESOURCE_MEM,
1014 },
1015 {
1016 .start = IRQ_SPORT1_RX,
1017 .end = IRQ_SPORT1_RX+1,
1018 .flags = IORESOURCE_IRQ,
1019 },
1020 {
1021 .start = IRQ_SPORT1_ERROR,
1022 .end = IRQ_SPORT1_ERROR,
1023 .flags = IORESOURCE_IRQ,
1024 },
1025};
1026
1027unsigned short bfin_sport1_peripherals[] = {
1028 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1029 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
59003145
MH		 1030};
1031
1032static struct platform_device bfin_sport1_uart_device = {
1033 .name = "bfin-sport-uart",
1034 .id = 1,
df5de261
SZ		 1035 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1036 .resource = bfin_sport1_uart_resources,
1037 .dev = {
1038 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1039 },
59003145
MH		 1040};
1041#endif
df5de261 1042#endif
59003145 1043
1089e228 1044#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1089e228
MH		 1045#include <linux/gpio_keys.h>
1046
1047static struct gpio_keys_button bfin_gpio_keys_table[] = {
1048 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1049 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1050};
1051
1052static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1053 .buttons = bfin_gpio_keys_table,
1054 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1055};
1056
1057static struct platform_device bfin_device_gpiokeys = {
1058 .name = "gpio-keys",
1059 .dev = {
1060 .platform_data = &bfin_gpio_keys_data,
1061 },
1062};
1063#endif
1064
adfc0467 1065#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1066#include <asm/bfin_rotary.h>
1067
1068static struct bfin_rotary_platform_data bfin_rotary_data = {
1069 /*.rotary_up_key = KEY_UP,*/
1070 /*.rotary_down_key = KEY_DOWN,*/
1071 .rotary_rel_code = REL_WHEEL,
1072 .rotary_button_key = KEY_ENTER,
1073 .debounce = 10, /* 0..17 */
1074 .mode = ROT_QUAD_ENC | ROT_DEBE,
1075};
1076
1077static struct resource bfin_rotary_resources[] = {
1078 {
1079 .start = IRQ_CNT,
1080 .end = IRQ_CNT,
1081 .flags = IORESOURCE_IRQ,
1082 },
1083};
1084
1085static struct platform_device bfin_rotary_device = {
1086 .name = "bfin-rotary",
1087 .id = -1,
1088 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1089 .resource = bfin_rotary_resources,
1090 .dev = {
1091 .platform_data = &bfin_rotary_data,
1092 },
1093};
1094#endif
1095
14b03204
MH		 1096static const unsigned int cclk_vlev_datasheet[] =
1097{
1098 VRPAIR(VLEV_100, 400000000),
1099 VRPAIR(VLEV_105, 426000000),
1100 VRPAIR(VLEV_110, 500000000),
1101 VRPAIR(VLEV_115, 533000000),
1102 VRPAIR(VLEV_120, 600000000),
1103};
1104
1105static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1106 .tuple_tab = cclk_vlev_datasheet,
1107 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1108 .vr_settling_time = 25 /* us */,
1109};
1110
1111static struct platform_device bfin_dpmc = {
1112 .name = "bfin dpmc",
1113 .dev = {
1114 .platform_data = &bfin_dmpc_vreg_data,
1115 },
1116};
1117
59003145 1118static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1119
1120 &bfin_dpmc,
1121
64307f7d
MH		 1122#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1123 &bf5xx_nand_device,
1124#endif
1125
59003145
MH		 1126#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1127 &bfin_pcmcia_cf_device,
1128#endif
1129
1130#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1131 &rtc_device,
1132#endif
1133
3f375690
MH		 1134#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1135 &bfin_isp1760_device,
1136#endif
1137
1089e228
MH		 1138#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1139 &musb_device,
1140#endif
1141
59003145
MH		 1142#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1143 &smc91x_device,
1144#endif
1145
1146#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1147 &dm9000_device,
1148#endif
1149
1150#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1151 &bfin_mii_bus,
59003145
MH		 1152 &bfin_mac_device,
1153#endif
1154
1155#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1156 &net2272_bfin_device,
1157#endif
1158
1159#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1160 &bfin_spi0_device,
1161#endif
1162
1089e228
MH		 1163#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1164 &bf52x_t350mcqb_device,
1165#endif
1166
6924dfb0
MH		 1167#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1168 &bfin_lq035q1_device,
1169#endif
1170
59003145 1171#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1172#ifdef CONFIG_SERIAL_BFIN_UART0
1173 &bfin_uart0_device,
1174#endif
1175#ifdef CONFIG_SERIAL_BFIN_UART1
1176 &bfin_uart1_device,
1177#endif
59003145
MH		 1178#endif
1179
5be36d22 1180#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1181#ifdef CONFIG_BFIN_SIR0
1182 &bfin_sir0_device,
1183#endif
1184#ifdef CONFIG_BFIN_SIR1
1185 &bfin_sir1_device,
1186#endif
5be36d22
GY		 1187#endif
1188
59003145
MH		 1189#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1190 &i2c_bfin_twi_device,
1191#endif
1192
1193#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 1194#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
59003145 1195 &bfin_sport0_uart_device,
df5de261
SZ		 1196#endif
1197#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
59003145
MH		 1198 &bfin_sport1_uart_device,
1199#endif
df5de261 1200#endif
59003145 1201
1089e228
MH		 1202#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1203 &bfin_device_gpiokeys,
1204#endif
cad2ab65 1205
adfc0467 1206#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1207 &bfin_rotary_device,
1208#endif
1209
d7e5dd41
MH		 1210#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1211 &ezkit_flash_device,
1212#endif
336746ed
BS		 1213
1214#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1215 &bfin_i2s,
1216#endif
1217
1218#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1219 &bfin_tdm,
1220#endif
59003145
MH		 1221};
1222
7f6678c5 1223static int __init ezkit_init(void)
59003145 1224{
b85d858b 1225 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW		 1226 i2c_register_board_info(0, bfin_i2c_board_info,
1227 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1228 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1229 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH		 1230 return 0;
1231}
1232
7f6678c5 1233arch_initcall(ezkit_init);
59003145 1234
c13ce9fd
SZ		 1235static struct platform_device *ezkit_early_devices[] __initdata = {
1236#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1237#ifdef CONFIG_SERIAL_BFIN_UART0
1238 &bfin_uart0_device,
1239#endif
1240#ifdef CONFIG_SERIAL_BFIN_UART1
1241 &bfin_uart1_device,
1242#endif
1243#endif
1244
1245#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1246#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1247 &bfin_sport0_uart_device,
1248#endif
1249#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1250 &bfin_sport1_uart_device,
1251#endif
1252#endif
1253};
1254
1255void __init native_machine_early_platform_add_devices(void)
1256{
1257 printk(KERN_INFO "register early platform devices\n");
1258 early_platform_add_devices(ezkit_early_devices,
1259 ARRAY_SIZE(ezkit_early_devices));
1260}
1261
59003145
MH		 1262void native_machine_restart(char *cmd)
1263{
1264 /* workaround reboot hang when booting from SPI */
1265 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1266 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1267}
137b1529 1268
9862cc52 1269void bfin_get_ether_addr(char *addr)
137b1529 1270{
181afa94
MF		 1271 /* the MAC is stored in OTP memory page 0xDF */
1272 u32 ret;
1273 u64 otp_mac;
1274 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1275
1276 ret = otp_read(0xDF, 0x00, &otp_mac);
1277 if (!(ret & 0x1)) {
1278 char *otp_mac_p = (char *)&otp_mac;
1279 for (ret = 0; ret < 6; ++ret)
1280 addr[ret] = otp_mac_p[5 - ret];
1281 }
137b1529 1282}
9862cc52 1283EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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