[deliverable/linux.git] / arch / blackfin / mach-bf533 / boards / stamp.c

/*
 * File:         arch/blackfin/mach-bf533/stamp.c
 * Based on:     arch/blackfin/mach-bf533/ezkit.c
 * Author:       Aidan Williams <aidan@nicta.com.au>
 *
 * Created:      2005
 * Description:  Board Info File for the BF533-STAMP
 *
 * Modified:
 *               Copyright 2005 National ICT Australia (NICTA)
 *               Copyright 2004-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/pata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "ADDS-BF533-STAMP";

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

/*
 *  Driver needs to know address, irq and flag pin.
 */
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
};
#endif

#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
static struct platform_device bfin_fb_adv7393_device = {
	.name = "bfin-adv7393",
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF10,
		.end = IRQ_PF10,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "kernel",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_PBX)
static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
	.ctl_reg	= 0x4, /* send zero */
	.enable_dma	= 0,
	.bits_per_word	= 8,
	.cs_change_per_word = 1,
};
#endif

#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
static struct bfin5xx_spi_chip ad5304_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	.enable_dma = 1,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836-spi",
		.max_speed_hz = 31250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
	{
		.modalias = "spi_mmc_dummy",
		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 0,
		.platform_data = NULL,
		.controller_data = &spi_mmc_chip_info,
		.mode = SPI_MODE_3,
	},
	{
		.modalias = "spi_mmc",
		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SPI_MMC_CS_CHAN,
		.platform_data = NULL,
		.controller_data = &spi_mmc_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_PBX)
	{
		.modalias = "fxs-spi",
		.max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 8 - CONFIG_J11_JUMPER,
		.controller_data = &spi_si3xxx_chip_info,
		.mode = SPI_MODE_3,
	},
	{
		.modalias = "fxo-spi",
		.max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 8 - CONFIG_J19_JUMPER,
		.controller_data = &spi_si3xxx_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
	{
		.modalias = "ad5304_spi",
		.max_speed_hz = 1000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 2,
		.platform_data = NULL,
		.controller_data = &ad5304_chip_info,
		.mode = SPI_MODE_2,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_IRQ,
	}
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
	.name = "bf537-fb",
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
};

static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
};
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	55

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 1,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x20314020,
		.end = 0x2031403F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2031401C,
		.end = 0x2031401F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

static struct platform_device *stamp_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
	&bfin_fb_adv7393_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif
};

static int __init stamp_init(void)
{
	int ret;

	printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
	ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
	if (ret < 0)
		return ret;

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
# if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
	/* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
	bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN));
	bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
	SSYNC();
# endif
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info,
				ARRAY_SIZE(bfin_spi_board_info));
#endif
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(stamp_init);

void native_machine_restart(char *cmd)
{
#if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
# define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
	bfin_write_FIO_INEN(~BIT_TO_SET);
	bfin_write_FIO_DIR(BIT_TO_SET);
	bfin_write_FIO_FLAG_C(BIT_TO_SET);
#endif
}
Commit	Line	Data
1394f032 BW	1	/*
	2	* File: arch/blackfin/mach-bf533/stamp.c
	3	* Based on: arch/blackfin/mach-bf533/ezkit.c
	4	* Author: Aidan Williams <aidan@nicta.com.au>
	5	*
	6	* Created: 2005
	7	* Description: Board Info File for the BF533-STAMP
	8	*
	9	* Modified:
	10	* Copyright 2005 National ICT Australia (NICTA)
	11	* Copyright 2004-2006 Analog Devices Inc.
	12	*
	13	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	14	*
	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License as published by
	17	* the Free Software Foundation; either version 2 of the License, or
	18	* (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, see the file COPYING, or write
	27	* to the Free Software Foundation, Inc.,
	28	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	29	*/
	30
	31	#include <linux/device.h>
	32	#include <linux/platform_device.h>
	33	#include <linux/mtd/mtd.h>
	34	#include <linux/mtd/partitions.h>
	35	#include <linux/spi/spi.h>
	36	#include <linux/spi/flash.h>
	37	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	38	#include <linux/usb/isp1362.h>
1394f032	39	#endif
c6c4d7bb	40	#include <linux/pata_platform.h>
1f83b8f1	41	#include <linux/irq.h>
c6c4d7bb	42	#include <asm/dma.h>
1394f032	43	#include <asm/bfin5xx_spi.h>
c6c4d7bb	44	#include <asm/reboot.h>
5d448dd5	45	#include <asm/portmux.h>
1394f032 BW	46
	47	/*
	48	* Name the Board for the /proc/cpuinfo
	49	*/
066954a3	50	const char bfin_board_name[] = "ADDS-BF533-STAMP";
1394f032 BW	51
	52	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	53	static struct platform_device rtc_device = {
	54	.name = "rtc-bfin",
	55	.id = -1,
	56	};
	57	#endif
	58
	59	/*
	60	* Driver needs to know address, irq and flag pin.
	61	*/
	62	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	63	static struct resource smc91x_resources[] = {
	64	{
	65	.name = "smc91x-regs",
	66	.start = 0x20300300,
	67	.end = 0x20300300 + 16,
	68	.flags = IORESOURCE_MEM,
1f83b8f1	69	}, {
1394f032 BW	70	.start = IRQ_PF7,
	71	.end = IRQ_PF7,
	72	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	73	},
	74	};
	75
	76	static struct platform_device smc91x_device = {
	77	.name = "smc91x",
	78	.id = 0,
	79	.num_resources = ARRAY_SIZE(smc91x_resources),
	80	.resource = smc91x_resources,
	81	};
	82	#endif
	83
c6c4d7bb BW	84	#if defined(CONFIG_FB_BFIN_7393) \|\| defined(CONFIG_FB_BFIN_7393_MODULE)
	85	static struct platform_device bfin_fb_adv7393_device = {
	86	.name = "bfin-adv7393",
	87	};
	88	#endif
	89
1394f032 BW	90	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	91	static struct resource net2272_bfin_resources[] = {
	92	{
	93	.start = 0x20300000,
	94	.end = 0x20300000 + 0x100,
	95	.flags = IORESOURCE_MEM,
1f83b8f1	96	}, {
1394f032 BW	97	.start = IRQ_PF10,
	98	.end = IRQ_PF10,
	99	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	100	},
	101	};
	102
	103	static struct platform_device net2272_bfin_device = {
	104	.name = "net2272",
	105	.id = -1,
	106	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	107	.resource = net2272_bfin_resources,
	108	};
	109	#endif
	110
	111	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	112	/* all SPI peripherals info goes here */
	113
	114	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	115	static struct mtd_partition bfin_spi_flash_partitions[] = {
	116	{
	117	.name = "bootloader",
	118	.size = 0x00020000,
	119	.offset = 0,
	120	.mask_flags = MTD_CAP_ROM
1f83b8f1	121	}, {
1394f032 BW	122	.name = "kernel",
	123	.size = 0xe0000,
	124	.offset = 0x20000
1f83b8f1	125	}, {
1394f032 BW	126	.name = "file system",
	127	.size = 0x700000,
	128	.offset = 0x00100000,
	129	}
	130	};
	131
	132	static struct flash_platform_data bfin_spi_flash_data = {
	133	.name = "m25p80",
	134	.parts = bfin_spi_flash_partitions,
	135	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	136	.type = "m25p64",
	137	};
	138
	139	/* SPI flash chip (m25p64) */
	140	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	141	.enable_dma = 0, /* use dma transfer with this chip*/
	142	.bits_per_word = 8,
	143	};
	144	#endif
	145
	146	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	147	/* SPI ADC chip */
	148	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	149	.enable_dma = 1, /* use dma transfer with this chip*/
	150	.bits_per_word = 16,
	151	};
	152	#endif
	153
	154	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	155	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	156	.enable_dma = 0,
	157	.bits_per_word = 16,
	158	};
	159	#endif
	160
	161	#if defined(CONFIG_PBX)
	162	static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
	163	.ctl_reg = 0x4, /* send zero */
	164	.enable_dma = 0,
	165	.bits_per_word = 8,
	166	.cs_change_per_word = 1,
	167	};
	168	#endif
	169
	170	#if defined(CONFIG_AD5304) \|\| defined(CONFIG_AD5304_MODULE)
	171	static struct bfin5xx_spi_chip ad5304_chip_info = {
	172	.enable_dma = 0,
	173	.bits_per_word = 16,
	174	};
	175	#endif
	176
ed2fbf57 BW	177	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	178	static struct bfin5xx_spi_chip spi_mmc_chip_info = {
	179	.enable_dma = 1,
	180	.bits_per_word = 8,
	181	};
	182	#endif
	183
1394f032 BW	184	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	185	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	186	{
	187	/* the modalias must be the same as spi device driver name */
	188	.modalias = "m25p80", /* Name of spi_driver for this device */
	189	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	190	.bus_num = 0, /* Framework bus number */
1394f032 BW	191	.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
	192	.platform_data = &bfin_spi_flash_data,
	193	.controller_data = &spi_flash_chip_info,
	194	.mode = SPI_MODE_3,
	195	},
	196	#endif
	197
	198	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	199	{
	200	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	201	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	202	.bus_num = 0, /* Framework bus number */
1394f032 BW	203	.chip_select = 1, /* Framework chip select. */
	204	.platform_data = NULL, /* No spi_driver specific config */
	205	.controller_data = &spi_adc_chip_info,
	206	},
	207	#endif
	208
	209	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	210	{
	211	.modalias = "ad1836-spi",
	212	.max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	213	.bus_num = 0,
1394f032 BW	214	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	215	.controller_data = &ad1836_spi_chip_info,
	216	},
	217	#endif
	218
ed2fbf57 BW	219	#if defined(CONFIG_SPI_MMC) \|\| defined(CONFIG_SPI_MMC_MODULE)
	220	{
	221	.modalias = "spi_mmc_dummy",
111cf97d	222	.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	223	.bus_num = 0,
ed2fbf57 BW	224	.chip_select = 0,
	225	.platform_data = NULL,
	226	.controller_data = &spi_mmc_chip_info,
	227	.mode = SPI_MODE_3,
	228	},
	229	{
	230	.modalias = "spi_mmc",
111cf97d	231	.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	232	.bus_num = 0,
ed2fbf57 BW	233	.chip_select = CONFIG_SPI_MMC_CS_CHAN,
	234	.platform_data = NULL,
	235	.controller_data = &spi_mmc_chip_info,
	236	.mode = SPI_MODE_3,
	237	},
	238	#endif
	239
1394f032 BW	240	#if defined(CONFIG_PBX)
1394f032 BW	241	{
1f83b8f1 MF	242	.modalias = "fxs-spi",
1f83b8f1 MF	243	.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb BW	244	.bus_num = 0,
c6c4d7bb BW	245	.chip_select = 8 - CONFIG_J11_JUMPER,
1f83b8f1	246	.controller_data = &spi_si3xxx_chip_info,
1394f032 BW	247	.mode = SPI_MODE_3,
	248	},
	249	{
1f83b8f1 MF	250	.modalias = "fxo-spi",
1f83b8f1 MF	251	.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb BW	252	.bus_num = 0,
c6c4d7bb BW	253	.chip_select = 8 - CONFIG_J19_JUMPER,
1f83b8f1	254	.controller_data = &spi_si3xxx_chip_info,
1394f032 BW	255	.mode = SPI_MODE_3,
	256	},
	257	#endif
	258
	259	#if defined(CONFIG_AD5304) \|\| defined(CONFIG_AD5304_MODULE)
	260	{
	261	.modalias = "ad5304_spi",
	262	.max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	263	.bus_num = 0,
1394f032 BW	264	.chip_select = 2,
	265	.platform_data = NULL,
	266	.controller_data = &ad5304_chip_info,
	267	.mode = SPI_MODE_2,
	268	},
	269	#endif
	270	};
	271
c6c4d7bb BW	272	/* SPI (0) */
	273	static struct resource bfin_spi0_resource[] = {
	274	[0] = {
	275	.start = SPI0_REGBASE,
	276	.end = SPI0_REGBASE + 0xFF,
	277	.flags = IORESOURCE_MEM,
	278	},
	279	[1] = {
	280	.start = CH_SPI,
	281	.end = CH_SPI,
	282	.flags = IORESOURCE_IRQ,
	283	}
	284	};
	285
1394f032	286	/* SPI controller data */
c6c4d7bb	287	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	288	.num_chipselect = 8,
1394f032 BW	289	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	290	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	291	};
1394f032 BW	292
c6c4d7bb BW	293	static struct platform_device bfin_spi0_device = {
	294	.name = "bfin-spi",
	295	.id = 0, /* Bus number */
	296	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	297	.resource = bfin_spi0_resource,
1394f032	298	.dev = {
c6c4d7bb	299	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	300	},
	301	};
	302	#endif /* spi master and devices */
	303
	304	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	305	static struct platform_device bfin_fb_device = {
	306	.name = "bf537-fb",
	307	};
	308	#endif
	309
	310	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	311	static struct resource bfin_uart_resources[] = {
	312	{
	313	.start = 0xFFC00400,
	314	.end = 0xFFC004FF,
	315	.flags = IORESOURCE_MEM,
	316	},
	317	};
	318
	319	static struct platform_device bfin_uart_device = {
	320	.name = "bfin-uart",
	321	.id = 1,
	322	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	323	.resource = bfin_uart_resources,
	324	};
	325	#endif
	326
	327	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	328	static struct platform_device bfin_sport0_uart_device = {
	329	.name = "bfin-sport-uart",
	330	.id = 0,
	331	};
	332
	333	static struct platform_device bfin_sport1_uart_device = {
	334	.name = "bfin-sport-uart",
	335	.id = 1,
	336	};
	337	#endif
	338
c6c4d7bb BW	339	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	340	#define PATA_INT 55
	341
	342	static struct pata_platform_info bfin_pata_platform_data = {
	343	.ioport_shift = 1,
	344	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	345	};
	346
	347	static struct resource bfin_pata_resources[] = {
	348	{
	349	.start = 0x20314020,
	350	.end = 0x2031403F,
	351	.flags = IORESOURCE_MEM,
	352	},
	353	{
	354	.start = 0x2031401C,
	355	.end = 0x2031401F,
	356	.flags = IORESOURCE_MEM,
	357	},
	358	{
	359	.start = PATA_INT,
	360	.end = PATA_INT,
	361	.flags = IORESOURCE_IRQ,
	362	},
	363	};
	364
	365	static struct platform_device bfin_pata_device = {
	366	.name = "pata_platform",
	367	.id = -1,
	368	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	369	.resource = bfin_pata_resources,
	370	.dev = {
	371	.platform_data = &bfin_pata_platform_data,
	372	}
	373	};
	374	#endif
	375
1394f032 BW	376	static struct platform_device *stamp_devices[] __initdata = {
	377	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	378	&rtc_device,
	379	#endif
	380
	381	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	382	&smc91x_device,
	383	#endif
	384
c6c4d7bb BW	385	#if defined(CONFIG_FB_BFIN_7393) \|\| defined(CONFIG_FB_BFIN_7393_MODULE)
	386	&bfin_fb_adv7393_device,
	387	#endif
	388
1394f032 BW	389	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	390	&net2272_bfin_device,
	391	#endif
	392
	393	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb	394	&bfin_spi0_device,
1394f032 BW	395	#endif
	396
	397	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	398	&bfin_uart_device,
	399	#endif
	400
	401	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	402	&bfin_sport0_uart_device,
	403	&bfin_sport1_uart_device,
	404	#endif
c6c4d7bb BW	405
	406	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	407	&bfin_pata_device,
	408	#endif
1394f032 BW	409	};
	410
	411	static int __init stamp_init(void)
	412	{
c0fc525d MF	413	int ret;
c0fc525d MF	414
1394f032	415	printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
c0fc525d MF	416	ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
	417	if (ret < 0)
	418	return ret;
	419
	420	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	421	# if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
	422	/* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
	423	bfin_write_FIO_DIR(bfin_read_FIO_DIR() \| (1 << CONFIG_ENET_FLASH_PIN));
	424	bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
	425	SSYNC();
	426	# endif
	427	#endif
	428
1394f032	429	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb BW	430	spi_register_board_info(bfin_spi_board_info,
	431	ARRAY_SIZE(bfin_spi_board_info));
	432	#endif
	433	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	434	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
1394f032	435	#endif
c6c4d7bb	436	return 0;
1394f032 BW	437	}
	438
	439	arch_initcall(stamp_init);
c6c4d7bb BW	440
	441	void native_machine_restart(char *cmd)
	442	{
	443	#if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
	444	# define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
	445	bfin_write_FIO_INEN(~BIT_TO_SET);
	446	bfin_write_FIO_DIR(BIT_TO_SET);
	447	bfin_write_FIO_FLAG_C(BIT_TO_SET);
	448	#endif
	449	}