projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Blackfin: bf527-ezkit: add support for V2.1 boards
[deliverable/linux.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032 11#include <linux/platform_device.h>
6e364755 12#include <linux/io.h>
1394f032 13#include <linux/mtd/mtd.h>
fc68911e 14#include <linux/mtd/nand.h>
1394f032 15#include <linux/mtd/partitions.h>
fc68911e 16#include <linux/mtd/plat-ram.h>
de8c43f2 17#include <linux/mtd/physmap.h>
1394f032
BW		 18#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 21#include <linux/usb/isp1362.h>
1394f032 22#endif
0a87e3e9 23#include <linux/ata_platform.h>
1394f032
BW		 24#include <linux/irq.h>
25#include <linux/interrupt.h>
81d9c7f2 26#include <linux/i2c.h>
27f5d75a 27#include <linux/usb/sl811.h>
f79ea4cb 28#include <linux/spi/mmc_spi.h>
78756c62
MH		 29#include <linux/leds.h>
30#include <linux/input.h>
c6c4d7bb 31#include <asm/dma.h>
1f83b8f1 32#include <asm/bfin5xx_spi.h>
c6c4d7bb 33#include <asm/reboot.h>
5d448dd5 34#include <asm/portmux.h>
14b03204 35#include <asm/dpmc.h>
1394f032
BW		 36
37/*
38 * Name the Board for the /proc/cpuinfo
39 */
fe85cad2 40const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 41
42/*
43 * Driver needs to know address, irq and flag pin.
44 */
45
1394f032 46#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 47#include <linux/usb/isp1760.h>
48static struct resource bfin_isp1760_resources[] = {
1394f032 49 [0] = {
3f375690
MH		 50 .start = 0x203C0000,
51 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
3f375690
MH		 55 .start = IRQ_PF7,
56 .end = IRQ_PF7,
6a6be3d1 57 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 58 },
59};
60
3f375690
MH		 61static struct isp1760_platform_data isp1760_priv = {
62 .is_isp1761 = 0,
3f375690
MH		 63 .bus_width_16 = 1,
64 .port1_otg = 0,
65 .analog_oc = 0,
66 .dack_polarity_high = 0,
67 .dreq_polarity_high = 0,
1394f032
BW		 68};
69
3f375690 70static struct platform_device bfin_isp1760_device = {
c6feb768 71 .name = "isp1760",
3f375690
MH		 72 .id = 0,
73 .dev = {
74 .platform_data = &isp1760_priv,
75 },
76 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
77 .resource = bfin_isp1760_resources,
1394f032 78};
1394f032
BW		 79#endif
80
2463ef22 81#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2463ef22
MH		 82#include <linux/gpio_keys.h>
83
84static struct gpio_keys_button bfin_gpio_keys_table[] = {
85 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
86 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
87 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
88 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
89};
90
91static struct gpio_keys_platform_data bfin_gpio_keys_data = {
92 .buttons = bfin_gpio_keys_table,
93 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
94};
95
96static struct platform_device bfin_device_gpiokeys = {
97 .name = "gpio-keys",
98 .dev = {
99 .platform_data = &bfin_gpio_keys_data,
100 },
101};
102#endif
103
1394f032
BW		 104#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
105static struct resource bfin_pcmcia_cf_resources[] = {
106 {
107 .start = 0x20310000, /* IO PORT */
108 .end = 0x20312000,
109 .flags = IORESOURCE_MEM,
1f83b8f1 110 }, {
d2d50aa9 111 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 112 .end = 0x20311FFF,
113 .flags = IORESOURCE_MEM,
1f83b8f1 114 }, {
1394f032
BW		 115 .start = IRQ_PF4,
116 .end = IRQ_PF4,
117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 118 }, {
1394f032
BW		 119 .start = 6, /* Card Detect PF6 */
120 .end = 6,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct platform_device bfin_pcmcia_cf_device = {
126 .name = "bfin_cf_pcmcia",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
129 .resource = bfin_pcmcia_cf_resources,
130};
131#endif
132
133#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
134static struct platform_device rtc_device = {
135 .name = "rtc-bfin",
136 .id = -1,
137};
138#endif
139
140#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 141#include <linux/smc91x.h>
142
143static struct smc91x_platdata smc91x_info = {
144 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
145 .leda = RPC_LED_100_10,
146 .ledb = RPC_LED_TX_RX,
147};
148
1394f032
BW		 149static struct resource smc91x_resources[] = {
150 {
151 .name = "smc91x-regs",
152 .start = 0x20300300,
153 .end = 0x20300300 + 16,
154 .flags = IORESOURCE_MEM,
1f83b8f1 155 }, {
1394f032
BW		 156
157 .start = IRQ_PF7,
158 .end = IRQ_PF7,
159 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
160 },
161};
162static struct platform_device smc91x_device = {
163 .name = "smc91x",
164 .id = 0,
165 .num_resources = ARRAY_SIZE(smc91x_resources),
166 .resource = smc91x_resources,
61f09b5a
MH		 167 .dev = {
168 .platform_data = &smc91x_info,
169 },
1394f032
BW		 170};
171#endif
172
f40d24d9
AL		 173#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
174static struct resource dm9000_resources[] = {
175 [0] = {
176 .start = 0x203FB800,
b3dec4a4 177 .end = 0x203FB800 + 1,
f40d24d9
AL		 178 .flags = IORESOURCE_MEM,
179 },
180 [1] = {
b3dec4a4
BS		 181 .start = 0x203FB804,
182 .end = 0x203FB804 + 1,
183 .flags = IORESOURCE_MEM,
184 },
185 [2] = {
f40d24d9
AL		 186 .start = IRQ_PF9,
187 .end = IRQ_PF9,
188 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
189 },
190};
191
192static struct platform_device dm9000_device = {
193 .name = "dm9000",
194 .id = -1,
195 .num_resources = ARRAY_SIZE(dm9000_resources),
196 .resource = dm9000_resources,
197};
198#endif
199
1394f032
BW		 200#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
201static struct resource sl811_hcd_resources[] = {
202 {
203 .start = 0x20340000,
204 .end = 0x20340000,
205 .flags = IORESOURCE_MEM,
1f83b8f1 206 }, {
1394f032
BW		 207 .start = 0x20340004,
208 .end = 0x20340004,
209 .flags = IORESOURCE_MEM,
1f83b8f1 210 }, {
1394f032
BW		 211 .start = CONFIG_USB_SL811_BFIN_IRQ,
212 .end = CONFIG_USB_SL811_BFIN_IRQ,
213 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
214 },
215};
216
217#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
218void sl811_port_power(struct device *dev, int is_on)
219{
c6c4d7bb 220 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 221 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 222}
223#endif
224
225static struct sl811_platform_data sl811_priv = {
226 .potpg = 10,
227 .power = 250, /* == 500mA */
228#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
229 .port_power = &sl811_port_power,
230#endif
231};
232
233static struct platform_device sl811_hcd_device = {
234 .name = "sl811-hcd",
235 .id = 0,
236 .dev = {
237 .platform_data = &sl811_priv,
238 },
239 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
240 .resource = sl811_hcd_resources,
241};
242#endif
243
244#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
245static struct resource isp1362_hcd_resources[] = {
246 {
247 .start = 0x20360000,
248 .end = 0x20360000,
249 .flags = IORESOURCE_MEM,
1f83b8f1 250 }, {
1394f032
BW		 251 .start = 0x20360004,
252 .end = 0x20360004,
253 .flags = IORESOURCE_MEM,
1f83b8f1 254 }, {
21b03cfe
MF		 255 .start = IRQ_PF3,
256 .end = IRQ_PF3,
1394f032
BW		 257 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
258 },
259};
260
261static struct isp1362_platform_data isp1362_priv = {
262 .sel15Kres = 1,
263 .clknotstop = 0,
264 .oc_enable = 0,
265 .int_act_high = 0,
266 .int_edge_triggered = 0,
267 .remote_wakeup_connected = 0,
268 .no_power_switching = 1,
269 .power_switching_mode = 0,
270};
271
272static struct platform_device isp1362_hcd_device = {
273 .name = "isp1362-hcd",
274 .id = 0,
275 .dev = {
276 .platform_data = &isp1362_priv,
277 },
278 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
279 .resource = isp1362_hcd_resources,
280};
281#endif
282
706a01b1
BS		 283#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
284unsigned short bfin_can_peripherals[] = {
285 P_CAN0_RX, P_CAN0_TX, 0
286};
287
288static struct resource bfin_can_resources[] = {
289 {
290 .start = 0xFFC02A00,
291 .end = 0xFFC02FFF,
292 .flags = IORESOURCE_MEM,
293 },
294 {
295 .start = IRQ_CAN_RX,
296 .end = IRQ_CAN_RX,
297 .flags = IORESOURCE_IRQ,
298 },
299 {
300 .start = IRQ_CAN_TX,
301 .end = IRQ_CAN_TX,
302 .flags = IORESOURCE_IRQ,
303 },
304 {
305 .start = IRQ_CAN_ERROR,
306 .end = IRQ_CAN_ERROR,
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct platform_device bfin_can_device = {
312 .name = "bfin_can",
313 .num_resources = ARRAY_SIZE(bfin_can_resources),
314 .resource = bfin_can_resources,
315 .dev = {
316 .platform_data = &bfin_can_peripherals, /* Passed to driver */
317 },
318};
319#endif
320
1394f032 321#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 322static struct platform_device bfin_mii_bus = {
323 .name = "bfin_mii_bus",
324};
325
1394f032
BW		 326static struct platform_device bfin_mac_device = {
327 .name = "bfin_mac",
65319628 328 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 329};
330#endif
331
332#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
333static struct resource net2272_bfin_resources[] = {
334 {
335 .start = 0x20300000,
336 .end = 0x20300000 + 0x100,
337 .flags = IORESOURCE_MEM,
1f83b8f1 338 }, {
1394f032
BW		 339 .start = IRQ_PF7,
340 .end = IRQ_PF7,
341 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
342 },
343};
344
345static struct platform_device net2272_bfin_device = {
346 .name = "net2272",
347 .id = -1,
348 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
349 .resource = net2272_bfin_resources,
350};
351#endif
352
fc68911e
MF		 353#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
354#ifdef CONFIG_MTD_PARTITIONS
355const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
356
357static struct mtd_partition bfin_plat_nand_partitions[] = {
358 {
aa582977 359 .name = "linux kernel(nand)",
fc68911e
MF		 360 .size = 0x400000,
361 .offset = 0,
362 }, {
aa582977 363 .name = "file system(nand)",
fc68911e
MF		 364 .size = MTDPART_SIZ_FULL,
365 .offset = MTDPART_OFS_APPEND,
366 },
367};
368#endif
369
370#define BFIN_NAND_PLAT_CLE 2
371#define BFIN_NAND_PLAT_ALE 1
372static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
373{
374 struct nand_chip *this = mtd->priv;
375
376 if (cmd == NAND_CMD_NONE)
377 return;
378
379 if (ctrl & NAND_CLE)
380 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
381 else
382 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
383}
384
385#define BFIN_NAND_PLAT_READY GPIO_PF3
386static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
387{
388 return gpio_get_value(BFIN_NAND_PLAT_READY);
389}
390
391static struct platform_nand_data bfin_plat_nand_data = {
392 .chip = {
393 .chip_delay = 30,
394#ifdef CONFIG_MTD_PARTITIONS
395 .part_probe_types = part_probes,
396 .partitions = bfin_plat_nand_partitions,
397 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
398#endif
399 },
400 .ctrl = {
401 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
402 .dev_ready = bfin_plat_nand_dev_ready,
403 },
404};
405
406#define MAX(x, y) (x > y ? x : y)
407static struct resource bfin_plat_nand_resources = {
408 .start = 0x20212000,
409 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
410 .flags = IORESOURCE_IO,
411};
412
413static struct platform_device bfin_async_nand_device = {
414 .name = "gen_nand",
415 .id = -1,
416 .num_resources = 1,
417 .resource = &bfin_plat_nand_resources,
418 .dev = {
419 .platform_data = &bfin_plat_nand_data,
420 },
421};
422
423static void bfin_plat_nand_init(void)
424{
425 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
426}
427#else
428static void bfin_plat_nand_init(void) {}
429#endif
430
793dc27b 431#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 432static struct mtd_partition stamp_partitions[] = {
433 {
aa582977 434 .name = "bootloader(nor)",
edf05641 435 .size = 0x40000,
de8c43f2
MF		 436 .offset = 0,
437 }, {
aa582977 438 .name = "linux kernel(nor)",
6ecb5b6d 439 .size = 0x180000,
de8c43f2
MF		 440 .offset = MTDPART_OFS_APPEND,
441 }, {
aa582977 442 .name = "file system(nor)",
6ecb5b6d 443 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 444 .offset = MTDPART_OFS_APPEND,
445 }, {
aa582977 446 .name = "MAC Address(nor)",
de8c43f2
MF		 447 .size = MTDPART_SIZ_FULL,
448 .offset = 0x3F0000,
449 .mask_flags = MTD_WRITEABLE,
450 }
451};
452
453static struct physmap_flash_data stamp_flash_data = {
454 .width = 2,
455 .parts = stamp_partitions,
456 .nr_parts = ARRAY_SIZE(stamp_partitions),
457};
458
459static struct resource stamp_flash_resource = {
460 .start = 0x20000000,
461 .end = 0x203fffff,
462 .flags = IORESOURCE_MEM,
463};
464
465static struct platform_device stamp_flash_device = {
466 .name = "physmap-flash",
467 .id = 0,
468 .dev = {
469 .platform_data = &stamp_flash_data,
470 },
471 .num_resources = 1,
472 .resource = &stamp_flash_resource,
473};
793dc27b 474#endif
de8c43f2 475
1394f032
BW		 476#if defined(CONFIG_MTD_M25P80) \
477 || defined(CONFIG_MTD_M25P80_MODULE)
478static struct mtd_partition bfin_spi_flash_partitions[] = {
479 {
aa582977 480 .name = "bootloader(spi)",
edf05641 481 .size = 0x00040000,
1394f032
BW		 482 .offset = 0,
483 .mask_flags = MTD_CAP_ROM
1f83b8f1 484 }, {
aa582977 485 .name = "linux kernel(spi)",
6ecb5b6d 486 .size = 0x180000,
edf05641 487 .offset = MTDPART_OFS_APPEND,
1f83b8f1 488 }, {
aa582977 489 .name = "file system(spi)",
edf05641
MF		 490 .size = MTDPART_SIZ_FULL,
491 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 492 }
493};
494
495static struct flash_platform_data bfin_spi_flash_data = {
496 .name = "m25p80",
497 .parts = bfin_spi_flash_partitions,
498 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 499 /* .type = "m25p64", */
1394f032
BW		 500};
501
502/* SPI flash chip (m25p64) */
503static struct bfin5xx_spi_chip spi_flash_chip_info = {
504 .enable_dma = 0, /* use dma transfer with this chip*/
505 .bits_per_word = 8,
506};
507#endif
508
a261eec0
MF		 509#if defined(CONFIG_BFIN_SPI_ADC) \
510 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 511/* SPI ADC chip */
512static struct bfin5xx_spi_chip spi_adc_chip_info = {
513 .enable_dma = 1, /* use dma transfer with this chip*/
514 .bits_per_word = 16,
515};
516#endif
517
8312440e
BS		 518#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
519 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032
BW		 520static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
521 .enable_dma = 0,
522 .bits_per_word = 16,
523};
524#endif
525
d4b834c1
BS		 526#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
527 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
528static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
529 .enable_dma = 0,
530 .bits_per_word = 8,
d4b834c1
BS		 531};
532#endif
533
5b7c5775 534#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 535#include <linux/input/ad714x.h>
536static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
537 .enable_dma = 0,
538 .bits_per_word = 16,
539};
540
5b7c5775 541static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
427f277e
BS		 542 {
543 .start_stage = 0,
544 .end_stage = 7,
545 .max_coord = 128,
546 },
547};
548
5b7c5775 549static struct ad714x_button_plat ad7147_spi_button_plat[] = {
427f277e
BS		 550 {
551 .keycode = BTN_FORWARD,
552 .l_mask = 0,
553 .h_mask = 0x600,
554 },
555 {
556 .keycode = BTN_LEFT,
557 .l_mask = 0,
558 .h_mask = 0x500,
559 },
560 {
561 .keycode = BTN_MIDDLE,
562 .l_mask = 0,
563 .h_mask = 0x800,
564 },
565 {
566 .keycode = BTN_RIGHT,
567 .l_mask = 0x100,
568 .h_mask = 0x400,
569 },
570 {
571 .keycode = BTN_BACK,
572 .l_mask = 0x200,
573 .h_mask = 0x400,
574 },
575};
5b7c5775 576static struct ad714x_platform_data ad7147_spi_platform_data = {
427f277e
BS		 577 .slider_num = 1,
578 .button_num = 5,
5b7c5775
MF		 579 .slider = ad7147_spi_slider_plat,
580 .button = ad7147_spi_button_plat,
427f277e
BS		 581 .stage_cfg_reg = {
582 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
583 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
584 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
585 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
586 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
587 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
588 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
589 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
590 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
591 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
592 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
593 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
594 },
595 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
596};
597#endif
598
5b7c5775 599#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
427f277e 600#include <linux/input/ad714x.h>
5b7c5775 601static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
427f277e
BS		 602 {
603 .keycode = BTN_1,
604 .l_mask = 0,
605 .h_mask = 0x1,
606 },
607 {
608 .keycode = BTN_2,
609 .l_mask = 0,
610 .h_mask = 0x2,
611 },
612 {
613 .keycode = BTN_3,
614 .l_mask = 0,
615 .h_mask = 0x4,
616 },
617 {
618 .keycode = BTN_4,
619 .l_mask = 0x0,
620 .h_mask = 0x8,
621 },
622};
5b7c5775 623static struct ad714x_platform_data ad7142_i2c_platform_data = {
427f277e 624 .button_num = 4,
5b7c5775 625 .button = ad7142_i2c_button_plat,
427f277e
BS		 626 .stage_cfg_reg = {
627 /* fixme: figure out right setting for all comoponent according
628 * to hardware feature of EVAL-AD7142EB board */
629 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
630 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
631 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
632 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
633 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
634 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
635 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
636 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
637 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 },
642 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
643};
644#endif
645
f79ea4cb
YL		 646#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
647#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
648
649static int bfin_mmc_spi_init(struct device *dev,
650 irqreturn_t (*detect_int)(int, void *), void *data)
651{
652 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
653 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
654}
655
656static void bfin_mmc_spi_exit(struct device *dev, void *data)
657{
658 free_irq(MMC_SPI_CARD_DETECT_INT, data);
659}
660
661static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
662 .init = bfin_mmc_spi_init,
663 .exit = bfin_mmc_spi_exit,
664 .detect_delay = 100, /* msecs */
665};
666
667static struct bfin5xx_spi_chip mmc_spi_chip_info = {
668 .enable_dma = 0,
669 .bits_per_word = 8,
e68d1ebc 670 .pio_interrupt = 0,
f79ea4cb
YL		 671};
672#endif
673
1394f032 674#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 675#include <linux/spi/ad7877.h>
1394f032 676static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 677 .enable_dma = 0,
678 .bits_per_word = 16,
679};
680
681static const struct ad7877_platform_data bfin_ad7877_ts_info = {
682 .model = 7877,
683 .vref_delay_usecs = 50, /* internal, no capacitor */
684 .x_plate_ohms = 419,
685 .y_plate_ohms = 486,
686 .pressure_max = 1000,
687 .pressure_min = 0,
688 .stopacq_polarity = 1,
689 .first_conversion_delay = 3,
690 .acquisition_time = 1,
691 .averaging = 1,
692 .pen_down_acc_interval = 1,
693};
694#endif
695
46aa04f9
MH		 696#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
697#include <linux/spi/ad7879.h>
46aa04f9
MH		 698static const struct ad7879_platform_data bfin_ad7879_ts_info = {
699 .model = 7879, /* Model = AD7879 */
700 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
701 .pressure_max = 10000,
702 .pressure_min = 0,
703 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
704 .acquisition_time = 1, /* 4us acquisition time per sample */
705 .median = 2, /* do 8 measurements */
706 .averaging = 1, /* take the average of 4 middle samples */
707 .pen_down_acc_interval = 255, /* 9.4 ms */
708 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
709 .gpio_default = 1, /* During initialization set GPIO = HIGH */
710};
711#endif
712
ffc4d8bc 713#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
57af8edf 714#include <linux/input/adxl34x.h>
ffc4d8bc
MH		 715static const struct adxl34x_platform_data adxl34x_info = {
716 .x_axis_offset = 0,
717 .y_axis_offset = 0,
718 .z_axis_offset = 0,
719 .tap_threshold = 0x31,
720 .tap_duration = 0x10,
721 .tap_latency = 0x60,
722 .tap_window = 0xF0,
723 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
724 .act_axis_control = 0xFF,
725 .activity_threshold = 5,
726 .inactivity_threshold = 3,
727 .inactivity_time = 4,
728 .free_fall_threshold = 0x7,
729 .free_fall_time = 0x20,
730 .data_rate = 0x8,
731 .data_range = ADXL_FULL_RES,
732
733 .ev_type = EV_ABS,
734 .ev_code_x = ABS_X, /* EV_REL */
735 .ev_code_y = ABS_Y, /* EV_REL */
736 .ev_code_z = ABS_Z, /* EV_REL */
737
57af8edf 738 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
ffc4d8bc
MH		 739
740/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
741/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
742 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
743 .fifo_mode = ADXL_FIFO_STREAM,
744};
745#endif
746
f5150155
MH		 747#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
748static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
749 .enable_dma = 0,
750 .bits_per_word = 16,
751};
752#endif
753
6e668936
MH		 754#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
755static struct bfin5xx_spi_chip spidev_chip_info = {
756 .enable_dma = 0,
757 .bits_per_word = 8,
758};
759#endif
760
2043f3f7
MH		 761#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
762static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
763 .enable_dma = 0,
764 .bits_per_word = 8,
765};
766#endif
767
85a192e9
MH		 768#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
769static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
770 .enable_dma = 1,
771 .bits_per_word = 8,
772 .cs_gpio = GPIO_PF10,
773};
774#endif
775
efaf7cd9
MH		 776#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
777static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
778 .bits_per_word = 16,
779 .cs_gpio = GPIO_PF10,
780};
781
782#include <linux/spi/adf702x.h>
783#define TXREG 0x0160A470
784static const u32 adf7021_regs[] = {
785 0x09608FA0,
786 0x00575011,
787 0x00A7F092,
788 0x2B141563,
789 0x81F29E94,
790 0x00003155,
791 0x050A4F66,
792 0x00000007,
793 0x00000008,
794 0x000231E9,
795 0x3296354A,
796 0x891A2B3B,
797 0x00000D9C,
798 0x0000000D,
799 0x0000000E,
800 0x0000000F,
801};
802
803static struct adf702x_platform_data adf7021_platform_data = {
804 .regs_base = (void *)SPORT1_TCR1,
805 .dma_ch_rx = CH_SPORT1_RX,
806 .dma_ch_tx = CH_SPORT1_TX,
807 .irq_sport_err = IRQ_SPORT1_ERROR,
808 .gpio_int_rfs = GPIO_PF8,
809 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
810 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
811 .adf702x_model = MODEL_ADF7021,
812 .adf702x_regs = adf7021_regs,
813 .tx_reg = TXREG,
814};
815#endif
816
8e9d5c7d
MH		 817#if defined(CONFIG_MTD_DATAFLASH) \
818 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 819
820static struct mtd_partition bfin_spi_dataflash_partitions[] = {
821 {
822 .name = "bootloader(spi)",
823 .size = 0x00040000,
824 .offset = 0,
825 .mask_flags = MTD_CAP_ROM
826 }, {
827 .name = "linux kernel(spi)",
6ecb5b6d 828 .size = 0x180000,
ceac2651
MH		 829 .offset = MTDPART_OFS_APPEND,
830 }, {
831 .name = "file system(spi)",
832 .size = MTDPART_SIZ_FULL,
833 .offset = MTDPART_OFS_APPEND,
834 }
835};
836
837static struct flash_platform_data bfin_spi_dataflash_data = {
838 .name = "SPI Dataflash",
839 .parts = bfin_spi_dataflash_partitions,
840 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
841};
842
8e9d5c7d
MH		 843/* DataFlash chip */
844static struct bfin5xx_spi_chip data_flash_chip_info = {
845 .enable_dma = 0, /* use dma transfer with this chip*/
846 .bits_per_word = 8,
847};
848#endif
849
57af8edf
MH		 850#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
851static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
852 .enable_dma = 0, /* use dma transfer with this chip*/
853 .bits_per_word = 8,
854};
855#endif
856
1394f032
BW		 857static struct spi_board_info bfin_spi_board_info[] __initdata = {
858#if defined(CONFIG_MTD_M25P80) \
859 || defined(CONFIG_MTD_M25P80_MODULE)
860 {
861 /* the modalias must be the same as spi device driver name */
862 .modalias = "m25p80", /* Name of spi_driver for this device */
863 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 864 .bus_num = 0, /* Framework bus number */
1394f032
BW		 865 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
866 .platform_data = &bfin_spi_flash_data,
867 .controller_data = &spi_flash_chip_info,
868 .mode = SPI_MODE_3,
869 },
870#endif
8e9d5c7d
MH		 871#if defined(CONFIG_MTD_DATAFLASH) \
872 || defined(CONFIG_MTD_DATAFLASH_MODULE)
873 { /* DataFlash chip */
874 .modalias = "mtd_dataflash",
ceac2651 875 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 876 .bus_num = 0, /* Framework bus number */
877 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 878 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 879 .controller_data = &data_flash_chip_info,
880 .mode = SPI_MODE_3,
881 },
882#endif
a261eec0
MF		 883#if defined(CONFIG_BFIN_SPI_ADC) \
884 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 885 {
886 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
887 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 888 .bus_num = 0, /* Framework bus number */
1394f032
BW		 889 .chip_select = 1, /* Framework chip select. */
890 .platform_data = NULL, /* No spi_driver specific config */
891 .controller_data = &spi_adc_chip_info,
892 },
893#endif
894
8312440e
BS		 895#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
896 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032 897 {
dac98174 898 .modalias = "ad1836",
1394f032 899 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 900 .bus_num = 0,
8312440e 901 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
1394f032 902 .controller_data = &ad1836_spi_chip_info,
8312440e 903 .mode = SPI_MODE_3,
1394f032
BW		 904 },
905#endif
d4b834c1
BS		 906
907#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
908 {
dac98174 909 .modalias = "ad1938",
d4b834c1
BS		 910 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
911 .bus_num = 0,
08a54bff 912 .chip_select = 5,
d4b834c1
BS		 913 .controller_data = &ad1938_spi_chip_info,
914 .mode = SPI_MODE_3,
915 },
916#endif
917
5b7c5775 918#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 919 {
920 .modalias = "ad714x_captouch",
921 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
922 .irq = IRQ_PF4,
923 .bus_num = 0,
924 .chip_select = 5,
925 .mode = SPI_MODE_3,
5b7c5775 926 .platform_data = &ad7147_spi_platform_data,
427f277e
BS		 927 .controller_data = &ad7147_spi_chip_info,
928 },
929#endif
930
f79ea4cb
YL		 931#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
932 {
933 .modalias = "mmc_spi",
934 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
935 .bus_num = 0,
936 .chip_select = 4,
937 .platform_data = &bfin_mmc_spi_pdata,
938 .controller_data = &mmc_spi_chip_info,
939 .mode = SPI_MODE_3,
940 },
941#endif
1394f032
BW		 942#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
943 {
944 .modalias = "ad7877",
945 .platform_data = &bfin_ad7877_ts_info,
946 .irq = IRQ_PF6,
947 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 948 .bus_num = 0,
1394f032
BW		 949 .chip_select = 1,
950 .controller_data = &spi_ad7877_chip_info,
951 },
952#endif
f5150155 953#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 954 {
955 .modalias = "ad7879",
956 .platform_data = &bfin_ad7879_ts_info,
957 .irq = IRQ_PF7,
958 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
959 .bus_num = 0,
960 .chip_select = 1,
961 .controller_data = &spi_ad7879_chip_info,
962 .mode = SPI_CPHA | SPI_CPOL,
963 },
964#endif
6e668936
MH		 965#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
966 {
967 .modalias = "spidev",
968 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
969 .bus_num = 0,
970 .chip_select = 1,
971 .controller_data = &spidev_chip_info,
972 },
973#endif
2043f3f7
MH		 974#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
975 {
976 .modalias = "bfin-lq035q1-spi",
977 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
978 .bus_num = 0,
46aa04f9 979 .chip_select = 2,
2043f3f7
MH		 980 .controller_data = &lq035q1_spi_chip_info,
981 .mode = SPI_CPHA | SPI_CPOL,
982 },
983#endif
85a192e9
MH		 984#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
985 {
986 .modalias = "enc28j60",
987 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
988 .irq = IRQ_PF6,
989 .bus_num = 0,
990 .chip_select = 0, /* GPIO controlled SSEL */
991 .controller_data = &enc28j60_spi_chip_info,
992 .mode = SPI_MODE_0,
993 },
994#endif
57af8edf
MH		 995#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
996 {
997 .modalias = "adxl34x",
998 .platform_data = &adxl34x_info,
999 .irq = IRQ_PF6,
1000 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1001 .bus_num = 0,
1002 .chip_select = 2,
1003 .controller_data = &spi_adxl34x_chip_info,
1004 .mode = SPI_MODE_3,
1005 },
1006#endif
efaf7cd9
MH		 1007#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1008 {
1009 .modalias = "adf702x",
1010 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1011 .bus_num = 0,
1012 .chip_select = 0, /* GPIO controlled SSEL */
1013 .controller_data = &adf7021_spi_chip_info,
1014 .platform_data = &adf7021_platform_data,
1015 .mode = SPI_MODE_0,
1016 },
1017#endif
1018
1394f032
BW		 1019};
1020
5bda2723 1021#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 1022/* SPI controller data */
c6c4d7bb 1023static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 1024 .num_chipselect = 8,
1025 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 1026 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 1027};
1028
c6c4d7bb
BW		 1029/* SPI (0) */
1030static struct resource bfin_spi0_resource[] = {
1031 [0] = {
1032 .start = SPI0_REGBASE,
1033 .end = SPI0_REGBASE + 0xFF,
1034 .flags = IORESOURCE_MEM,
1035 },
1036 [1] = {
1037 .start = CH_SPI,
1038 .end = CH_SPI,
e68d1ebc
YL		 1039 .flags = IORESOURCE_DMA,
1040 },
1041 [2] = {
1042 .start = IRQ_SPI,
1043 .end = IRQ_SPI,
c6c4d7bb
BW		 1044 .flags = IORESOURCE_IRQ,
1045 },
1046};
1047
1048static struct platform_device bfin_spi0_device = {
1049 .name = "bfin-spi",
1050 .id = 0, /* Bus number */
1051 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1052 .resource = bfin_spi0_resource,
1394f032 1053 .dev = {
c6c4d7bb 1054 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 1055 },
1056};
1057#endif /* spi master and devices */
1058
1e9aa955
CC		 1059#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1060
1061/* SPORT SPI controller data */
1062static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1063 .num_chipselect = 1, /* master only supports one device */
1064 .enable_dma = 0, /* master don't support DMA */
1065 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1066 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1067};
1068
1069static struct resource bfin_sport_spi0_resource[] = {
1070 [0] = {
1071 .start = SPORT0_TCR1,
1072 .end = SPORT0_TCR1 + 0xFF,
1073 .flags = IORESOURCE_MEM,
1074 },
1075 [1] = {
1076 .start = IRQ_SPORT0_ERROR,
1077 .end = IRQ_SPORT0_ERROR,
1078 .flags = IORESOURCE_IRQ,
1079 },
1080};
1081
1082static struct platform_device bfin_sport_spi0_device = {
1083 .name = "bfin-sport-spi",
1084 .id = 1, /* Bus number */
1085 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1086 .resource = bfin_sport_spi0_resource,
1087 .dev = {
1088 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1089 },
1090};
1091
1092static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1093 .num_chipselect = 1, /* master only supports one device */
1094 .enable_dma = 0, /* master don't support DMA */
1095 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1096 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1097};
1098
1099static struct resource bfin_sport_spi1_resource[] = {
1100 [0] = {
1101 .start = SPORT1_TCR1,
1102 .end = SPORT1_TCR1 + 0xFF,
1103 .flags = IORESOURCE_MEM,
1104 },
1105 [1] = {
1106 .start = IRQ_SPORT1_ERROR,
1107 .end = IRQ_SPORT1_ERROR,
1108 .flags = IORESOURCE_IRQ,
1109 },
1110};
1111
1112static struct platform_device bfin_sport_spi1_device = {
1113 .name = "bfin-sport-spi",
1114 .id = 2, /* Bus number */
1115 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1116 .resource = bfin_sport_spi1_resource,
1117 .dev = {
1118 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1119 },
1120};
1121
1122#endif /* sport spi master and devices */
1123
1394f032
BW		 1124#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1125static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1126 .name = "bf537-lq035",
1127};
1128#endif
1129
2043f3f7
MH		 1130#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1131#include <asm/bfin-lq035q1.h>
1132
1133static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1134 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
46aa04f9 1135 .use_bl = 0, /* let something else control the LCD Blacklight */
2043f3f7
MH		 1136 .gpio_bl = GPIO_PF7,
1137};
1138
1139static struct resource bfin_lq035q1_resources[] = {
1140 {
1141 .start = IRQ_PPI_ERROR,
1142 .end = IRQ_PPI_ERROR,
1143 .flags = IORESOURCE_IRQ,
1144 },
1145};
1146
1147static struct platform_device bfin_lq035q1_device = {
1148 .name = "bfin-lq035q1",
1149 .id = -1,
1150 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1151 .resource = bfin_lq035q1_resources,
1152 .dev = {
1153 .platform_data = &bfin_lq035q1_data,
1154 },
1155};
1156#endif
1157
1394f032 1158#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
233b28a9 1159#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 1160static struct resource bfin_uart0_resources[] = {
1394f032 1161 {
6bd1fbea
SZ		 1162 .start = UART0_THR,
1163 .end = UART0_GCTL+2,
1394f032 1164 .flags = IORESOURCE_MEM,
233b28a9 1165 },
6bd1fbea
SZ		 1166 {
1167 .start = IRQ_UART0_RX,
1168 .end = IRQ_UART0_RX+1,
1169 .flags = IORESOURCE_IRQ,
1170 },
1171 {
1172 .start = IRQ_UART0_ERROR,
1173 .end = IRQ_UART0_ERROR,
1174 .flags = IORESOURCE_IRQ,
1175 },
1176 {
1177 .start = CH_UART0_TX,
1178 .end = CH_UART0_TX,
1179 .flags = IORESOURCE_DMA,
1180 },
1181 {
1182 .start = CH_UART0_RX,
1183 .end = CH_UART0_RX,
1184 .flags = IORESOURCE_DMA,
1185 },
1186#ifdef CONFIG_BFIN_UART0_CTSRTS
1187 { /* CTS pin */
1188 .start = GPIO_PG7,
1189 .end = GPIO_PG7,
1190 .flags = IORESOURCE_IO,
1191 },
1192 { /* RTS pin */
1193 .start = GPIO_PG6,
1194 .end = GPIO_PG6,
1195 .flags = IORESOURCE_IO,
1196 },
1197#endif
1198};
1199
1200unsigned short bfin_uart0_peripherals[] = {
1201 P_UART0_TX, P_UART0_RX, 0
1202};
1203
1204static struct platform_device bfin_uart0_device = {
1205 .name = "bfin-uart",
1206 .id = 0,
1207 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1208 .resource = bfin_uart0_resources,
1209 .dev = {
1210 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1211 },
1212};
233b28a9
SZ		 1213#endif
1214#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 1215static struct resource bfin_uart1_resources[] = {
233b28a9 1216 {
6bd1fbea
SZ		 1217 .start = UART1_THR,
1218 .end = UART1_GCTL+2,
1394f032
BW		 1219 .flags = IORESOURCE_MEM,
1220 },
6bd1fbea
SZ		 1221 {
1222 .start = IRQ_UART1_RX,
1223 .end = IRQ_UART1_RX+1,
1224 .flags = IORESOURCE_IRQ,
1225 },
1226 {
1227 .start = IRQ_UART1_ERROR,
1228 .end = IRQ_UART1_ERROR,
1229 .flags = IORESOURCE_IRQ,
1230 },
1231 {
1232 .start = CH_UART1_TX,
1233 .end = CH_UART1_TX,
1234 .flags = IORESOURCE_DMA,
1235 },
1236 {
1237 .start = CH_UART1_RX,
1238 .end = CH_UART1_RX,
1239 .flags = IORESOURCE_DMA,
1240 },
1241};
1242
1243unsigned short bfin_uart1_peripherals[] = {
1244 P_UART1_TX, P_UART1_RX, 0
1394f032
BW		 1245};
1246
6bd1fbea 1247static struct platform_device bfin_uart1_device = {
1394f032
BW		 1248 .name = "bfin-uart",
1249 .id = 1,
6bd1fbea
SZ		 1250 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1251 .resource = bfin_uart1_resources,
1252 .dev = {
1253 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1254 },
1394f032
BW		 1255};
1256#endif
6bd1fbea 1257#endif
1394f032 1258
5be36d22 1259#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1260#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1261static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1262 {
1263 .start = 0xFFC00400,
1264 .end = 0xFFC004FF,
1265 .flags = IORESOURCE_MEM,
1266 },
42bd8bcb
GY		 1267 {
1268 .start = IRQ_UART0_RX,
1269 .end = IRQ_UART0_RX+1,
1270 .flags = IORESOURCE_IRQ,
1271 },
1272 {
1273 .start = CH_UART0_RX,
1274 .end = CH_UART0_RX+1,
1275 .flags = IORESOURCE_DMA,
1276 },
1277};
1278
1279static struct platform_device bfin_sir0_device = {
1280 .name = "bfin_sir",
1281 .id = 0,
1282 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1283 .resource = bfin_sir0_resources,
1284};
5be36d22
GY		 1285#endif
1286#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1287static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1288 {
1289 .start = 0xFFC02000,
1290 .end = 0xFFC020FF,
1291 .flags = IORESOURCE_MEM,
1292 },
42bd8bcb
GY		 1293 {
1294 .start = IRQ_UART1_RX,
1295 .end = IRQ_UART1_RX+1,
1296 .flags = IORESOURCE_IRQ,
1297 },
1298 {
1299 .start = CH_UART1_RX,
1300 .end = CH_UART1_RX+1,
1301 .flags = IORESOURCE_DMA,
1302 },
5be36d22
GY		 1303};
1304
42bd8bcb 1305static struct platform_device bfin_sir1_device = {
5be36d22 1306 .name = "bfin_sir",
42bd8bcb
GY		 1307 .id = 1,
1308 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1309 .resource = bfin_sir1_resources,
5be36d22
GY		 1310};
1311#endif
42bd8bcb 1312#endif
5be36d22 1313
1394f032 1314#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1315static struct resource bfin_twi0_resource[] = {
1316 [0] = {
1317 .start = TWI0_REGBASE,
1318 .end = TWI0_REGBASE,
1319 .flags = IORESOURCE_MEM,
1320 },
1321 [1] = {
1322 .start = IRQ_TWI,
1323 .end = IRQ_TWI,
1324 .flags = IORESOURCE_IRQ,
1325 },
1326};
1327
1394f032
BW		 1328static struct platform_device i2c_bfin_twi_device = {
1329 .name = "i2c-bfin-twi",
1330 .id = 0,
c6c4d7bb
BW		 1331 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1332 .resource = bfin_twi0_resource,
1394f032
BW		 1333};
1334#endif
1335
51ed9ad7 1336#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
f39d56ec 1337#include <linux/i2c/adp5588.h>
51ed9ad7
MH		 1338static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1339 [0] = KEY_GRAVE,
1340 [1] = KEY_1,
1341 [2] = KEY_2,
1342 [3] = KEY_3,
1343 [4] = KEY_4,
1344 [5] = KEY_5,
1345 [6] = KEY_6,
1346 [7] = KEY_7,
1347 [8] = KEY_8,
1348 [9] = KEY_9,
1349 [10] = KEY_0,
1350 [11] = KEY_MINUS,
1351 [12] = KEY_EQUAL,
1352 [13] = KEY_BACKSLASH,
1353 [15] = KEY_KP0,
1354 [16] = KEY_Q,
1355 [17] = KEY_W,
1356 [18] = KEY_E,
1357 [19] = KEY_R,
1358 [20] = KEY_T,
1359 [21] = KEY_Y,
1360 [22] = KEY_U,
1361 [23] = KEY_I,
1362 [24] = KEY_O,
1363 [25] = KEY_P,
1364 [26] = KEY_LEFTBRACE,
1365 [27] = KEY_RIGHTBRACE,
1366 [29] = KEY_KP1,
1367 [30] = KEY_KP2,
1368 [31] = KEY_KP3,
1369 [32] = KEY_A,
1370 [33] = KEY_S,
1371 [34] = KEY_D,
1372 [35] = KEY_F,
1373 [36] = KEY_G,
1374 [37] = KEY_H,
1375 [38] = KEY_J,
1376 [39] = KEY_K,
1377 [40] = KEY_L,
1378 [41] = KEY_SEMICOLON,
1379 [42] = KEY_APOSTROPHE,
1380 [43] = KEY_BACKSLASH,
1381 [45] = KEY_KP4,
1382 [46] = KEY_KP5,
1383 [47] = KEY_KP6,
1384 [48] = KEY_102ND,
1385 [49] = KEY_Z,
1386 [50] = KEY_X,
1387 [51] = KEY_C,
1388 [52] = KEY_V,
1389 [53] = KEY_B,
1390 [54] = KEY_N,
1391 [55] = KEY_M,
1392 [56] = KEY_COMMA,
1393 [57] = KEY_DOT,
1394 [58] = KEY_SLASH,
1395 [60] = KEY_KPDOT,
1396 [61] = KEY_KP7,
1397 [62] = KEY_KP8,
1398 [63] = KEY_KP9,
1399 [64] = KEY_SPACE,
1400 [65] = KEY_BACKSPACE,
1401 [66] = KEY_TAB,
1402 [67] = KEY_KPENTER,
1403 [68] = KEY_ENTER,
1404 [69] = KEY_ESC,
1405 [70] = KEY_DELETE,
1406 [74] = KEY_KPMINUS,
1407 [76] = KEY_UP,
1408 [77] = KEY_DOWN,
1409 [78] = KEY_RIGHT,
1410 [79] = KEY_LEFT,
1411};
1412
1413static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1414 .rows = 8,
1415 .cols = 10,
1416 .keymap = adp5588_keymap,
1417 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1418 .repeat = 0,
1419};
1420#endif
1421
3ea57218
MH		 1422#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1423#include <linux/mfd/adp5520.h>
1424
1425 /*
1426 * ADP5520/5501 Backlight Data
1427 */
1428
1d23dc89
MH		 1429static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1430 .fade_in = ADP5520_FADE_T_1200ms,
1431 .fade_out = ADP5520_FADE_T_1200ms,
1432 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1433 .en_ambl_sens = 1,
1434 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1435 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1436 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1437 .l2_office_max = ADP5520_BL_CUR_mA(7),
1438 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1439 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1440 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1441 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1442 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1443 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1444 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
3ea57218
MH		 1445};
1446
1447 /*
1448 * ADP5520/5501 LEDs Data
1449 */
1450
3ea57218
MH		 1451static struct led_info adp5520_leds[] = {
1452 {
1453 .name = "adp5520-led1",
1454 .default_trigger = "none",
1d23dc89 1455 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
3ea57218
MH		 1456 },
1457#ifdef ADP5520_EN_ALL_LEDS
1458 {
1459 .name = "adp5520-led2",
1460 .default_trigger = "none",
1461 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1462 },
1463 {
1464 .name = "adp5520-led3",
1465 .default_trigger = "none",
1466 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1467 },
1468#endif
1469};
1470
1d23dc89 1471static struct adp5520_leds_platform_data adp5520_leds_data = {
3ea57218
MH		 1472 .num_leds = ARRAY_SIZE(adp5520_leds),
1473 .leds = adp5520_leds,
1d23dc89
MH		 1474 .fade_in = ADP5520_FADE_T_600ms,
1475 .fade_out = ADP5520_FADE_T_600ms,
1476 .led_on_time = ADP5520_LED_ONT_600ms,
3ea57218
MH		 1477};
1478
1479 /*
1480 * ADP5520 GPIO Data
1481 */
1482
1d23dc89 1483static struct adp5520_gpio_platform_data adp5520_gpio_data = {
3ea57218 1484 .gpio_start = 50,
1d23dc89
MH		 1485 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1486 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
3ea57218
MH		 1487};
1488
1489 /*
1490 * ADP5520 Keypad Data
1491 */
1492
3ea57218 1493static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1d23dc89
MH		 1494 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1495 [ADP5520_KEY(0, 1)] = KEY_1,
1496 [ADP5520_KEY(0, 2)] = KEY_2,
1497 [ADP5520_KEY(0, 3)] = KEY_3,
1498 [ADP5520_KEY(1, 0)] = KEY_4,
1499 [ADP5520_KEY(1, 1)] = KEY_5,
1500 [ADP5520_KEY(1, 2)] = KEY_6,
1501 [ADP5520_KEY(1, 3)] = KEY_7,
1502 [ADP5520_KEY(2, 0)] = KEY_8,
1503 [ADP5520_KEY(2, 1)] = KEY_9,
1504 [ADP5520_KEY(2, 2)] = KEY_0,
1505 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1506 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1507 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1508 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1509 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1510};
1511
1512static struct adp5520_keys_platform_data adp5520_keys_data = {
1513 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1514 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
3ea57218
MH		 1515 .keymap = adp5520_keymap,
1516 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1517 .repeat = 0,
1518};
1519
1520 /*
1521 * ADP5520/5501 Multifuction Device Init Data
1522 */
1523
3ea57218 1524static struct adp5520_platform_data adp5520_pdev_data = {
1d23dc89
MH		 1525 .backlight = &adp5520_backlight_data,
1526 .leds = &adp5520_leds_data,
1527 .gpio = &adp5520_gpio_data,
1528 .keys = &adp5520_keys_data,
3ea57218
MH		 1529};
1530
1531#endif
1532
ba877d44
MH		 1533#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1534#include <linux/i2c/adp5588.h>
1d23dc89 1535static struct adp5588_gpio_platform_data adp5588_gpio_data = {
ba877d44
MH		 1536 .gpio_start = 50,
1537 .pullup_dis_mask = 0,
1538};
1539#endif
1540
78756c62
MH		 1541#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1542#include <linux/i2c/adp8870.h>
1543static struct led_info adp8870_leds[] = {
1544 {
1545 .name = "adp8870-led7",
1546 .default_trigger = "none",
1547 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1548 },
1549};
1550
1551
1552static struct adp8870_backlight_platform_data adp8870_pdata = {
1553 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1554 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1555 .pwm_assign = 0, /* 1 = Enables PWM mode */
1556
1557 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1558 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1559 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1560
1561 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1562 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1563
1564 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1565 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1566 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1567 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1568 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1569 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1570 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1571 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1572 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1573 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1574
1575 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1576 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1577 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1578 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1579 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1580 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1581 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1582 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1583
1584 .leds = adp8870_leds,
1585 .num_leds = ARRAY_SIZE(adp8870_leds),
1586 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1587 .led_fade_in = ADP8870_FADE_T_600ms,
1588 .led_fade_out = ADP8870_FADE_T_600ms,
1589 .led_on_time = ADP8870_LED_ONT_200ms,
1590};
1591#endif
1592
81d9c7f2 1593static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
5b7c5775 1594#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
81d9c7f2 1595 {
427f277e 1596 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1597 .irq = IRQ_PG5,
5b7c5775 1598 .platform_data = (void *)&ad7142_i2c_platform_data,
81d9c7f2
BW		 1599 },
1600#endif
ebd58333 1601#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1602 {
1603 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1604 },
1605#endif
204844eb 1606#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1607 {
1608 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1609 .irq = IRQ_PG6,
1610 },
1611#endif
1612#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1613 {
1614 I2C_BOARD_INFO("ad7879", 0x2F),
1615 .irq = IRQ_PG5,
1616 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1617 },
1618#endif
51ed9ad7
MH		 1619#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1620 {
1621 I2C_BOARD_INFO("adp5588-keys", 0x34),
1622 .irq = IRQ_PG0,
1623 .platform_data = (void *)&adp5588_kpad_data,
1624 },
1625#endif
3ea57218
MH		 1626#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1627 {
1628 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1629 .irq = IRQ_PG0,
3ea57218
MH		 1630 .platform_data = (void *)&adp5520_pdev_data,
1631 },
1632#endif
ffc4d8bc
MH		 1633#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1634 {
1635 I2C_BOARD_INFO("adxl34x", 0x53),
1636 .irq = IRQ_PG3,
1637 .platform_data = (void *)&adxl34x_info,
1638 },
1639#endif
ba877d44
MH		 1640#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1641 {
1642 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1643 .platform_data = (void *)&adp5588_gpio_data,
1644 },
1645#endif
50c4c086
MH		 1646#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1647 {
1648 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1649 },
1650#endif
ddcd7cb8
MH		 1651#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1652 {
1653 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1654 },
1655#endif
78756c62
MH		 1656#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1657 {
1658 I2C_BOARD_INFO("adp8870", 0x2B),
1659 .platform_data = (void *)&adp8870_pdata,
1660 },
1661#endif
d53127ff
CC		 1662#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1663 {
1664 I2C_BOARD_INFO("adau1371", 0x1A),
1665 },
1666#endif
04267638
CC		 1667#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1668 {
1669 I2C_BOARD_INFO("adau1761", 0x38),
1670 },
1671#endif
1f13f2fd
MH		 1672#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1673 {
1674 I2C_BOARD_INFO("ad5258", 0x18),
1675 },
1676#endif
81d9c7f2 1677};
81d9c7f2 1678
1394f032 1679#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 1680#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1681static struct resource bfin_sport0_uart_resources[] = {
1682 {
1683 .start = SPORT0_TCR1,
1684 .end = SPORT0_MRCS3+4,
1685 .flags = IORESOURCE_MEM,
1686 },
1687 {
1688 .start = IRQ_SPORT0_RX,
1689 .end = IRQ_SPORT0_RX+1,
1690 .flags = IORESOURCE_IRQ,
1691 },
1692 {
1693 .start = IRQ_SPORT0_ERROR,
1694 .end = IRQ_SPORT0_ERROR,
1695 .flags = IORESOURCE_IRQ,
1696 },
1697};
1698
1699unsigned short bfin_sport0_peripherals[] = {
1700 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1701 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
1702};
1703
1394f032
BW		 1704static struct platform_device bfin_sport0_uart_device = {
1705 .name = "bfin-sport-uart",
1706 .id = 0,
df5de261
SZ		 1707 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1708 .resource = bfin_sport0_uart_resources,
1709 .dev = {
1710 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1711 },
1712};
1713#endif
1714#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1715static struct resource bfin_sport1_uart_resources[] = {
1716 {
1717 .start = SPORT1_TCR1,
1718 .end = SPORT1_MRCS3+4,
1719 .flags = IORESOURCE_MEM,
1720 },
1721 {
1722 .start = IRQ_SPORT1_RX,
1723 .end = IRQ_SPORT1_RX+1,
1724 .flags = IORESOURCE_IRQ,
1725 },
1726 {
1727 .start = IRQ_SPORT1_ERROR,
1728 .end = IRQ_SPORT1_ERROR,
1729 .flags = IORESOURCE_IRQ,
1730 },
1731};
1732
1733unsigned short bfin_sport1_peripherals[] = {
1734 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1735 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
1394f032
BW		 1736};
1737
1738static struct platform_device bfin_sport1_uart_device = {
1739 .name = "bfin-sport-uart",
1740 .id = 1,
df5de261
SZ		 1741 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1742 .resource = bfin_sport1_uart_resources,
1743 .dev = {
1744 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1745 },
1394f032
BW		 1746};
1747#endif
df5de261 1748#endif
1394f032 1749
c6c4d7bb 1750#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 1751#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1752/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 1753
2c8beb2c
MH		 1754#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1755#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 1756static struct pata_platform_info bfin_pata_platform_data = {
1757 .ioport_shift = 1,
64e5c512 1758 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 1759};
1760
1761static struct resource bfin_pata_resources[] = {
1762 {
1763 .start = 0x20314020,
1764 .end = 0x2031403F,
1765 .flags = IORESOURCE_MEM,
1766 },
1767 {
1768 .start = 0x2031401C,
1769 .end = 0x2031401F,
1770 .flags = IORESOURCE_MEM,
1771 },
1772 {
1773 .start = PATA_INT,
1774 .end = PATA_INT,
1775 .flags = IORESOURCE_IRQ,
1776 },
1777};
2c8beb2c
MH		 1778#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1779static struct pata_platform_info bfin_pata_platform_data = {
1780 .ioport_shift = 0,
1781};
648882d9
MH		 1782/* CompactFlash Storage Card Memory Mapped Adressing
1783 * /REG = A11 = 1
1784 */
2c8beb2c
MH		 1785static struct resource bfin_pata_resources[] = {
1786 {
648882d9
MH		 1787 .start = 0x20211800,
1788 .end = 0x20211807,
2c8beb2c
MH		 1789 .flags = IORESOURCE_MEM,
1790 },
1791 {
648882d9
MH		 1792 .start = 0x2021180E, /* Device Ctl */
1793 .end = 0x2021180E,
2c8beb2c
MH		 1794 .flags = IORESOURCE_MEM,
1795 },
1796};
1797#endif
c6c4d7bb
BW		 1798
1799static struct platform_device bfin_pata_device = {
1800 .name = "pata_platform",
1801 .id = -1,
1802 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1803 .resource = bfin_pata_resources,
1804 .dev = {
1805 .platform_data = &bfin_pata_platform_data,
1806 }
1807};
1808#endif
1809
14b03204
MH		 1810static const unsigned int cclk_vlev_datasheet[] =
1811{
1812 VRPAIR(VLEV_085, 250000000),
1813 VRPAIR(VLEV_090, 376000000),
1814 VRPAIR(VLEV_095, 426000000),
1815 VRPAIR(VLEV_100, 426000000),
1816 VRPAIR(VLEV_105, 476000000),
1817 VRPAIR(VLEV_110, 476000000),
1818 VRPAIR(VLEV_115, 476000000),
1819 VRPAIR(VLEV_120, 500000000),
1820 VRPAIR(VLEV_125, 533000000),
1821 VRPAIR(VLEV_130, 600000000),
1822};
1823
1824static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1825 .tuple_tab = cclk_vlev_datasheet,
1826 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1827 .vr_settling_time = 25 /* us */,
1828};
1829
1830static struct platform_device bfin_dpmc = {
1831 .name = "bfin dpmc",
1832 .dev = {
1833 .platform_data = &bfin_dmpc_vreg_data,
1834 },
1835};
1836
8312440e
BS		 1837#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1838static struct platform_device bfin_tdm = {
1839 .name = "bfin-tdm",
1840 /* TODO: add platform data here */
1841};
1842#endif
1843
1394f032 1844static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1845
1846 &bfin_dpmc,
1847
1394f032
BW		 1848#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1849 &bfin_pcmcia_cf_device,
1850#endif
1851
1852#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1853 &rtc_device,
1854#endif
1855
1856#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1857 &sl811_hcd_device,
1858#endif
1859
1860#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1861 &isp1362_hcd_device,
1862#endif
1863
3f375690
MH		 1864#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1865 &bfin_isp1760_device,
1866#endif
1867
1394f032
BW		 1868#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1869 &smc91x_device,
1870#endif
1871
f40d24d9
AL		 1872#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1873 &dm9000_device,
1874#endif
1875
706a01b1
BS		 1876#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1877 &bfin_can_device,
1878#endif
1879
1394f032 1880#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1881 &bfin_mii_bus,
1394f032
BW		 1882 &bfin_mac_device,
1883#endif
1884
1885#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1886 &net2272_bfin_device,
1887#endif
1888
1889#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 1890 &bfin_spi0_device,
1394f032
BW		 1891#endif
1892
1e9aa955
CC		 1893#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1894 &bfin_sport_spi0_device,
1895 &bfin_sport_spi1_device,
1896#endif
1897
1394f032
BW		 1898#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1899 &bfin_fb_device,
1900#endif
1901
2043f3f7
MH		 1902#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1903 &bfin_lq035q1_device,
1904#endif
1905
1394f032 1906#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1907#ifdef CONFIG_SERIAL_BFIN_UART0
1908 &bfin_uart0_device,
1909#endif
1910#ifdef CONFIG_SERIAL_BFIN_UART1
1911 &bfin_uart1_device,
1912#endif
1394f032
BW		 1913#endif
1914
5be36d22 1915#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1916#ifdef CONFIG_BFIN_SIR0
1917 &bfin_sir0_device,
1918#endif
1919#ifdef CONFIG_BFIN_SIR1
1920 &bfin_sir1_device,
1921#endif
5be36d22
GY		 1922#endif
1923
1394f032
BW		 1924#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1925 &i2c_bfin_twi_device,
1926#endif
1927
1928#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 1929#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1394f032 1930 &bfin_sport0_uart_device,
df5de261
SZ		 1931#endif
1932#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1394f032
BW		 1933 &bfin_sport1_uart_device,
1934#endif
df5de261 1935#endif
c6c4d7bb
BW		 1936
1937#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1938 &bfin_pata_device,
1939#endif
2463ef22
MH		 1940
1941#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1942 &bfin_device_gpiokeys,
1943#endif
cad2ab65 1944
fc68911e
MF		 1945#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1946 &bfin_async_nand_device,
1947#endif
1948
793dc27b 1949#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 1950 &stamp_flash_device,
793dc27b 1951#endif
8312440e
BS		 1952
1953#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1954 &bfin_tdm,
1955#endif
1394f032
BW		 1956};
1957
1958static int __init stamp_init(void)
1959{
b85d858b 1960 printk(KERN_INFO "%s(): registering device resources\n", __func__);
fc68911e 1961 bfin_plat_nand_init();
1394f032 1962 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
df5de261
SZ		 1963 i2c_register_board_info(0, bfin_i2c_board_info,
1964 ARRAY_SIZE(bfin_i2c_board_info));
5bda2723 1965 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 1966
1394f032
BW		 1967 return 0;
1968}
1969
1970arch_initcall(stamp_init);
c6c4d7bb 1971
c13ce9fd
SZ		 1972
1973static struct platform_device *stamp_early_devices[] __initdata = {
1974#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1975#ifdef CONFIG_SERIAL_BFIN_UART0
1976 &bfin_uart0_device,
1977#endif
1978#ifdef CONFIG_SERIAL_BFIN_UART1
1979 &bfin_uart1_device,
1980#endif
1981#endif
1982
1983#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1984#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1985 &bfin_sport0_uart_device,
1986#endif
1987#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1988 &bfin_sport1_uart_device,
1989#endif
1990#endif
1991};
1992
1993void __init native_machine_early_platform_add_devices(void)
1994{
1995 printk(KERN_INFO "register early platform devices\n");
1996 early_platform_add_devices(stamp_early_devices,
1997 ARRAY_SIZE(stamp_early_devices));
1998}
1999
c6c4d7bb
BW		 2000void native_machine_restart(char *cmd)
2001{
2002 /* workaround reboot hang when booting from SPI */
2003 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 2004 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 2005}
137b1529
MF		 2006
2007/*
2008 * Currently the MAC address is saved in Flash by U-Boot
2009 */
2010#define FLASH_MAC 0x203f0000
9862cc52 2011void bfin_get_ether_addr(char *addr)
137b1529
MF		 2012{
2013 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2014 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2015}
9862cc52 2016EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
This page took 0.360706 seconds and 5 git commands to generate.