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Blackfin: add some bounds checking to peripheral_request
[deliverable/linux.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032
BW		 11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
fc68911e 13#include <linux/mtd/nand.h>
1394f032 14#include <linux/mtd/partitions.h>
fc68911e 15#include <linux/mtd/plat-ram.h>
de8c43f2 16#include <linux/mtd/physmap.h>
1394f032
BW		 17#include <linux/spi/spi.h>
18#include <linux/spi/flash.h>
19#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 20#include <linux/usb/isp1362.h>
1394f032 21#endif
0a87e3e9 22#include <linux/ata_platform.h>
1394f032
BW		 23#include <linux/irq.h>
24#include <linux/interrupt.h>
81d9c7f2 25#include <linux/i2c.h>
27f5d75a 26#include <linux/usb/sl811.h>
f79ea4cb 27#include <linux/spi/mmc_spi.h>
c6c4d7bb 28#include <asm/dma.h>
1f83b8f1 29#include <asm/bfin5xx_spi.h>
c6c4d7bb 30#include <asm/reboot.h>
5d448dd5 31#include <asm/portmux.h>
14b03204 32#include <asm/dpmc.h>
1394f032
BW		 33
34/*
35 * Name the Board for the /proc/cpuinfo
36 */
fe85cad2 37const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 38
39/*
40 * Driver needs to know address, irq and flag pin.
41 */
42
1394f032 43#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 44#include <linux/usb/isp1760.h>
45static struct resource bfin_isp1760_resources[] = {
1394f032 46 [0] = {
3f375690
MH		 47 .start = 0x203C0000,
48 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
3f375690
MH		 52 .start = IRQ_PF7,
53 .end = IRQ_PF7,
6a6be3d1 54 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 55 },
56};
57
3f375690
MH		 58static struct isp1760_platform_data isp1760_priv = {
59 .is_isp1761 = 0,
3f375690
MH		 60 .bus_width_16 = 1,
61 .port1_otg = 0,
62 .analog_oc = 0,
63 .dack_polarity_high = 0,
64 .dreq_polarity_high = 0,
1394f032
BW		 65};
66
3f375690
MH		 67static struct platform_device bfin_isp1760_device = {
68 .name = "isp1760-hcd",
69 .id = 0,
70 .dev = {
71 .platform_data = &isp1760_priv,
72 },
73 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
74 .resource = bfin_isp1760_resources,
1394f032 75};
1394f032
BW		 76#endif
77
2463ef22
MH		 78#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
79#include <linux/input.h>
80#include <linux/gpio_keys.h>
81
82static struct gpio_keys_button bfin_gpio_keys_table[] = {
83 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
84 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
85 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
86 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
87};
88
89static struct gpio_keys_platform_data bfin_gpio_keys_data = {
90 .buttons = bfin_gpio_keys_table,
91 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
92};
93
94static struct platform_device bfin_device_gpiokeys = {
95 .name = "gpio-keys",
96 .dev = {
97 .platform_data = &bfin_gpio_keys_data,
98 },
99};
100#endif
101
1394f032
BW		 102#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
103static struct resource bfin_pcmcia_cf_resources[] = {
104 {
105 .start = 0x20310000, /* IO PORT */
106 .end = 0x20312000,
107 .flags = IORESOURCE_MEM,
1f83b8f1 108 }, {
d2d50aa9 109 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 110 .end = 0x20311FFF,
111 .flags = IORESOURCE_MEM,
1f83b8f1 112 }, {
1394f032
BW		 113 .start = IRQ_PF4,
114 .end = IRQ_PF4,
115 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 116 }, {
1394f032
BW		 117 .start = 6, /* Card Detect PF6 */
118 .end = 6,
119 .flags = IORESOURCE_IRQ,
120 },
121};
122
123static struct platform_device bfin_pcmcia_cf_device = {
124 .name = "bfin_cf_pcmcia",
125 .id = -1,
126 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
127 .resource = bfin_pcmcia_cf_resources,
128};
129#endif
130
131#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
132static struct platform_device rtc_device = {
133 .name = "rtc-bfin",
134 .id = -1,
135};
136#endif
137
138#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 139#include <linux/smc91x.h>
140
141static struct smc91x_platdata smc91x_info = {
142 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
143 .leda = RPC_LED_100_10,
144 .ledb = RPC_LED_TX_RX,
145};
146
1394f032
BW		 147static struct resource smc91x_resources[] = {
148 {
149 .name = "smc91x-regs",
150 .start = 0x20300300,
151 .end = 0x20300300 + 16,
152 .flags = IORESOURCE_MEM,
1f83b8f1 153 }, {
1394f032
BW		 154
155 .start = IRQ_PF7,
156 .end = IRQ_PF7,
157 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
158 },
159};
160static struct platform_device smc91x_device = {
161 .name = "smc91x",
162 .id = 0,
163 .num_resources = ARRAY_SIZE(smc91x_resources),
164 .resource = smc91x_resources,
61f09b5a
MH		 165 .dev = {
166 .platform_data = &smc91x_info,
167 },
1394f032
BW		 168};
169#endif
170
f40d24d9
AL		 171#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
172static struct resource dm9000_resources[] = {
173 [0] = {
174 .start = 0x203FB800,
b3dec4a4 175 .end = 0x203FB800 + 1,
f40d24d9
AL		 176 .flags = IORESOURCE_MEM,
177 },
178 [1] = {
b3dec4a4
BS		 179 .start = 0x203FB804,
180 .end = 0x203FB804 + 1,
181 .flags = IORESOURCE_MEM,
182 },
183 [2] = {
f40d24d9
AL		 184 .start = IRQ_PF9,
185 .end = IRQ_PF9,
186 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
187 },
188};
189
190static struct platform_device dm9000_device = {
191 .name = "dm9000",
192 .id = -1,
193 .num_resources = ARRAY_SIZE(dm9000_resources),
194 .resource = dm9000_resources,
195};
196#endif
197
561cc18b
MH		 198#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
199static struct resource ax88180_resources[] = {
200 [0] = {
201 .start = 0x20300000,
202 .end = 0x20300000 + 0x8000,
203 .flags = IORESOURCE_MEM,
204 },
205 [1] = {
206 .start = IRQ_PF7,
207 .end = IRQ_PF7,
208 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
209 },
210};
211
212static struct platform_device ax88180_device = {
213 .name = "ax88180",
214 .id = -1,
215 .num_resources = ARRAY_SIZE(ax88180_resources),
216 .resource = ax88180_resources,
217};
218#endif
219
1394f032
BW		 220#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
221static struct resource sl811_hcd_resources[] = {
222 {
223 .start = 0x20340000,
224 .end = 0x20340000,
225 .flags = IORESOURCE_MEM,
1f83b8f1 226 }, {
1394f032
BW		 227 .start = 0x20340004,
228 .end = 0x20340004,
229 .flags = IORESOURCE_MEM,
1f83b8f1 230 }, {
1394f032
BW		 231 .start = CONFIG_USB_SL811_BFIN_IRQ,
232 .end = CONFIG_USB_SL811_BFIN_IRQ,
233 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
234 },
235};
236
237#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
238void sl811_port_power(struct device *dev, int is_on)
239{
c6c4d7bb 240 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 241 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 242}
243#endif
244
245static struct sl811_platform_data sl811_priv = {
246 .potpg = 10,
247 .power = 250, /* == 500mA */
248#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
249 .port_power = &sl811_port_power,
250#endif
251};
252
253static struct platform_device sl811_hcd_device = {
254 .name = "sl811-hcd",
255 .id = 0,
256 .dev = {
257 .platform_data = &sl811_priv,
258 },
259 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
260 .resource = sl811_hcd_resources,
261};
262#endif
263
264#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
265static struct resource isp1362_hcd_resources[] = {
266 {
267 .start = 0x20360000,
268 .end = 0x20360000,
269 .flags = IORESOURCE_MEM,
1f83b8f1 270 }, {
1394f032
BW		 271 .start = 0x20360004,
272 .end = 0x20360004,
273 .flags = IORESOURCE_MEM,
1f83b8f1 274 }, {
1394f032
BW		 275 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
276 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
277 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
278 },
279};
280
281static struct isp1362_platform_data isp1362_priv = {
282 .sel15Kres = 1,
283 .clknotstop = 0,
284 .oc_enable = 0,
285 .int_act_high = 0,
286 .int_edge_triggered = 0,
287 .remote_wakeup_connected = 0,
288 .no_power_switching = 1,
289 .power_switching_mode = 0,
290};
291
292static struct platform_device isp1362_hcd_device = {
293 .name = "isp1362-hcd",
294 .id = 0,
295 .dev = {
296 .platform_data = &isp1362_priv,
297 },
298 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
299 .resource = isp1362_hcd_resources,
300};
301#endif
302
303#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 304static struct platform_device bfin_mii_bus = {
305 .name = "bfin_mii_bus",
306};
307
1394f032
BW		 308static struct platform_device bfin_mac_device = {
309 .name = "bfin_mac",
65319628 310 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 311};
312#endif
313
314#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
315static struct resource net2272_bfin_resources[] = {
316 {
317 .start = 0x20300000,
318 .end = 0x20300000 + 0x100,
319 .flags = IORESOURCE_MEM,
1f83b8f1 320 }, {
1394f032
BW		 321 .start = IRQ_PF7,
322 .end = IRQ_PF7,
323 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
324 },
325};
326
327static struct platform_device net2272_bfin_device = {
328 .name = "net2272",
329 .id = -1,
330 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
331 .resource = net2272_bfin_resources,
332};
333#endif
334
fc68911e
MF		 335#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
336#ifdef CONFIG_MTD_PARTITIONS
337const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
338
339static struct mtd_partition bfin_plat_nand_partitions[] = {
340 {
aa582977 341 .name = "linux kernel(nand)",
fc68911e
MF		 342 .size = 0x400000,
343 .offset = 0,
344 }, {
aa582977 345 .name = "file system(nand)",
fc68911e
MF		 346 .size = MTDPART_SIZ_FULL,
347 .offset = MTDPART_OFS_APPEND,
348 },
349};
350#endif
351
352#define BFIN_NAND_PLAT_CLE 2
353#define BFIN_NAND_PLAT_ALE 1
354static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
355{
356 struct nand_chip *this = mtd->priv;
357
358 if (cmd == NAND_CMD_NONE)
359 return;
360
361 if (ctrl & NAND_CLE)
362 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
363 else
364 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
365}
366
367#define BFIN_NAND_PLAT_READY GPIO_PF3
368static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
369{
370 return gpio_get_value(BFIN_NAND_PLAT_READY);
371}
372
373static struct platform_nand_data bfin_plat_nand_data = {
374 .chip = {
375 .chip_delay = 30,
376#ifdef CONFIG_MTD_PARTITIONS
377 .part_probe_types = part_probes,
378 .partitions = bfin_plat_nand_partitions,
379 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
380#endif
381 },
382 .ctrl = {
383 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
384 .dev_ready = bfin_plat_nand_dev_ready,
385 },
386};
387
388#define MAX(x, y) (x > y ? x : y)
389static struct resource bfin_plat_nand_resources = {
390 .start = 0x20212000,
391 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
392 .flags = IORESOURCE_IO,
393};
394
395static struct platform_device bfin_async_nand_device = {
396 .name = "gen_nand",
397 .id = -1,
398 .num_resources = 1,
399 .resource = &bfin_plat_nand_resources,
400 .dev = {
401 .platform_data = &bfin_plat_nand_data,
402 },
403};
404
405static void bfin_plat_nand_init(void)
406{
407 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
408}
409#else
410static void bfin_plat_nand_init(void) {}
411#endif
412
793dc27b 413#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 414static struct mtd_partition stamp_partitions[] = {
415 {
aa582977 416 .name = "bootloader(nor)",
edf05641 417 .size = 0x40000,
de8c43f2
MF		 418 .offset = 0,
419 }, {
aa582977 420 .name = "linux kernel(nor)",
6ecb5b6d 421 .size = 0x180000,
de8c43f2
MF		 422 .offset = MTDPART_OFS_APPEND,
423 }, {
aa582977 424 .name = "file system(nor)",
6ecb5b6d 425 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 426 .offset = MTDPART_OFS_APPEND,
427 }, {
aa582977 428 .name = "MAC Address(nor)",
de8c43f2
MF		 429 .size = MTDPART_SIZ_FULL,
430 .offset = 0x3F0000,
431 .mask_flags = MTD_WRITEABLE,
432 }
433};
434
435static struct physmap_flash_data stamp_flash_data = {
436 .width = 2,
437 .parts = stamp_partitions,
438 .nr_parts = ARRAY_SIZE(stamp_partitions),
439};
440
441static struct resource stamp_flash_resource = {
442 .start = 0x20000000,
443 .end = 0x203fffff,
444 .flags = IORESOURCE_MEM,
445};
446
447static struct platform_device stamp_flash_device = {
448 .name = "physmap-flash",
449 .id = 0,
450 .dev = {
451 .platform_data = &stamp_flash_data,
452 },
453 .num_resources = 1,
454 .resource = &stamp_flash_resource,
455};
793dc27b 456#endif
de8c43f2 457
1394f032
BW		 458#if defined(CONFIG_MTD_M25P80) \
459 || defined(CONFIG_MTD_M25P80_MODULE)
460static struct mtd_partition bfin_spi_flash_partitions[] = {
461 {
aa582977 462 .name = "bootloader(spi)",
edf05641 463 .size = 0x00040000,
1394f032
BW		 464 .offset = 0,
465 .mask_flags = MTD_CAP_ROM
1f83b8f1 466 }, {
aa582977 467 .name = "linux kernel(spi)",
6ecb5b6d 468 .size = 0x180000,
edf05641 469 .offset = MTDPART_OFS_APPEND,
1f83b8f1 470 }, {
aa582977 471 .name = "file system(spi)",
edf05641
MF		 472 .size = MTDPART_SIZ_FULL,
473 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 474 }
475};
476
477static struct flash_platform_data bfin_spi_flash_data = {
478 .name = "m25p80",
479 .parts = bfin_spi_flash_partitions,
480 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 481 /* .type = "m25p64", */
1394f032
BW		 482};
483
484/* SPI flash chip (m25p64) */
485static struct bfin5xx_spi_chip spi_flash_chip_info = {
486 .enable_dma = 0, /* use dma transfer with this chip*/
487 .bits_per_word = 8,
488};
489#endif
490
a261eec0
MF		 491#if defined(CONFIG_BFIN_SPI_ADC) \
492 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 493/* SPI ADC chip */
494static struct bfin5xx_spi_chip spi_adc_chip_info = {
495 .enable_dma = 1, /* use dma transfer with this chip*/
496 .bits_per_word = 16,
497};
498#endif
499
8312440e
BS		 500#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
501 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032
BW		 502static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
503 .enable_dma = 0,
504 .bits_per_word = 16,
505};
506#endif
507
d4b834c1
BS		 508#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
509 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
510static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
511 .enable_dma = 0,
512 .bits_per_word = 8,
513 .cs_gpio = GPIO_PF5,
514};
515#endif
516
427f277e
BS		 517#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
518#include <linux/input.h>
519#include <linux/input/ad714x.h>
520static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
521 .enable_dma = 0,
522 .bits_per_word = 16,
523};
524
525static struct ad714x_slider_plat slider_plat[] = {
526 {
527 .start_stage = 0,
528 .end_stage = 7,
529 .max_coord = 128,
530 },
531};
532
533static struct ad714x_button_plat button_plat[] = {
534 {
535 .keycode = BTN_FORWARD,
536 .l_mask = 0,
537 .h_mask = 0x600,
538 },
539 {
540 .keycode = BTN_LEFT,
541 .l_mask = 0,
542 .h_mask = 0x500,
543 },
544 {
545 .keycode = BTN_MIDDLE,
546 .l_mask = 0,
547 .h_mask = 0x800,
548 },
549 {
550 .keycode = BTN_RIGHT,
551 .l_mask = 0x100,
552 .h_mask = 0x400,
553 },
554 {
555 .keycode = BTN_BACK,
556 .l_mask = 0x200,
557 .h_mask = 0x400,
558 },
559};
560static struct ad714x_platform_data ad7147_platfrom_data = {
561 .slider_num = 1,
562 .button_num = 5,
563 .slider = slider_plat,
564 .button = button_plat,
565 .stage_cfg_reg = {
566 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
567 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
568 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
569 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
570 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
571 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
572 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
573 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
574 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
575 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
576 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
577 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
578 },
579 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
580};
581#endif
582
583#if defined(CONFIG_INPUT_EVAL_AD7142EB)
584#include <linux/input.h>
585#include <linux/input/ad714x.h>
586static struct ad714x_button_plat button_plat[] = {
587 {
588 .keycode = BTN_1,
589 .l_mask = 0,
590 .h_mask = 0x1,
591 },
592 {
593 .keycode = BTN_2,
594 .l_mask = 0,
595 .h_mask = 0x2,
596 },
597 {
598 .keycode = BTN_3,
599 .l_mask = 0,
600 .h_mask = 0x4,
601 },
602 {
603 .keycode = BTN_4,
604 .l_mask = 0x0,
605 .h_mask = 0x8,
606 },
607};
608static struct ad714x_platform_data ad7142_platfrom_data = {
609 .button_num = 4,
610 .button = button_plat,
611 .stage_cfg_reg = {
612 /* fixme: figure out right setting for all comoponent according
613 * to hardware feature of EVAL-AD7142EB board */
614 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
615 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
616 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
617 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
618 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
619 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
620 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
621 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
622 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
623 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
624 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
625 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
626 },
627 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
628};
629#endif
630
f79ea4cb
YL		 631#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
632#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
633
634static int bfin_mmc_spi_init(struct device *dev,
635 irqreturn_t (*detect_int)(int, void *), void *data)
636{
637 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
638 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
639}
640
641static void bfin_mmc_spi_exit(struct device *dev, void *data)
642{
643 free_irq(MMC_SPI_CARD_DETECT_INT, data);
644}
645
646static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
647 .init = bfin_mmc_spi_init,
648 .exit = bfin_mmc_spi_exit,
649 .detect_delay = 100, /* msecs */
650};
651
652static struct bfin5xx_spi_chip mmc_spi_chip_info = {
653 .enable_dma = 0,
654 .bits_per_word = 8,
e68d1ebc 655 .pio_interrupt = 0,
f79ea4cb
YL		 656};
657#endif
658
1394f032 659#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 660#include <linux/spi/ad7877.h>
1394f032 661static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 662 .enable_dma = 0,
663 .bits_per_word = 16,
664};
665
666static const struct ad7877_platform_data bfin_ad7877_ts_info = {
667 .model = 7877,
668 .vref_delay_usecs = 50, /* internal, no capacitor */
669 .x_plate_ohms = 419,
670 .y_plate_ohms = 486,
671 .pressure_max = 1000,
672 .pressure_min = 0,
673 .stopacq_polarity = 1,
674 .first_conversion_delay = 3,
675 .acquisition_time = 1,
676 .averaging = 1,
677 .pen_down_acc_interval = 1,
678};
679#endif
680
46aa04f9
MH		 681#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
682#include <linux/spi/ad7879.h>
46aa04f9
MH		 683static const struct ad7879_platform_data bfin_ad7879_ts_info = {
684 .model = 7879, /* Model = AD7879 */
685 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
686 .pressure_max = 10000,
687 .pressure_min = 0,
688 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
689 .acquisition_time = 1, /* 4us acquisition time per sample */
690 .median = 2, /* do 8 measurements */
691 .averaging = 1, /* take the average of 4 middle samples */
692 .pen_down_acc_interval = 255, /* 9.4 ms */
693 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
694 .gpio_default = 1, /* During initialization set GPIO = HIGH */
695};
696#endif
697
ffc4d8bc
MH		 698#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
699#include <linux/input.h>
700#include <linux/spi/adxl34x.h>
701static const struct adxl34x_platform_data adxl34x_info = {
702 .x_axis_offset = 0,
703 .y_axis_offset = 0,
704 .z_axis_offset = 0,
705 .tap_threshold = 0x31,
706 .tap_duration = 0x10,
707 .tap_latency = 0x60,
708 .tap_window = 0xF0,
709 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
710 .act_axis_control = 0xFF,
711 .activity_threshold = 5,
712 .inactivity_threshold = 3,
713 .inactivity_time = 4,
714 .free_fall_threshold = 0x7,
715 .free_fall_time = 0x20,
716 .data_rate = 0x8,
717 .data_range = ADXL_FULL_RES,
718
719 .ev_type = EV_ABS,
720 .ev_code_x = ABS_X, /* EV_REL */
721 .ev_code_y = ABS_Y, /* EV_REL */
722 .ev_code_z = ABS_Z, /* EV_REL */
723
724 .ev_code_tap_x = BTN_TOUCH, /* EV_KEY */
725 .ev_code_tap_y = BTN_TOUCH, /* EV_KEY */
726 .ev_code_tap_z = BTN_TOUCH, /* EV_KEY */
727
728/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
729/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
730 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
731 .fifo_mode = ADXL_FIFO_STREAM,
732};
733#endif
734
f5150155
MH		 735#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
736static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
737 .enable_dma = 0,
738 .bits_per_word = 16,
739};
740#endif
741
6e668936
MH		 742#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
743static struct bfin5xx_spi_chip spidev_chip_info = {
744 .enable_dma = 0,
745 .bits_per_word = 8,
746};
747#endif
748
2043f3f7
MH		 749#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
750static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
751 .enable_dma = 0,
752 .bits_per_word = 8,
753};
754#endif
755
85a192e9
MH		 756#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
757static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
758 .enable_dma = 1,
759 .bits_per_word = 8,
760 .cs_gpio = GPIO_PF10,
761};
762#endif
763
8e9d5c7d
MH		 764#if defined(CONFIG_MTD_DATAFLASH) \
765 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 766
767static struct mtd_partition bfin_spi_dataflash_partitions[] = {
768 {
769 .name = "bootloader(spi)",
770 .size = 0x00040000,
771 .offset = 0,
772 .mask_flags = MTD_CAP_ROM
773 }, {
774 .name = "linux kernel(spi)",
6ecb5b6d 775 .size = 0x180000,
ceac2651
MH		 776 .offset = MTDPART_OFS_APPEND,
777 }, {
778 .name = "file system(spi)",
779 .size = MTDPART_SIZ_FULL,
780 .offset = MTDPART_OFS_APPEND,
781 }
782};
783
784static struct flash_platform_data bfin_spi_dataflash_data = {
785 .name = "SPI Dataflash",
786 .parts = bfin_spi_dataflash_partitions,
787 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
788};
789
8e9d5c7d
MH		 790/* DataFlash chip */
791static struct bfin5xx_spi_chip data_flash_chip_info = {
792 .enable_dma = 0, /* use dma transfer with this chip*/
793 .bits_per_word = 8,
794};
795#endif
796
1394f032
BW		 797static struct spi_board_info bfin_spi_board_info[] __initdata = {
798#if defined(CONFIG_MTD_M25P80) \
799 || defined(CONFIG_MTD_M25P80_MODULE)
800 {
801 /* the modalias must be the same as spi device driver name */
802 .modalias = "m25p80", /* Name of spi_driver for this device */
803 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 804 .bus_num = 0, /* Framework bus number */
1394f032
BW		 805 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
806 .platform_data = &bfin_spi_flash_data,
807 .controller_data = &spi_flash_chip_info,
808 .mode = SPI_MODE_3,
809 },
810#endif
8e9d5c7d
MH		 811#if defined(CONFIG_MTD_DATAFLASH) \
812 || defined(CONFIG_MTD_DATAFLASH_MODULE)
813 { /* DataFlash chip */
814 .modalias = "mtd_dataflash",
ceac2651 815 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 816 .bus_num = 0, /* Framework bus number */
817 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 818 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 819 .controller_data = &data_flash_chip_info,
820 .mode = SPI_MODE_3,
821 },
822#endif
a261eec0
MF		 823#if defined(CONFIG_BFIN_SPI_ADC) \
824 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 825 {
826 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
827 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 828 .bus_num = 0, /* Framework bus number */
1394f032
BW		 829 .chip_select = 1, /* Framework chip select. */
830 .platform_data = NULL, /* No spi_driver specific config */
831 .controller_data = &spi_adc_chip_info,
832 },
833#endif
834
8312440e
BS		 835#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
836 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032 837 {
dac98174 838 .modalias = "ad1836",
1394f032 839 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 840 .bus_num = 0,
8312440e 841 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
1394f032 842 .controller_data = &ad1836_spi_chip_info,
8312440e 843 .mode = SPI_MODE_3,
1394f032
BW		 844 },
845#endif
d4b834c1
BS		 846
847#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
848 {
dac98174 849 .modalias = "ad1938",
d4b834c1
BS		 850 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
851 .bus_num = 0,
852 .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
853 .controller_data = &ad1938_spi_chip_info,
854 .mode = SPI_MODE_3,
855 },
856#endif
857
427f277e
BS		 858#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
859 {
860 .modalias = "ad714x_captouch",
861 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
862 .irq = IRQ_PF4,
863 .bus_num = 0,
864 .chip_select = 5,
865 .mode = SPI_MODE_3,
866 .platform_data = &ad7147_platfrom_data,
867 .controller_data = &ad7147_spi_chip_info,
868 },
869#endif
870
f79ea4cb
YL		 871#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
872 {
873 .modalias = "mmc_spi",
874 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
875 .bus_num = 0,
876 .chip_select = 4,
877 .platform_data = &bfin_mmc_spi_pdata,
878 .controller_data = &mmc_spi_chip_info,
879 .mode = SPI_MODE_3,
880 },
881#endif
1394f032
BW		 882#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
883 {
884 .modalias = "ad7877",
885 .platform_data = &bfin_ad7877_ts_info,
886 .irq = IRQ_PF6,
887 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 888 .bus_num = 0,
1394f032
BW		 889 .chip_select = 1,
890 .controller_data = &spi_ad7877_chip_info,
891 },
892#endif
f5150155 893#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 894 {
895 .modalias = "ad7879",
896 .platform_data = &bfin_ad7879_ts_info,
897 .irq = IRQ_PF7,
898 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
899 .bus_num = 0,
900 .chip_select = 1,
901 .controller_data = &spi_ad7879_chip_info,
902 .mode = SPI_CPHA | SPI_CPOL,
903 },
904#endif
6e668936
MH		 905#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
906 {
907 .modalias = "spidev",
908 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
909 .bus_num = 0,
910 .chip_select = 1,
911 .controller_data = &spidev_chip_info,
912 },
913#endif
2043f3f7
MH		 914#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
915 {
916 .modalias = "bfin-lq035q1-spi",
917 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
918 .bus_num = 0,
46aa04f9 919 .chip_select = 2,
2043f3f7
MH		 920 .controller_data = &lq035q1_spi_chip_info,
921 .mode = SPI_CPHA | SPI_CPOL,
922 },
923#endif
85a192e9
MH		 924#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
925 {
926 .modalias = "enc28j60",
927 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
928 .irq = IRQ_PF6,
929 .bus_num = 0,
930 .chip_select = 0, /* GPIO controlled SSEL */
931 .controller_data = &enc28j60_spi_chip_info,
932 .mode = SPI_MODE_0,
933 },
934#endif
1394f032
BW		 935};
936
5bda2723 937#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 938/* SPI controller data */
c6c4d7bb 939static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 940 .num_chipselect = 8,
941 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 942 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 943};
944
c6c4d7bb
BW		 945/* SPI (0) */
946static struct resource bfin_spi0_resource[] = {
947 [0] = {
948 .start = SPI0_REGBASE,
949 .end = SPI0_REGBASE + 0xFF,
950 .flags = IORESOURCE_MEM,
951 },
952 [1] = {
953 .start = CH_SPI,
954 .end = CH_SPI,
e68d1ebc
YL		 955 .flags = IORESOURCE_DMA,
956 },
957 [2] = {
958 .start = IRQ_SPI,
959 .end = IRQ_SPI,
c6c4d7bb
BW		 960 .flags = IORESOURCE_IRQ,
961 },
962};
963
964static struct platform_device bfin_spi0_device = {
965 .name = "bfin-spi",
966 .id = 0, /* Bus number */
967 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
968 .resource = bfin_spi0_resource,
1394f032 969 .dev = {
c6c4d7bb 970 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 971 },
972};
973#endif /* spi master and devices */
974
1e9aa955
CC		 975#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
976
977/* SPORT SPI controller data */
978static struct bfin5xx_spi_master bfin_sport_spi0_info = {
979 .num_chipselect = 1, /* master only supports one device */
980 .enable_dma = 0, /* master don't support DMA */
981 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
982 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
983};
984
985static struct resource bfin_sport_spi0_resource[] = {
986 [0] = {
987 .start = SPORT0_TCR1,
988 .end = SPORT0_TCR1 + 0xFF,
989 .flags = IORESOURCE_MEM,
990 },
991 [1] = {
992 .start = IRQ_SPORT0_ERROR,
993 .end = IRQ_SPORT0_ERROR,
994 .flags = IORESOURCE_IRQ,
995 },
996};
997
998static struct platform_device bfin_sport_spi0_device = {
999 .name = "bfin-sport-spi",
1000 .id = 1, /* Bus number */
1001 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1002 .resource = bfin_sport_spi0_resource,
1003 .dev = {
1004 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1005 },
1006};
1007
1008static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1009 .num_chipselect = 1, /* master only supports one device */
1010 .enable_dma = 0, /* master don't support DMA */
1011 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1012 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1013};
1014
1015static struct resource bfin_sport_spi1_resource[] = {
1016 [0] = {
1017 .start = SPORT1_TCR1,
1018 .end = SPORT1_TCR1 + 0xFF,
1019 .flags = IORESOURCE_MEM,
1020 },
1021 [1] = {
1022 .start = IRQ_SPORT1_ERROR,
1023 .end = IRQ_SPORT1_ERROR,
1024 .flags = IORESOURCE_IRQ,
1025 },
1026};
1027
1028static struct platform_device bfin_sport_spi1_device = {
1029 .name = "bfin-sport-spi",
1030 .id = 2, /* Bus number */
1031 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1032 .resource = bfin_sport_spi1_resource,
1033 .dev = {
1034 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1035 },
1036};
1037
1038#endif /* sport spi master and devices */
1039
1394f032
BW		 1040#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1041static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1042 .name = "bf537-lq035",
1043};
1044#endif
1045
2043f3f7
MH		 1046#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1047#include <asm/bfin-lq035q1.h>
1048
1049static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1050 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
46aa04f9 1051 .use_bl = 0, /* let something else control the LCD Blacklight */
2043f3f7
MH		 1052 .gpio_bl = GPIO_PF7,
1053};
1054
1055static struct resource bfin_lq035q1_resources[] = {
1056 {
1057 .start = IRQ_PPI_ERROR,
1058 .end = IRQ_PPI_ERROR,
1059 .flags = IORESOURCE_IRQ,
1060 },
1061};
1062
1063static struct platform_device bfin_lq035q1_device = {
1064 .name = "bfin-lq035q1",
1065 .id = -1,
1066 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1067 .resource = bfin_lq035q1_resources,
1068 .dev = {
1069 .platform_data = &bfin_lq035q1_data,
1070 },
1071};
1072#endif
1073
1394f032
BW		 1074#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1075static struct resource bfin_uart_resources[] = {
233b28a9 1076#ifdef CONFIG_SERIAL_BFIN_UART0
1394f032
BW		 1077 {
1078 .start = 0xFFC00400,
1079 .end = 0xFFC004FF,
1080 .flags = IORESOURCE_MEM,
233b28a9
SZ		 1081 },
1082#endif
1083#ifdef CONFIG_SERIAL_BFIN_UART1
1084 {
1394f032
BW		 1085 .start = 0xFFC02000,
1086 .end = 0xFFC020FF,
1087 .flags = IORESOURCE_MEM,
1088 },
233b28a9 1089#endif
1394f032
BW		 1090};
1091
1092static struct platform_device bfin_uart_device = {
1093 .name = "bfin-uart",
1094 .id = 1,
1095 .num_resources = ARRAY_SIZE(bfin_uart_resources),
1096 .resource = bfin_uart_resources,
1097};
1098#endif
1099
5be36d22 1100#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1101#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1102static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1103 {
1104 .start = 0xFFC00400,
1105 .end = 0xFFC004FF,
1106 .flags = IORESOURCE_MEM,
1107 },
42bd8bcb
GY		 1108 {
1109 .start = IRQ_UART0_RX,
1110 .end = IRQ_UART0_RX+1,
1111 .flags = IORESOURCE_IRQ,
1112 },
1113 {
1114 .start = CH_UART0_RX,
1115 .end = CH_UART0_RX+1,
1116 .flags = IORESOURCE_DMA,
1117 },
1118};
1119
1120static struct platform_device bfin_sir0_device = {
1121 .name = "bfin_sir",
1122 .id = 0,
1123 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1124 .resource = bfin_sir0_resources,
1125};
5be36d22
GY		 1126#endif
1127#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1128static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1129 {
1130 .start = 0xFFC02000,
1131 .end = 0xFFC020FF,
1132 .flags = IORESOURCE_MEM,
1133 },
42bd8bcb
GY		 1134 {
1135 .start = IRQ_UART1_RX,
1136 .end = IRQ_UART1_RX+1,
1137 .flags = IORESOURCE_IRQ,
1138 },
1139 {
1140 .start = CH_UART1_RX,
1141 .end = CH_UART1_RX+1,
1142 .flags = IORESOURCE_DMA,
1143 },
5be36d22
GY		 1144};
1145
42bd8bcb 1146static struct platform_device bfin_sir1_device = {
5be36d22 1147 .name = "bfin_sir",
42bd8bcb
GY		 1148 .id = 1,
1149 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1150 .resource = bfin_sir1_resources,
5be36d22
GY		 1151};
1152#endif
42bd8bcb 1153#endif
5be36d22 1154
1394f032 1155#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1156static struct resource bfin_twi0_resource[] = {
1157 [0] = {
1158 .start = TWI0_REGBASE,
1159 .end = TWI0_REGBASE,
1160 .flags = IORESOURCE_MEM,
1161 },
1162 [1] = {
1163 .start = IRQ_TWI,
1164 .end = IRQ_TWI,
1165 .flags = IORESOURCE_IRQ,
1166 },
1167};
1168
1394f032
BW		 1169static struct platform_device i2c_bfin_twi_device = {
1170 .name = "i2c-bfin-twi",
1171 .id = 0,
c6c4d7bb
BW		 1172 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1173 .resource = bfin_twi0_resource,
1394f032
BW		 1174};
1175#endif
1176
51ed9ad7
MH		 1177#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1178#include <linux/input.h>
f39d56ec 1179#include <linux/i2c/adp5588.h>
51ed9ad7
MH		 1180static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1181 [0] = KEY_GRAVE,
1182 [1] = KEY_1,
1183 [2] = KEY_2,
1184 [3] = KEY_3,
1185 [4] = KEY_4,
1186 [5] = KEY_5,
1187 [6] = KEY_6,
1188 [7] = KEY_7,
1189 [8] = KEY_8,
1190 [9] = KEY_9,
1191 [10] = KEY_0,
1192 [11] = KEY_MINUS,
1193 [12] = KEY_EQUAL,
1194 [13] = KEY_BACKSLASH,
1195 [15] = KEY_KP0,
1196 [16] = KEY_Q,
1197 [17] = KEY_W,
1198 [18] = KEY_E,
1199 [19] = KEY_R,
1200 [20] = KEY_T,
1201 [21] = KEY_Y,
1202 [22] = KEY_U,
1203 [23] = KEY_I,
1204 [24] = KEY_O,
1205 [25] = KEY_P,
1206 [26] = KEY_LEFTBRACE,
1207 [27] = KEY_RIGHTBRACE,
1208 [29] = KEY_KP1,
1209 [30] = KEY_KP2,
1210 [31] = KEY_KP3,
1211 [32] = KEY_A,
1212 [33] = KEY_S,
1213 [34] = KEY_D,
1214 [35] = KEY_F,
1215 [36] = KEY_G,
1216 [37] = KEY_H,
1217 [38] = KEY_J,
1218 [39] = KEY_K,
1219 [40] = KEY_L,
1220 [41] = KEY_SEMICOLON,
1221 [42] = KEY_APOSTROPHE,
1222 [43] = KEY_BACKSLASH,
1223 [45] = KEY_KP4,
1224 [46] = KEY_KP5,
1225 [47] = KEY_KP6,
1226 [48] = KEY_102ND,
1227 [49] = KEY_Z,
1228 [50] = KEY_X,
1229 [51] = KEY_C,
1230 [52] = KEY_V,
1231 [53] = KEY_B,
1232 [54] = KEY_N,
1233 [55] = KEY_M,
1234 [56] = KEY_COMMA,
1235 [57] = KEY_DOT,
1236 [58] = KEY_SLASH,
1237 [60] = KEY_KPDOT,
1238 [61] = KEY_KP7,
1239 [62] = KEY_KP8,
1240 [63] = KEY_KP9,
1241 [64] = KEY_SPACE,
1242 [65] = KEY_BACKSPACE,
1243 [66] = KEY_TAB,
1244 [67] = KEY_KPENTER,
1245 [68] = KEY_ENTER,
1246 [69] = KEY_ESC,
1247 [70] = KEY_DELETE,
1248 [74] = KEY_KPMINUS,
1249 [76] = KEY_UP,
1250 [77] = KEY_DOWN,
1251 [78] = KEY_RIGHT,
1252 [79] = KEY_LEFT,
1253};
1254
1255static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1256 .rows = 8,
1257 .cols = 10,
1258 .keymap = adp5588_keymap,
1259 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1260 .repeat = 0,
1261};
1262#endif
1263
3ea57218
MH		 1264#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1265#include <linux/mfd/adp5520.h>
1266
1267 /*
1268 * ADP5520/5501 Backlight Data
1269 */
1270
1271static struct adp5520_backlight_platfrom_data adp5520_backlight_data = {
1272 .fade_in = FADE_T_1200ms,
1273 .fade_out = FADE_T_1200ms,
1274 .fade_led_law = BL_LAW_LINEAR,
1275 .en_ambl_sens = 1,
1276 .abml_filt = BL_AMBL_FILT_640ms,
1277 .l1_daylight_max = BL_CUR_mA(15),
1278 .l1_daylight_dim = BL_CUR_mA(0),
1279 .l2_office_max = BL_CUR_mA(7),
1280 .l2_office_dim = BL_CUR_mA(0),
1281 .l3_dark_max = BL_CUR_mA(3),
1282 .l3_dark_dim = BL_CUR_mA(0),
1283 .l2_trip = L2_COMP_CURR_uA(700),
1284 .l2_hyst = L2_COMP_CURR_uA(50),
1285 .l3_trip = L3_COMP_CURR_uA(80),
1286 .l3_hyst = L3_COMP_CURR_uA(20),
1287};
1288
1289 /*
1290 * ADP5520/5501 LEDs Data
1291 */
1292
1293#include <linux/leds.h>
1294
1295static struct led_info adp5520_leds[] = {
1296 {
1297 .name = "adp5520-led1",
1298 .default_trigger = "none",
1299 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | LED_OFFT_600ms,
1300 },
1301#ifdef ADP5520_EN_ALL_LEDS
1302 {
1303 .name = "adp5520-led2",
1304 .default_trigger = "none",
1305 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1306 },
1307 {
1308 .name = "adp5520-led3",
1309 .default_trigger = "none",
1310 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1311 },
1312#endif
1313};
1314
1315static struct adp5520_leds_platfrom_data adp5520_leds_data = {
1316 .num_leds = ARRAY_SIZE(adp5520_leds),
1317 .leds = adp5520_leds,
1318 .fade_in = FADE_T_600ms,
1319 .fade_out = FADE_T_600ms,
1320 .led_on_time = LED_ONT_600ms,
1321};
1322
1323 /*
1324 * ADP5520 GPIO Data
1325 */
1326
1327static struct adp5520_gpio_platfrom_data adp5520_gpio_data = {
1328 .gpio_start = 50,
1329 .gpio_en_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1330 .gpio_pullup_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1331};
1332
1333 /*
1334 * ADP5520 Keypad Data
1335 */
1336
1337#include <linux/input.h>
1338static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1339 [KEY(0, 0)] = KEY_GRAVE,
1340 [KEY(0, 1)] = KEY_1,
1341 [KEY(0, 2)] = KEY_2,
1342 [KEY(0, 3)] = KEY_3,
1343 [KEY(1, 0)] = KEY_4,
1344 [KEY(1, 1)] = KEY_5,
1345 [KEY(1, 2)] = KEY_6,
1346 [KEY(1, 3)] = KEY_7,
1347 [KEY(2, 0)] = KEY_8,
1348 [KEY(2, 1)] = KEY_9,
1349 [KEY(2, 2)] = KEY_0,
1350 [KEY(2, 3)] = KEY_MINUS,
1351 [KEY(3, 0)] = KEY_EQUAL,
1352 [KEY(3, 1)] = KEY_BACKSLASH,
1353 [KEY(3, 2)] = KEY_BACKSPACE,
1354 [KEY(3, 3)] = KEY_ENTER,
1355};
1356
1357static struct adp5520_keys_platfrom_data adp5520_keys_data = {
1358 .rows_en_mask = ROW_R3 | ROW_R2 | ROW_R1 | ROW_R0,
1359 .cols_en_mask = COL_C3 | COL_C2 | COL_C1 | COL_C0,
1360 .keymap = adp5520_keymap,
1361 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1362 .repeat = 0,
1363};
1364
1365 /*
1366 * ADP5520/5501 Multifuction Device Init Data
1367 */
1368
1369static struct adp5520_subdev_info adp5520_subdevs[] = {
1370 {
1371 .name = "adp5520-backlight",
1372 .id = ID_ADP5520,
1373 .platform_data = &adp5520_backlight_data,
1374 },
1375 {
1376 .name = "adp5520-led",
1377 .id = ID_ADP5520,
1378 .platform_data = &adp5520_leds_data,
1379 },
1380 {
1381 .name = "adp5520-gpio",
1382 .id = ID_ADP5520,
1383 .platform_data = &adp5520_gpio_data,
1384 },
1385 {
1386 .name = "adp5520-keys",
1387 .id = ID_ADP5520,
1388 .platform_data = &adp5520_keys_data,
1389 },
1390};
1391
1392static struct adp5520_platform_data adp5520_pdev_data = {
1393 .num_subdevs = ARRAY_SIZE(adp5520_subdevs),
1394 .subdevs = adp5520_subdevs,
1395};
1396
1397#endif
1398
ba877d44
MH		 1399#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1400#include <linux/i2c/adp5588.h>
1401static struct adp5588_gpio_platfrom_data adp5588_gpio_data = {
1402 .gpio_start = 50,
1403 .pullup_dis_mask = 0,
1404};
1405#endif
1406
81d9c7f2 1407static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
427f277e 1408#if defined(CONFIG_INPUT_EVAL_AD7142EB)
81d9c7f2 1409 {
427f277e 1410 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1411 .irq = IRQ_PG5,
427f277e 1412 .platform_data = (void *)&ad7142_platfrom_data,
81d9c7f2
BW		 1413 },
1414#endif
ebd58333 1415#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1416 {
1417 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1418 },
1419#endif
204844eb 1420#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1421 {
1422 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1423 .irq = IRQ_PG6,
1424 },
1425#endif
1426#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1427 {
1428 I2C_BOARD_INFO("ad7879", 0x2F),
1429 .irq = IRQ_PG5,
1430 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1431 },
1432#endif
51ed9ad7
MH		 1433#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1434 {
1435 I2C_BOARD_INFO("adp5588-keys", 0x34),
1436 .irq = IRQ_PG0,
1437 .platform_data = (void *)&adp5588_kpad_data,
1438 },
1439#endif
3ea57218
MH		 1440#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1441 {
1442 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1443 .irq = IRQ_PG0,
3ea57218
MH		 1444 .platform_data = (void *)&adp5520_pdev_data,
1445 },
1446#endif
ffc4d8bc
MH		 1447#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1448 {
1449 I2C_BOARD_INFO("adxl34x", 0x53),
1450 .irq = IRQ_PG3,
1451 .platform_data = (void *)&adxl34x_info,
1452 },
1453#endif
ba877d44
MH		 1454#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1455 {
1456 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1457 .platform_data = (void *)&adp5588_gpio_data,
1458 },
1459#endif
50c4c086
MH		 1460#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1461 {
1462 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1463 },
1464#endif
81d9c7f2 1465};
81d9c7f2 1466
1394f032
BW		 1467#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1468static struct platform_device bfin_sport0_uart_device = {
1469 .name = "bfin-sport-uart",
1470 .id = 0,
1471};
1472
1473static struct platform_device bfin_sport1_uart_device = {
1474 .name = "bfin-sport-uart",
1475 .id = 1,
1476};
1477#endif
1478
c6c4d7bb 1479#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 1480#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1481/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 1482
2c8beb2c
MH		 1483#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1484#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 1485static struct pata_platform_info bfin_pata_platform_data = {
1486 .ioport_shift = 1,
64e5c512 1487 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 1488};
1489
1490static struct resource bfin_pata_resources[] = {
1491 {
1492 .start = 0x20314020,
1493 .end = 0x2031403F,
1494 .flags = IORESOURCE_MEM,
1495 },
1496 {
1497 .start = 0x2031401C,
1498 .end = 0x2031401F,
1499 .flags = IORESOURCE_MEM,
1500 },
1501 {
1502 .start = PATA_INT,
1503 .end = PATA_INT,
1504 .flags = IORESOURCE_IRQ,
1505 },
1506};
2c8beb2c
MH		 1507#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1508static struct pata_platform_info bfin_pata_platform_data = {
1509 .ioport_shift = 0,
1510};
648882d9
MH		 1511/* CompactFlash Storage Card Memory Mapped Adressing
1512 * /REG = A11 = 1
1513 */
2c8beb2c
MH		 1514static struct resource bfin_pata_resources[] = {
1515 {
648882d9
MH		 1516 .start = 0x20211800,
1517 .end = 0x20211807,
2c8beb2c
MH		 1518 .flags = IORESOURCE_MEM,
1519 },
1520 {
648882d9
MH		 1521 .start = 0x2021180E, /* Device Ctl */
1522 .end = 0x2021180E,
2c8beb2c
MH		 1523 .flags = IORESOURCE_MEM,
1524 },
1525};
1526#endif
c6c4d7bb
BW		 1527
1528static struct platform_device bfin_pata_device = {
1529 .name = "pata_platform",
1530 .id = -1,
1531 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1532 .resource = bfin_pata_resources,
1533 .dev = {
1534 .platform_data = &bfin_pata_platform_data,
1535 }
1536};
1537#endif
1538
14b03204
MH		 1539static const unsigned int cclk_vlev_datasheet[] =
1540{
1541 VRPAIR(VLEV_085, 250000000),
1542 VRPAIR(VLEV_090, 376000000),
1543 VRPAIR(VLEV_095, 426000000),
1544 VRPAIR(VLEV_100, 426000000),
1545 VRPAIR(VLEV_105, 476000000),
1546 VRPAIR(VLEV_110, 476000000),
1547 VRPAIR(VLEV_115, 476000000),
1548 VRPAIR(VLEV_120, 500000000),
1549 VRPAIR(VLEV_125, 533000000),
1550 VRPAIR(VLEV_130, 600000000),
1551};
1552
1553static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1554 .tuple_tab = cclk_vlev_datasheet,
1555 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1556 .vr_settling_time = 25 /* us */,
1557};
1558
1559static struct platform_device bfin_dpmc = {
1560 .name = "bfin dpmc",
1561 .dev = {
1562 .platform_data = &bfin_dmpc_vreg_data,
1563 },
1564};
1565
8312440e
BS		 1566#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1567static struct platform_device bfin_tdm = {
1568 .name = "bfin-tdm",
1569 /* TODO: add platform data here */
1570};
1571#endif
1572
1394f032 1573static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1574
1575 &bfin_dpmc,
1576
1394f032
BW		 1577#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1578 &bfin_pcmcia_cf_device,
1579#endif
1580
1581#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1582 &rtc_device,
1583#endif
1584
1585#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1586 &sl811_hcd_device,
1587#endif
1588
1589#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1590 &isp1362_hcd_device,
1591#endif
1592
3f375690
MH		 1593#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1594 &bfin_isp1760_device,
1595#endif
1596
1394f032
BW		 1597#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1598 &smc91x_device,
1599#endif
1600
f40d24d9
AL		 1601#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1602 &dm9000_device,
1603#endif
1604
561cc18b
MH		 1605#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
1606 &ax88180_device,
1607#endif
1608
1394f032 1609#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1610 &bfin_mii_bus,
1394f032
BW		 1611 &bfin_mac_device,
1612#endif
1613
1614#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1615 &net2272_bfin_device,
1616#endif
1617
1618#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 1619 &bfin_spi0_device,
1394f032
BW		 1620#endif
1621
1e9aa955
CC		 1622#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1623 &bfin_sport_spi0_device,
1624 &bfin_sport_spi1_device,
1625#endif
1626
1394f032
BW		 1627#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1628 &bfin_fb_device,
1629#endif
1630
2043f3f7
MH		 1631#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1632 &bfin_lq035q1_device,
1633#endif
1634
1394f032
BW		 1635#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1636 &bfin_uart_device,
1637#endif
1638
5be36d22 1639#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1640#ifdef CONFIG_BFIN_SIR0
1641 &bfin_sir0_device,
1642#endif
1643#ifdef CONFIG_BFIN_SIR1
1644 &bfin_sir1_device,
1645#endif
5be36d22
GY		 1646#endif
1647
1394f032
BW		 1648#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1649 &i2c_bfin_twi_device,
1650#endif
1651
1652#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1653 &bfin_sport0_uart_device,
1654 &bfin_sport1_uart_device,
1655#endif
c6c4d7bb
BW		 1656
1657#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1658 &bfin_pata_device,
1659#endif
2463ef22
MH		 1660
1661#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1662 &bfin_device_gpiokeys,
1663#endif
cad2ab65 1664
fc68911e
MF		 1665#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1666 &bfin_async_nand_device,
1667#endif
1668
793dc27b 1669#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 1670 &stamp_flash_device,
793dc27b 1671#endif
8312440e
BS		 1672
1673#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1674 &bfin_tdm,
1675#endif
1394f032
BW		 1676};
1677
1678static int __init stamp_init(void)
1679{
b85d858b 1680 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2
BW		 1681 i2c_register_board_info(0, bfin_i2c_board_info,
1682 ARRAY_SIZE(bfin_i2c_board_info));
fc68911e 1683 bfin_plat_nand_init();
1394f032 1684 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1685 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 1686
1394f032
BW		 1687 return 0;
1688}
1689
1690arch_initcall(stamp_init);
c6c4d7bb
BW		 1691
1692void native_machine_restart(char *cmd)
1693{
1694 /* workaround reboot hang when booting from SPI */
1695 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1696 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 1697}
137b1529
MF		 1698
1699/*
1700 * Currently the MAC address is saved in Flash by U-Boot
1701 */
1702#define FLASH_MAC 0x203f0000
9862cc52 1703void bfin_get_ether_addr(char *addr)
137b1529
MF		 1704{
1705 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
1706 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
1707}
9862cc52 1708EXPORT_SYMBOL(bfin_get_ether_addr);
Linux kernel - Deliverables
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