Commit | Line | Data |
---|---|---|
1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf537/boards/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/spi/flash.h> | |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 38 | #include <linux/usb/isp1362.h> |
1394f032 | 39 | #endif |
c6c4d7bb | 40 | #include <linux/pata_platform.h> |
1394f032 BW |
41 | #include <linux/irq.h> |
42 | #include <linux/interrupt.h> | |
27f5d75a | 43 | #include <linux/usb/sl811.h> |
c6c4d7bb | 44 | #include <asm/dma.h> |
1f83b8f1 | 45 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 46 | #include <asm/reboot.h> |
5d448dd5 | 47 | #include <asm/portmux.h> |
1394f032 BW |
48 | #include <linux/spi/ad7877.h> |
49 | ||
50 | /* | |
51 | * Name the Board for the /proc/cpuinfo | |
52 | */ | |
066954a3 | 53 | const char bfin_board_name[] = "ADDS-BF537-STAMP"; |
1394f032 BW |
54 | |
55 | /* | |
56 | * Driver needs to know address, irq and flag pin. | |
57 | */ | |
58 | ||
59 | #define ISP1761_BASE 0x203C0000 | |
60 | #define ISP1761_IRQ IRQ_PF7 | |
61 | ||
62 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) | |
63 | static struct resource bfin_isp1761_resources[] = { | |
64 | [0] = { | |
65 | .name = "isp1761-regs", | |
66 | .start = ISP1761_BASE + 0x00000000, | |
67 | .end = ISP1761_BASE + 0x000fffff, | |
68 | .flags = IORESOURCE_MEM, | |
69 | }, | |
70 | [1] = { | |
71 | .start = ISP1761_IRQ, | |
72 | .end = ISP1761_IRQ, | |
73 | .flags = IORESOURCE_IRQ, | |
74 | }, | |
75 | }; | |
76 | ||
77 | static struct platform_device bfin_isp1761_device = { | |
78 | .name = "isp1761", | |
79 | .id = 0, | |
80 | .num_resources = ARRAY_SIZE(bfin_isp1761_resources), | |
81 | .resource = bfin_isp1761_resources, | |
82 | }; | |
83 | ||
84 | static struct platform_device *bfin_isp1761_devices[] = { | |
85 | &bfin_isp1761_device, | |
86 | }; | |
87 | ||
88 | int __init bfin_isp1761_init(void) | |
89 | { | |
1f83b8f1 | 90 | unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices); |
1394f032 BW |
91 | |
92 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
93 | set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); | |
94 | ||
95 | return platform_add_devices(bfin_isp1761_devices, num_devices); | |
96 | } | |
97 | ||
98 | void __exit bfin_isp1761_exit(void) | |
99 | { | |
100 | platform_device_unregister(&bfin_isp1761_device); | |
101 | } | |
102 | ||
103 | arch_initcall(bfin_isp1761_init); | |
104 | #endif | |
105 | ||
2463ef22 MH |
106 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
107 | #include <linux/input.h> | |
108 | #include <linux/gpio_keys.h> | |
109 | ||
110 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
111 | {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"}, | |
112 | {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"}, | |
113 | {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"}, | |
114 | {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"}, | |
115 | }; | |
116 | ||
117 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
118 | .buttons = bfin_gpio_keys_table, | |
119 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
120 | }; | |
121 | ||
122 | static struct platform_device bfin_device_gpiokeys = { | |
123 | .name = "gpio-keys", | |
124 | .dev = { | |
125 | .platform_data = &bfin_gpio_keys_data, | |
126 | }, | |
127 | }; | |
128 | #endif | |
129 | ||
1394f032 BW |
130 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) |
131 | static struct resource bfin_pcmcia_cf_resources[] = { | |
132 | { | |
133 | .start = 0x20310000, /* IO PORT */ | |
134 | .end = 0x20312000, | |
135 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 136 | }, { |
d2d50aa9 | 137 | .start = 0x20311000, /* Attribute Memory */ |
1394f032 BW |
138 | .end = 0x20311FFF, |
139 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 140 | }, { |
1394f032 BW |
141 | .start = IRQ_PF4, |
142 | .end = IRQ_PF4, | |
143 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
1f83b8f1 | 144 | }, { |
1394f032 BW |
145 | .start = 6, /* Card Detect PF6 */ |
146 | .end = 6, | |
147 | .flags = IORESOURCE_IRQ, | |
148 | }, | |
149 | }; | |
150 | ||
151 | static struct platform_device bfin_pcmcia_cf_device = { | |
152 | .name = "bfin_cf_pcmcia", | |
153 | .id = -1, | |
154 | .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), | |
155 | .resource = bfin_pcmcia_cf_resources, | |
156 | }; | |
157 | #endif | |
158 | ||
159 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
160 | static struct platform_device rtc_device = { | |
161 | .name = "rtc-bfin", | |
162 | .id = -1, | |
163 | }; | |
164 | #endif | |
165 | ||
166 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
167 | static struct resource smc91x_resources[] = { | |
168 | { | |
169 | .name = "smc91x-regs", | |
170 | .start = 0x20300300, | |
171 | .end = 0x20300300 + 16, | |
172 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 173 | }, { |
1394f032 BW |
174 | |
175 | .start = IRQ_PF7, | |
176 | .end = IRQ_PF7, | |
177 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
178 | }, | |
179 | }; | |
180 | static struct platform_device smc91x_device = { | |
181 | .name = "smc91x", | |
182 | .id = 0, | |
183 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
184 | .resource = smc91x_resources, | |
185 | }; | |
186 | #endif | |
187 | ||
f40d24d9 AL |
188 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
189 | static struct resource dm9000_resources[] = { | |
190 | [0] = { | |
191 | .start = 0x203FB800, | |
192 | .end = 0x203FB800 + 8, | |
193 | .flags = IORESOURCE_MEM, | |
194 | }, | |
195 | [1] = { | |
196 | .start = IRQ_PF9, | |
197 | .end = IRQ_PF9, | |
198 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), | |
199 | }, | |
200 | }; | |
201 | ||
202 | static struct platform_device dm9000_device = { | |
203 | .name = "dm9000", | |
204 | .id = -1, | |
205 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
206 | .resource = dm9000_resources, | |
207 | }; | |
208 | #endif | |
209 | ||
561cc18b MH |
210 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
211 | static struct resource ax88180_resources[] = { | |
212 | [0] = { | |
213 | .start = 0x20300000, | |
214 | .end = 0x20300000 + 0x8000, | |
215 | .flags = IORESOURCE_MEM, | |
216 | }, | |
217 | [1] = { | |
218 | .start = IRQ_PF7, | |
219 | .end = IRQ_PF7, | |
220 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL), | |
221 | }, | |
222 | }; | |
223 | ||
224 | static struct platform_device ax88180_device = { | |
225 | .name = "ax88180", | |
226 | .id = -1, | |
227 | .num_resources = ARRAY_SIZE(ax88180_resources), | |
228 | .resource = ax88180_resources, | |
229 | }; | |
230 | #endif | |
231 | ||
1394f032 BW |
232 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) |
233 | static struct resource sl811_hcd_resources[] = { | |
234 | { | |
235 | .start = 0x20340000, | |
236 | .end = 0x20340000, | |
237 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 238 | }, { |
1394f032 BW |
239 | .start = 0x20340004, |
240 | .end = 0x20340004, | |
241 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 242 | }, { |
1394f032 BW |
243 | .start = CONFIG_USB_SL811_BFIN_IRQ, |
244 | .end = CONFIG_USB_SL811_BFIN_IRQ, | |
245 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
246 | }, | |
247 | }; | |
248 | ||
249 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
250 | void sl811_port_power(struct device *dev, int is_on) | |
251 | { | |
c6c4d7bb | 252 | gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); |
acbcd263 | 253 | gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); |
1394f032 BW |
254 | } |
255 | #endif | |
256 | ||
257 | static struct sl811_platform_data sl811_priv = { | |
258 | .potpg = 10, | |
259 | .power = 250, /* == 500mA */ | |
260 | #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) | |
261 | .port_power = &sl811_port_power, | |
262 | #endif | |
263 | }; | |
264 | ||
265 | static struct platform_device sl811_hcd_device = { | |
266 | .name = "sl811-hcd", | |
267 | .id = 0, | |
268 | .dev = { | |
269 | .platform_data = &sl811_priv, | |
270 | }, | |
271 | .num_resources = ARRAY_SIZE(sl811_hcd_resources), | |
272 | .resource = sl811_hcd_resources, | |
273 | }; | |
274 | #endif | |
275 | ||
276 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
277 | static struct resource isp1362_hcd_resources[] = { | |
278 | { | |
279 | .start = 0x20360000, | |
280 | .end = 0x20360000, | |
281 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 282 | }, { |
1394f032 BW |
283 | .start = 0x20360004, |
284 | .end = 0x20360004, | |
285 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 286 | }, { |
1394f032 BW |
287 | .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, |
288 | .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, | |
289 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
290 | }, | |
291 | }; | |
292 | ||
293 | static struct isp1362_platform_data isp1362_priv = { | |
294 | .sel15Kres = 1, | |
295 | .clknotstop = 0, | |
296 | .oc_enable = 0, | |
297 | .int_act_high = 0, | |
298 | .int_edge_triggered = 0, | |
299 | .remote_wakeup_connected = 0, | |
300 | .no_power_switching = 1, | |
301 | .power_switching_mode = 0, | |
302 | }; | |
303 | ||
304 | static struct platform_device isp1362_hcd_device = { | |
305 | .name = "isp1362-hcd", | |
306 | .id = 0, | |
307 | .dev = { | |
308 | .platform_data = &isp1362_priv, | |
309 | }, | |
310 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | |
311 | .resource = isp1362_hcd_resources, | |
312 | }; | |
313 | #endif | |
314 | ||
315 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | |
316 | static struct platform_device bfin_mac_device = { | |
317 | .name = "bfin_mac", | |
318 | }; | |
319 | #endif | |
320 | ||
321 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
322 | static struct resource net2272_bfin_resources[] = { | |
323 | { | |
324 | .start = 0x20300000, | |
325 | .end = 0x20300000 + 0x100, | |
326 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 327 | }, { |
1394f032 BW |
328 | .start = IRQ_PF7, |
329 | .end = IRQ_PF7, | |
330 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
331 | }, | |
332 | }; | |
333 | ||
334 | static struct platform_device net2272_bfin_device = { | |
335 | .name = "net2272", | |
336 | .id = -1, | |
337 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
338 | .resource = net2272_bfin_resources, | |
339 | }; | |
340 | #endif | |
341 | ||
342 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
343 | /* all SPI peripherals info goes here */ | |
344 | ||
345 | #if defined(CONFIG_MTD_M25P80) \ | |
346 | || defined(CONFIG_MTD_M25P80_MODULE) | |
347 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
348 | { | |
349 | .name = "bootloader", | |
350 | .size = 0x00020000, | |
351 | .offset = 0, | |
352 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 353 | }, { |
1394f032 BW |
354 | .name = "kernel", |
355 | .size = 0xe0000, | |
356 | .offset = 0x20000 | |
1f83b8f1 | 357 | }, { |
1394f032 BW |
358 | .name = "file system", |
359 | .size = 0x700000, | |
360 | .offset = 0x00100000, | |
361 | } | |
362 | }; | |
363 | ||
364 | static struct flash_platform_data bfin_spi_flash_data = { | |
365 | .name = "m25p80", | |
366 | .parts = bfin_spi_flash_partitions, | |
367 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
368 | .type = "m25p64", | |
369 | }; | |
370 | ||
371 | /* SPI flash chip (m25p64) */ | |
372 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
373 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
374 | .bits_per_word = 8, | |
375 | }; | |
376 | #endif | |
377 | ||
378 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
379 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
380 | /* SPI ADC chip */ | |
381 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
382 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
383 | .bits_per_word = 16, | |
384 | }; | |
385 | #endif | |
386 | ||
387 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
388 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
389 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
390 | .enable_dma = 0, | |
391 | .bits_per_word = 16, | |
392 | }; | |
393 | #endif | |
394 | ||
395 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
396 | static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |
397 | .enable_dma = 0, | |
398 | .bits_per_word = 16, | |
399 | }; | |
400 | #endif | |
401 | ||
402 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
403 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
404 | .enable_dma = 1, | |
405 | .bits_per_word = 8, | |
406 | }; | |
407 | #endif | |
408 | ||
409 | #if defined(CONFIG_PBX) | |
410 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
411 | .ctl_reg = 0x4, /* send zero */ | |
412 | .enable_dma = 0, | |
413 | .bits_per_word = 8, | |
414 | .cs_change_per_word = 1, | |
415 | }; | |
416 | #endif | |
417 | ||
418 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
419 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
420 | .enable_dma = 0, | |
421 | .bits_per_word = 16, | |
422 | }; | |
423 | #endif | |
424 | ||
425 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
426 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
1394f032 BW |
427 | .enable_dma = 0, |
428 | .bits_per_word = 16, | |
429 | }; | |
430 | ||
431 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
432 | .model = 7877, | |
433 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
434 | .x_plate_ohms = 419, | |
435 | .y_plate_ohms = 486, | |
436 | .pressure_max = 1000, | |
437 | .pressure_min = 0, | |
438 | .stopacq_polarity = 1, | |
439 | .first_conversion_delay = 3, | |
440 | .acquisition_time = 1, | |
441 | .averaging = 1, | |
442 | .pen_down_acc_interval = 1, | |
443 | }; | |
444 | #endif | |
445 | ||
446 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | |
447 | #if defined(CONFIG_MTD_M25P80) \ | |
448 | || defined(CONFIG_MTD_M25P80_MODULE) | |
449 | { | |
450 | /* the modalias must be the same as spi device driver name */ | |
451 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
452 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 453 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
454 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
455 | .platform_data = &bfin_spi_flash_data, | |
456 | .controller_data = &spi_flash_chip_info, | |
457 | .mode = SPI_MODE_3, | |
458 | }, | |
459 | #endif | |
460 | ||
461 | #if defined(CONFIG_SPI_ADC_BF533) \ | |
462 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
463 | { | |
464 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
465 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 466 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
467 | .chip_select = 1, /* Framework chip select. */ |
468 | .platform_data = NULL, /* No spi_driver specific config */ | |
469 | .controller_data = &spi_adc_chip_info, | |
470 | }, | |
471 | #endif | |
472 | ||
473 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | |
474 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
475 | { | |
476 | .modalias = "ad1836-spi", | |
477 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 478 | .bus_num = 0, |
1394f032 BW |
479 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
480 | .controller_data = &ad1836_spi_chip_info, | |
481 | }, | |
482 | #endif | |
483 | #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) | |
484 | { | |
485 | .modalias = "ad9960-spi", | |
486 | .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 487 | .bus_num = 0, |
1394f032 BW |
488 | .chip_select = 1, |
489 | .controller_data = &ad9960_spi_chip_info, | |
490 | }, | |
491 | #endif | |
492 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | |
493 | { | |
494 | .modalias = "spi_mmc_dummy", | |
111cf97d | 495 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 496 | .bus_num = 0, |
1394f032 BW |
497 | .chip_select = 0, |
498 | .platform_data = NULL, | |
499 | .controller_data = &spi_mmc_chip_info, | |
500 | .mode = SPI_MODE_3, | |
501 | }, | |
502 | { | |
503 | .modalias = "spi_mmc", | |
111cf97d | 504 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 505 | .bus_num = 0, |
1394f032 BW |
506 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
507 | .platform_data = NULL, | |
508 | .controller_data = &spi_mmc_chip_info, | |
509 | .mode = SPI_MODE_3, | |
510 | }, | |
511 | #endif | |
512 | #if defined(CONFIG_PBX) | |
513 | { | |
1f83b8f1 MF |
514 | .modalias = "fxs-spi", |
515 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
516 | .bus_num = 0, |
517 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 518 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
519 | .mode = SPI_MODE_3, |
520 | }, | |
521 | { | |
1f83b8f1 MF |
522 | .modalias = "fxo-spi", |
523 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
524 | .bus_num = 0, |
525 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 526 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
527 | .mode = SPI_MODE_3, |
528 | }, | |
529 | #endif | |
530 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
531 | { | |
532 | .modalias = "ad5304_spi", | |
533 | .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 534 | .bus_num = 0, |
1394f032 BW |
535 | .chip_select = 2, |
536 | .platform_data = NULL, | |
537 | .controller_data = &ad5304_chip_info, | |
538 | .mode = SPI_MODE_2, | |
539 | }, | |
540 | #endif | |
541 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | |
542 | { | |
543 | .modalias = "ad7877", | |
544 | .platform_data = &bfin_ad7877_ts_info, | |
545 | .irq = IRQ_PF6, | |
546 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c7d48966 | 547 | .bus_num = 0, |
1394f032 BW |
548 | .chip_select = 1, |
549 | .controller_data = &spi_ad7877_chip_info, | |
550 | }, | |
551 | #endif | |
552 | }; | |
553 | ||
554 | /* SPI controller data */ | |
c6c4d7bb | 555 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
556 | .num_chipselect = 8, |
557 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 558 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
559 | }; |
560 | ||
c6c4d7bb BW |
561 | /* SPI (0) */ |
562 | static struct resource bfin_spi0_resource[] = { | |
563 | [0] = { | |
564 | .start = SPI0_REGBASE, | |
565 | .end = SPI0_REGBASE + 0xFF, | |
566 | .flags = IORESOURCE_MEM, | |
567 | }, | |
568 | [1] = { | |
569 | .start = CH_SPI, | |
570 | .end = CH_SPI, | |
571 | .flags = IORESOURCE_IRQ, | |
572 | }, | |
573 | }; | |
574 | ||
575 | static struct platform_device bfin_spi0_device = { | |
576 | .name = "bfin-spi", | |
577 | .id = 0, /* Bus number */ | |
578 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
579 | .resource = bfin_spi0_resource, | |
1394f032 | 580 | .dev = { |
c6c4d7bb | 581 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
582 | }, |
583 | }; | |
584 | #endif /* spi master and devices */ | |
585 | ||
586 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
587 | static struct platform_device bfin_fb_device = { | |
c6c4d7bb BW |
588 | .name = "bf537-lq035", |
589 | }; | |
590 | #endif | |
591 | ||
592 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) | |
593 | static struct platform_device bfin_fb_adv7393_device = { | |
594 | .name = "bfin-adv7393", | |
1394f032 BW |
595 | }; |
596 | #endif | |
597 | ||
598 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
599 | static struct resource bfin_uart_resources[] = { | |
233b28a9 | 600 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
1394f032 BW |
601 | { |
602 | .start = 0xFFC00400, | |
603 | .end = 0xFFC004FF, | |
604 | .flags = IORESOURCE_MEM, | |
233b28a9 SZ |
605 | }, |
606 | #endif | |
607 | #ifdef CONFIG_SERIAL_BFIN_UART1 | |
608 | { | |
1394f032 BW |
609 | .start = 0xFFC02000, |
610 | .end = 0xFFC020FF, | |
611 | .flags = IORESOURCE_MEM, | |
612 | }, | |
233b28a9 | 613 | #endif |
1394f032 BW |
614 | }; |
615 | ||
616 | static struct platform_device bfin_uart_device = { | |
617 | .name = "bfin-uart", | |
618 | .id = 1, | |
619 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
620 | .resource = bfin_uart_resources, | |
621 | }; | |
622 | #endif | |
623 | ||
624 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
c6c4d7bb BW |
625 | static struct resource bfin_twi0_resource[] = { |
626 | [0] = { | |
627 | .start = TWI0_REGBASE, | |
628 | .end = TWI0_REGBASE, | |
629 | .flags = IORESOURCE_MEM, | |
630 | }, | |
631 | [1] = { | |
632 | .start = IRQ_TWI, | |
633 | .end = IRQ_TWI, | |
634 | .flags = IORESOURCE_IRQ, | |
635 | }, | |
636 | }; | |
637 | ||
1394f032 BW |
638 | static struct platform_device i2c_bfin_twi_device = { |
639 | .name = "i2c-bfin-twi", | |
640 | .id = 0, | |
c6c4d7bb BW |
641 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
642 | .resource = bfin_twi0_resource, | |
1394f032 BW |
643 | }; |
644 | #endif | |
645 | ||
646 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
647 | static struct platform_device bfin_sport0_uart_device = { | |
648 | .name = "bfin-sport-uart", | |
649 | .id = 0, | |
650 | }; | |
651 | ||
652 | static struct platform_device bfin_sport1_uart_device = { | |
653 | .name = "bfin-sport-uart", | |
654 | .id = 1, | |
655 | }; | |
656 | #endif | |
657 | ||
c6c4d7bb BW |
658 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
659 | #define PATA_INT 55 | |
660 | ||
661 | static struct pata_platform_info bfin_pata_platform_data = { | |
662 | .ioport_shift = 1, | |
64e5c512 | 663 | .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED, |
c6c4d7bb BW |
664 | }; |
665 | ||
666 | static struct resource bfin_pata_resources[] = { | |
667 | { | |
668 | .start = 0x20314020, | |
669 | .end = 0x2031403F, | |
670 | .flags = IORESOURCE_MEM, | |
671 | }, | |
672 | { | |
673 | .start = 0x2031401C, | |
674 | .end = 0x2031401F, | |
675 | .flags = IORESOURCE_MEM, | |
676 | }, | |
677 | { | |
678 | .start = PATA_INT, | |
679 | .end = PATA_INT, | |
680 | .flags = IORESOURCE_IRQ, | |
681 | }, | |
682 | }; | |
683 | ||
684 | static struct platform_device bfin_pata_device = { | |
685 | .name = "pata_platform", | |
686 | .id = -1, | |
687 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
688 | .resource = bfin_pata_resources, | |
689 | .dev = { | |
690 | .platform_data = &bfin_pata_platform_data, | |
691 | } | |
692 | }; | |
693 | #endif | |
694 | ||
1394f032 BW |
695 | static struct platform_device *stamp_devices[] __initdata = { |
696 | #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) | |
697 | &bfin_pcmcia_cf_device, | |
698 | #endif | |
699 | ||
700 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
701 | &rtc_device, | |
702 | #endif | |
703 | ||
704 | #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) | |
705 | &sl811_hcd_device, | |
706 | #endif | |
707 | ||
708 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
709 | &isp1362_hcd_device, | |
710 | #endif | |
711 | ||
712 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
713 | &smc91x_device, | |
714 | #endif | |
715 | ||
f40d24d9 AL |
716 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
717 | &dm9000_device, | |
718 | #endif | |
719 | ||
561cc18b MH |
720 | #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) |
721 | &ax88180_device, | |
722 | #endif | |
723 | ||
1394f032 BW |
724 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
725 | &bfin_mac_device, | |
726 | #endif | |
727 | ||
728 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
729 | &net2272_bfin_device, | |
730 | #endif | |
731 | ||
732 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 733 | &bfin_spi0_device, |
1394f032 BW |
734 | #endif |
735 | ||
736 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
737 | &bfin_fb_device, | |
738 | #endif | |
739 | ||
c6c4d7bb BW |
740 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
741 | &bfin_fb_adv7393_device, | |
742 | #endif | |
743 | ||
1394f032 BW |
744 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
745 | &bfin_uart_device, | |
746 | #endif | |
747 | ||
748 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
749 | &i2c_bfin_twi_device, | |
750 | #endif | |
751 | ||
752 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
753 | &bfin_sport0_uart_device, | |
754 | &bfin_sport1_uart_device, | |
755 | #endif | |
c6c4d7bb BW |
756 | |
757 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
758 | &bfin_pata_device, | |
759 | #endif | |
2463ef22 MH |
760 | |
761 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | |
762 | &bfin_device_gpiokeys, | |
763 | #endif | |
1394f032 BW |
764 | }; |
765 | ||
766 | static int __init stamp_init(void) | |
767 | { | |
768 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); | |
769 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | |
770 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
771 | spi_register_board_info(bfin_spi_board_info, | |
772 | ARRAY_SIZE(bfin_spi_board_info)); | |
773 | #endif | |
c6c4d7bb BW |
774 | |
775 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
776 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
777 | #endif | |
1394f032 BW |
778 | return 0; |
779 | } | |
780 | ||
781 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
782 | |
783 | void native_machine_restart(char *cmd) | |
784 | { | |
785 | /* workaround reboot hang when booting from SPI */ | |
786 | if ((bfin_read_SYSCR() & 0x7) == 0x3) | |
787 | bfin_gpio_reset_spi0_ssel1(); | |
788 | } | |
137b1529 MF |
789 | |
790 | /* | |
791 | * Currently the MAC address is saved in Flash by U-Boot | |
792 | */ | |
793 | #define FLASH_MAC 0x203f0000 | |
9862cc52 | 794 | void bfin_get_ether_addr(char *addr) |
137b1529 MF |
795 | { |
796 | *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); | |
797 | *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); | |
798 | } | |
9862cc52 | 799 | EXPORT_SYMBOL(bfin_get_ether_addr); |