[deliverable/linux.git] / arch / frv / Kconfig

config FRV
	bool
	default y
	select HAVE_IDE
	select HAVE_ARCH_TRACEHOOK
	select HAVE_IRQ_WORK
	select HAVE_PERF_EVENTS
	select HAVE_GENERIC_HARDIRQS
	select GENERIC_IRQ_SHOW
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select GENERIC_CPU_DEVICES
	select ARCH_WANT_IPC_PARSE_VERSION

config ZONE_DMA
	bool
	default y

config RWSEM_GENERIC_SPINLOCK
	bool
	default y

config RWSEM_XCHGADD_ALGORITHM
	bool

config GENERIC_HWEIGHT
	bool
	default y

config GENERIC_CALIBRATE_DELAY
	bool
	default n

config TIME_LOW_RES
	bool
	default y

config QUICKLIST
	bool
	default y

config ARCH_HAS_ILOG2_U32
	bool
	default y

config ARCH_HAS_ILOG2_U64
	bool
	default y

config HZ
	int
	default 1000

source "init/Kconfig"

source "kernel/Kconfig.freezer"


menu "Fujitsu FR-V system setup"

config MMU
	bool "MMU support"
	help
	  This options switches on and off support for the FR-V MMU
	  (effectively switching between vmlinux and uClinux). Not all FR-V
	  CPUs support this. Currently only the FR451 has a sufficiently
	  featured MMU.

config FRV_OUTOFLINE_ATOMIC_OPS
	bool "Out-of-line the FRV atomic operations"
	default n
	help
	  Setting this option causes the FR-V atomic operations to be mostly
	  implemented out-of-line.

	  See Documentation/frv/atomic-ops.txt for more information.

config HIGHMEM
	bool "High memory support"
	depends on MMU
	default y
	help
	  If you wish to use more than 256MB of memory with your MMU based
	  system, you will need to select this option. The kernel can only see
	  the memory between 0xC0000000 and 0xD0000000 directly... everything
	  else must be kmapped.

	  The arch is, however, capable of supporting up to 3GB of SDRAM.

config HIGHPTE
	bool "Allocate page tables in highmem"
	depends on HIGHMEM
	default y
	help
	  The VM uses one page of memory for each page table.  For systems
	  with a lot of RAM, this can be wasteful of precious low memory.
	  Setting this option will put user-space page tables in high memory.

source "mm/Kconfig"

choice
	prompt "uClinux kernel load address"
	depends on !MMU
	default UCPAGE_OFFSET_C0000000
	help
	  This option sets the base address for the uClinux kernel. The kernel
	  will rearrange the SDRAM layout to start at this address, and move
	  itself to start there. It must be greater than 0, and it must be
	  sufficiently less than 0xE0000000 that the SDRAM does not intersect
	  the I/O region.

	  The base address must also be aligned such that the SDRAM controller
	  can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.

config UCPAGE_OFFSET_20000000
       bool "0x20000000"

config UCPAGE_OFFSET_40000000
       bool "0x40000000"

config UCPAGE_OFFSET_60000000
       bool "0x60000000"

config UCPAGE_OFFSET_80000000
       bool "0x80000000"

config UCPAGE_OFFSET_A0000000
       bool "0xA0000000"

config UCPAGE_OFFSET_C0000000
       bool "0xC0000000 (Recommended)"

endchoice

config PAGE_OFFSET
	hex
	default 0x20000000 if UCPAGE_OFFSET_20000000
	default 0x40000000 if UCPAGE_OFFSET_40000000
	default 0x60000000 if UCPAGE_OFFSET_60000000
	default 0x80000000 if UCPAGE_OFFSET_80000000
	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	default 0xC0000000

config PROTECT_KERNEL
	bool "Protect core kernel against userspace"
	depends on !MMU
	default y
	help
	  Selecting this option causes the uClinux kernel to change the
	  permittivity of DAMPR register covering the core kernel image to
	  prevent userspace accessing the underlying memory directly.

choice
	prompt "CPU Caching mode"
	default FRV_DEFL_CACHE_WBACK
	help
	  This option determines the default caching mode for the kernel.

	  Write-Back caching mode involves the all reads and writes causing
	  the affected cacheline to be read into the cache first before being
	  operated upon. Memory is not then updated by a write until the cache
	  is filled and a cacheline needs to be displaced from the cache to
	  make room. Only at that point is it written back.

	  Write-Behind caching is similar to Write-Back caching, except that a
	  write won't fetch a cacheline into the cache if there isn't already
	  one there; it will write directly to memory instead.

	  Write-Through caching only fetches cachelines from memory on a
	  read. Writes always get written directly to memory. If the affected
	  cacheline is also in cache, it will be updated too.

	  The final option is to turn of caching entirely.

	  Note that not all CPUs support Write-Behind caching. If the CPU on
	  which the kernel is running doesn't, it'll fall back to Write-Back
	  caching.

config FRV_DEFL_CACHE_WBACK
	bool "Write-Back"

config FRV_DEFL_CACHE_WBEHIND
	bool "Write-Behind"

config FRV_DEFL_CACHE_WTHRU
	bool "Write-Through"

config FRV_DEFL_CACHE_DISABLED
	bool "Disabled"

endchoice

menu "CPU core support"

config CPU_FR401
	bool "Include FR401 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR401, FR401A and FR403 CPUs

config CPU_FR405
	bool "Include FR405 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR405 CPU

config CPU_FR451
	bool "Include FR451 core support"
	default y
	help
	  This enables support for the FR451 CPU

config CPU_FR451_COMPILE
	bool "Specifically compile for FR451 core"
	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR451 CPU

config CPU_FR551
	bool "Include FR551 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR555 CPU

config CPU_FR551_COMPILE
	bool "Specifically compile for FR551 core"
	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR555 CPU

config FRV_L1_CACHE_SHIFT
	int
	default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
	default "6" if CPU_FR551

endmenu

choice
	prompt "System support"
	default MB93091_VDK

config MB93091_VDK
	bool "MB93091 CPU board with or without motherboard"

config MB93093_PDK
	bool "MB93093 PDK unit"

endchoice

if MB93091_VDK
choice
	prompt "Motherboard support"
	default MB93090_MB00

config MB93090_MB00
	bool "Use the MB93090-MB00 motherboard"
	help
	  Select this option if the MB93091 CPU board is going to be used with
	  a MB93090-MB00 VDK motherboard

config MB93091_NO_MB
	bool "Use standalone"
	help
	  Select this option if the MB93091 CPU board is going to be used
	  without a motherboard

endchoice
endif

config FUJITSU_MB93493
	bool "MB93493 Multimedia chip"
	help
	  Select this option if the MB93493 multimedia chip is going to be
	  used.

choice
	prompt "GP-Relative data support"
	default GPREL_DATA_8
	help
	  This option controls what data, if any, should be placed in the GP
	  relative data sections. Using this means that the compiler can
	  generate accesses to the data using GR16-relative addressing which
	  is faster than absolute instructions and saves space (2 instructions
	  per access).

	  However, the GPREL region is limited in size because the immediate
	  value used in the load and store instructions is limited to a 12-bit
	  signed number.

	  So if the linker starts complaining that accesses to GPREL data are
	  out of range, try changing this option from the default.

	  Note that modules will always be compiled with this feature disabled
	  as the module data will not be in range of the GP base address.

config GPREL_DATA_8
	bool "Put data objects of up to 8 bytes into GP-REL"

config GPREL_DATA_4
	bool "Put data objects of up to 4 bytes into GP-REL"

config GPREL_DATA_NONE
	bool "Don't use GP-REL"

endchoice

config FRV_ONCPU_SERIAL
	bool "Use on-CPU serial ports"
	select SERIAL_8250
	default y

config PCI
	bool "Use PCI"
	depends on MB93090_MB00
	default y
	select GENERIC_PCI_IOMAP
	help
	  Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	  onboard. If you have one of these boards and you wish to use the PCI
	  facilities, say Y here.

config RESERVE_DMA_COHERENT
	bool "Reserve DMA coherent memory"
	depends on PCI && !MMU
	default y
	help
	  Many PCI drivers require access to uncached memory for DMA device
	  communications (such as is done with some Ethernet buffer rings). If
	  a fully featured MMU is available, this can be done through page
	  table settings, but if not, a region has to be set aside and marked
	  with a special DAMPR register.

	  Setting this option causes uClinux to set aside a portion of the
	  available memory for use in this manner. The memory will then be
	  unavailable for normal kernel use.

source "drivers/pci/Kconfig"

source "drivers/pcmcia/Kconfig"

menu "Power management options"

config ARCH_SUSPEND_POSSIBLE
	def_bool y

source kernel/power/Kconfig
endmenu

endmenu


menu "Executable formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "arch/frv/Kconfig.debug"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"
Commit	Line	Data
1da177e4 LT	1	config FRV
	2	bool
	3	default y
ec7748b5	4	select HAVE_IDE
4a3b9893	5	select HAVE_ARCH_TRACEHOOK
e360adbe	6	select HAVE_IRQ_WORK
cdd6c482	7	select HAVE_PERF_EVENTS
f39b02d6	8	select HAVE_GENERIC_HARDIRQS
3062aa50	9	select GENERIC_IRQ_SHOW
df013ffb	10	select ARCH_HAVE_NMI_SAFE_CMPXCHG
9f13a1fd	11	select GENERIC_CPU_DEVICES
c1d7e01d	12	select ARCH_WANT_IPC_PARSE_VERSION
1da177e4	13
66701b14 CL	14	config ZONE_DMA
	15	bool
	16	default y
	17
1da177e4 LT	18	config RWSEM_GENERIC_SPINLOCK
	19	bool
	20	default y
	21
	22	config RWSEM_XCHGADD_ALGORITHM
	23	bool
	24
1f6d7a93 AM	25	config GENERIC_HWEIGHT
	26	bool
	27	default y
	28
1da177e4 LT	29	config GENERIC_CALIBRATE_DELAY
	30	bool
	31	default n
	32
06027bdd IM	33	config TIME_LOW_RES
	34	bool
	35	default y
	36
8defab33	37	config QUICKLIST
f0d1b0b3 DH	38	bool
	39	default y
	40
8defab33	41	config ARCH_HAS_ILOG2_U32
f0d1b0b3 DH	42	bool
	43	default y
	44
8defab33	45	config ARCH_HAS_ILOG2_U64
81819f0f CL	46	bool
	47	default y
	48
bdc80787 PA	49	config HZ
	50	int
	51	default 1000
	52
1da177e4 LT	53	source "init/Kconfig"
1da177e4 LT	54
dc52ddc0 MH	55	source "kernel/Kconfig.freezer"
dc52ddc0 MH	56
1da177e4 LT	57
	58	menu "Fujitsu FR-V system setup"
	59
	60	config MMU
	61	bool "MMU support"
	62	help
	63	This options switches on and off support for the FR-V MMU
	64	(effectively switching between vmlinux and uClinux). Not all FR-V
	65	CPUs support this. Currently only the FR451 has a sufficiently
	66	featured MMU.
	67
	68	config FRV_OUTOFLINE_ATOMIC_OPS
	69	bool "Out-of-line the FRV atomic operations"
	70	default n
	71	help
	72	Setting this option causes the FR-V atomic operations to be mostly
	73	implemented out-of-line.
	74
0868ff7a	75	See Documentation/frv/atomic-ops.txt for more information.
1da177e4 LT	76
	77	config HIGHMEM
	78	bool "High memory support"
	79	depends on MMU
	80	default y
	81	help
	82	If you wish to use more than 256MB of memory with your MMU based
	83	system, you will need to select this option. The kernel can only see
	84	the memory between 0xC0000000 and 0xD0000000 directly... everything
	85	else must be kmapped.
	86
	87	The arch is, however, capable of supporting up to 3GB of SDRAM.
	88
	89	config HIGHPTE
	90	bool "Allocate page tables in highmem"
	91	depends on HIGHMEM
	92	default y
	93	help
	94	The VM uses one page of memory for each page table. For systems
	95	with a lot of RAM, this can be wasteful of precious low memory.
	96	Setting this option will put user-space page tables in high memory.
	97
3f22ab27 DH	98	source "mm/Kconfig"
3f22ab27 DH	99
1da177e4 LT	100	choice
	101	prompt "uClinux kernel load address"
	102	depends on !MMU
	103	default UCPAGE_OFFSET_C0000000
	104	help
	105	This option sets the base address for the uClinux kernel. The kernel
	106	will rearrange the SDRAM layout to start at this address, and move
	107	itself to start there. It must be greater than 0, and it must be
	108	sufficiently less than 0xE0000000 that the SDRAM does not intersect
	109	the I/O region.
	110
	111	The base address must also be aligned such that the SDRAM controller
	112	can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
	113
	114	config UCPAGE_OFFSET_20000000
	115	bool "0x20000000"
	116
	117	config UCPAGE_OFFSET_40000000
	118	bool "0x40000000"
	119
	120	config UCPAGE_OFFSET_60000000
	121	bool "0x60000000"
	122
	123	config UCPAGE_OFFSET_80000000
	124	bool "0x80000000"
	125
	126	config UCPAGE_OFFSET_A0000000
	127	bool "0xA0000000"
	128
	129	config UCPAGE_OFFSET_C0000000
	130	bool "0xC0000000 (Recommended)"
	131
	132	endchoice
	133
7038220a DH	134	config PAGE_OFFSET
	135	hex
	136	default 0x20000000 if UCPAGE_OFFSET_20000000
	137	default 0x40000000 if UCPAGE_OFFSET_40000000
	138	default 0x60000000 if UCPAGE_OFFSET_60000000
	139	default 0x80000000 if UCPAGE_OFFSET_80000000
	140	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	141	default 0xC0000000
	142
1da177e4 LT	143	config PROTECT_KERNEL
	144	bool "Protect core kernel against userspace"
	145	depends on !MMU
	146	default y
	147	help
	148	Selecting this option causes the uClinux kernel to change the
	149	permittivity of DAMPR register covering the core kernel image to
	150	prevent userspace accessing the underlying memory directly.
	151
	152	choice
	153	prompt "CPU Caching mode"
	154	default FRV_DEFL_CACHE_WBACK
	155	help
	156	This option determines the default caching mode for the kernel.
	157
	158	Write-Back caching mode involves the all reads and writes causing
	159	the affected cacheline to be read into the cache first before being
	160	operated upon. Memory is not then updated by a write until the cache
	161	is filled and a cacheline needs to be displaced from the cache to
	162	make room. Only at that point is it written back.
	163
	164	Write-Behind caching is similar to Write-Back caching, except that a
	165	write won't fetch a cacheline into the cache if there isn't already
	166	one there; it will write directly to memory instead.
	167
	168	Write-Through caching only fetches cachelines from memory on a
	169	read. Writes always get written directly to memory. If the affected
	170	cacheline is also in cache, it will be updated too.
	171
	172	The final option is to turn of caching entirely.
	173
	174	Note that not all CPUs support Write-Behind caching. If the CPU on
	175	which the kernel is running doesn't, it'll fall back to Write-Back
	176	caching.
	177
	178	config FRV_DEFL_CACHE_WBACK
	179	bool "Write-Back"
	180
	181	config FRV_DEFL_CACHE_WBEHIND
	182	bool "Write-Behind"
	183
	184	config FRV_DEFL_CACHE_WTHRU
	185	bool "Write-Through"
	186
	187	config FRV_DEFL_CACHE_DISABLED
	188	bool "Disabled"
	189
	190	endchoice
	191
	192	menu "CPU core support"
	193
	194	config CPU_FR401
	195	bool "Include FR401 core support"
	196	depends on !MMU
	197	default y
	198	help
	199	This enables support for the FR401, FR401A and FR403 CPUs
	200
	201	config CPU_FR405
	202	bool "Include FR405 core support"
	203	depends on !MMU
	204	default y
	205	help
	206	This enables support for the FR405 CPU
207
208	config CPU_FR451
209	bool "Include FR451 core support"
210	default y
211	help
212	This enables support for the FR451 CPU
213
214	config CPU_FR451_COMPILE
215	bool "Specifically compile for FR451 core"
216	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
217	default y
218	help
219	This causes appropriate flags to be passed to the compiler to
220	optimise for the FR451 CPU
221
222	config CPU_FR551
223	bool "Include FR551 core support"
224	depends on !MMU
225	default y
226	help
227	This enables support for the FR555 CPU
228
229	config CPU_FR551_COMPILE
230	bool "Specifically compile for FR551 core"
231	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
232	default y
233	help
234	This causes appropriate flags to be passed to the compiler to
235	optimise for the FR555 CPU
236
237	config FRV_L1_CACHE_SHIFT
238	int
239	default "5" if CPU_FR401 \|\| CPU_FR405 \|\| CPU_FR451
240	default "6" if CPU_FR551
241
242	endmenu
243
244	choice
245	prompt "System support"
246	default MB93091_VDK
247
248	config MB93091_VDK
249	bool "MB93091 CPU board with or without motherboard"
250
251	config MB93093_PDK
252	bool "MB93093 PDK unit"
253
254	endchoice
255
256	if MB93091_VDK
257	choice
258	prompt "Motherboard support"
259	default MB93090_MB00
260
261	config MB93090_MB00
262	bool "Use the MB93090-MB00 motherboard"
263	help
264	Select this option if the MB93091 CPU board is going to be used with
265	a MB93090-MB00 VDK motherboard
266
267	config MB93091_NO_MB
268	bool "Use standalone"
269	help
270	Select this option if the MB93091 CPU board is going to be used
271	without a motherboard
272
273	endchoice
274	endif
275
1bcbba30 DH	276	config FUJITSU_MB93493
	277	bool "MB93493 Multimedia chip"
	278	help
	279	Select this option if the MB93493 multimedia chip is going to be
	280	used.
	281
1da177e4 LT	282	choice
	283	prompt "GP-Relative data support"
	284	default GPREL_DATA_8
	285	help
	286	This option controls what data, if any, should be placed in the GP
	287	relative data sections. Using this means that the compiler can
	288	generate accesses to the data using GR16-relative addressing which
	289	is faster than absolute instructions and saves space (2 instructions
	290	per access).
	291
	292	However, the GPREL region is limited in size because the immediate
	293	value used in the load and store instructions is limited to a 12-bit
	294	signed number.
	295
	296	So if the linker starts complaining that accesses to GPREL data are
	297	out of range, try changing this option from the default.
	298
	299	Note that modules will always be compiled with this feature disabled
	300	as the module data will not be in range of the GP base address.
	301
	302	config GPREL_DATA_8
	303	bool "Put data objects of up to 8 bytes into GP-REL"
	304
	305	config GPREL_DATA_4
	306	bool "Put data objects of up to 4 bytes into GP-REL"
	307
	308	config GPREL_DATA_NONE
	309	bool "Don't use GP-REL"
	310
	311	endchoice
	312
f8aec757 DH	313	config FRV_ONCPU_SERIAL
	314	bool "Use on-CPU serial ports"
	315	select SERIAL_8250
	316	default y
	317
1da177e4 LT	318	config PCI
	319	bool "Use PCI"
	320	depends on MB93090_MB00
	321	default y
53224185	322	select GENERIC_PCI_IOMAP
1da177e4 LT	323	help
	324	Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	325	onboard. If you have one of these boards and you wish to use the PCI
	326	facilities, say Y here.
	327
1da177e4 LT	328	config RESERVE_DMA_COHERENT
	329	bool "Reserve DMA coherent memory"
	330	depends on PCI && !MMU
	331	default y
	332	help
	333	Many PCI drivers require access to uncached memory for DMA device
	334	communications (such as is done with some Ethernet buffer rings). If
	335	a fully featured MMU is available, this can be done through page
	336	table settings, but if not, a region has to be set aside and marked
	337	with a special DAMPR register.
	338
	339	Setting this option causes uClinux to set aside a portion of the
	340	available memory for use in this manner. The memory will then be
	341	unavailable for normal kernel use.
	342
	343	source "drivers/pci/Kconfig"
	344
7a758313	345	source "drivers/pcmcia/Kconfig"
1da177e4	346
1da177e4	347	menu "Power management options"
f4cb5700 JB	348
	349	config ARCH_SUSPEND_POSSIBLE
	350	def_bool y
f4cb5700	351
1da177e4 LT	352	source kernel/power/Kconfig
	353	endmenu
	354
	355	endmenu
	356
	357
	358	menu "Executable formats"
	359
	360	source "fs/Kconfig.binfmt"
	361
	362	endmenu
	363
d5950b43 SR	364	source "net/Kconfig"
d5950b43 SR	365
1da177e4 LT	366	source "drivers/Kconfig"
	367
	368	source "fs/Kconfig"
	369
	370	source "arch/frv/Kconfig.debug"
	371
	372	source "security/Kconfig"
	373
	374	source "crypto/Kconfig"
	375
	376	source "lib/Kconfig"