[deliverable/linux.git] / arch / frv / Kconfig

config FRV
	bool
	default y
	select HAVE_IDE
	select HAVE_ARCH_TRACEHOOK
	select HAVE_IRQ_WORK
	select HAVE_PERF_EVENTS
	select HAVE_GENERIC_HARDIRQS
	select GENERIC_IRQ_SHOW

config ZONE_DMA
	bool
	default y

config RWSEM_GENERIC_SPINLOCK
	bool
	default y

config RWSEM_XCHGADD_ALGORITHM
	bool

config GENERIC_HWEIGHT
	bool
	default y

config GENERIC_CALIBRATE_DELAY
	bool
	default n

config TIME_LOW_RES
	bool
	default y

config QUICKLIST
	bool
	default y

config ARCH_HAS_ILOG2_U32
	bool
	default y

config ARCH_HAS_ILOG2_U64
	bool
	default y

config HZ
	int
	default 1000

source "init/Kconfig"

source "kernel/Kconfig.freezer"


menu "Fujitsu FR-V system setup"

config MMU
	bool "MMU support"
	help
	  This options switches on and off support for the FR-V MMU
	  (effectively switching between vmlinux and uClinux). Not all FR-V
	  CPUs support this. Currently only the FR451 has a sufficiently
	  featured MMU.

config FRV_OUTOFLINE_ATOMIC_OPS
	bool "Out-of-line the FRV atomic operations"
	default n
	help
	  Setting this option causes the FR-V atomic operations to be mostly
	  implemented out-of-line.

	  See Documentation/frv/atomic-ops.txt for more information.

config HIGHMEM
	bool "High memory support"
	depends on MMU
	default y
	help
	  If you wish to use more than 256MB of memory with your MMU based
	  system, you will need to select this option. The kernel can only see
	  the memory between 0xC0000000 and 0xD0000000 directly... everything
	  else must be kmapped.

	  The arch is, however, capable of supporting up to 3GB of SDRAM.

config HIGHPTE
	bool "Allocate page tables in highmem"
	depends on HIGHMEM
	default y
	help
	  The VM uses one page of memory for each page table.  For systems
	  with a lot of RAM, this can be wasteful of precious low memory.
	  Setting this option will put user-space page tables in high memory.

source "mm/Kconfig"

choice
	prompt "uClinux kernel load address"
	depends on !MMU
	default UCPAGE_OFFSET_C0000000
	help
	  This option sets the base address for the uClinux kernel. The kernel
	  will rearrange the SDRAM layout to start at this address, and move
	  itself to start there. It must be greater than 0, and it must be
	  sufficiently less than 0xE0000000 that the SDRAM does not intersect
	  the I/O region.

	  The base address must also be aligned such that the SDRAM controller
	  can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.

config UCPAGE_OFFSET_20000000
       bool "0x20000000"

config UCPAGE_OFFSET_40000000
       bool "0x40000000"

config UCPAGE_OFFSET_60000000
       bool "0x60000000"

config UCPAGE_OFFSET_80000000
       bool "0x80000000"

config UCPAGE_OFFSET_A0000000
       bool "0xA0000000"

config UCPAGE_OFFSET_C0000000
       bool "0xC0000000 (Recommended)"

endchoice

config PAGE_OFFSET
	hex
	default 0x20000000 if UCPAGE_OFFSET_20000000
	default 0x40000000 if UCPAGE_OFFSET_40000000
	default 0x60000000 if UCPAGE_OFFSET_60000000
	default 0x80000000 if UCPAGE_OFFSET_80000000
	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	default 0xC0000000

config PROTECT_KERNEL
	bool "Protect core kernel against userspace"
	depends on !MMU
	default y
	help
	  Selecting this option causes the uClinux kernel to change the
	  permittivity of DAMPR register covering the core kernel image to
	  prevent userspace accessing the underlying memory directly.

choice
	prompt "CPU Caching mode"
	default FRV_DEFL_CACHE_WBACK
	help
	  This option determines the default caching mode for the kernel.

	  Write-Back caching mode involves the all reads and writes causing
	  the affected cacheline to be read into the cache first before being
	  operated upon. Memory is not then updated by a write until the cache
	  is filled and a cacheline needs to be displaced from the cache to
	  make room. Only at that point is it written back.

	  Write-Behind caching is similar to Write-Back caching, except that a
	  write won't fetch a cacheline into the cache if there isn't already
	  one there; it will write directly to memory instead.

	  Write-Through caching only fetches cachelines from memory on a
	  read. Writes always get written directly to memory. If the affected
	  cacheline is also in cache, it will be updated too.

	  The final option is to turn of caching entirely.

	  Note that not all CPUs support Write-Behind caching. If the CPU on
	  which the kernel is running doesn't, it'll fall back to Write-Back
	  caching.

config FRV_DEFL_CACHE_WBACK
	bool "Write-Back"

config FRV_DEFL_CACHE_WBEHIND
	bool "Write-Behind"

config FRV_DEFL_CACHE_WTHRU
	bool "Write-Through"

config FRV_DEFL_CACHE_DISABLED
	bool "Disabled"

endchoice

menu "CPU core support"

config CPU_FR401
	bool "Include FR401 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR401, FR401A and FR403 CPUs

config CPU_FR405
	bool "Include FR405 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR405 CPU

config CPU_FR451
	bool "Include FR451 core support"
	default y
	help
	  This enables support for the FR451 CPU

config CPU_FR451_COMPILE
	bool "Specifically compile for FR451 core"
	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR451 CPU

config CPU_FR551
	bool "Include FR551 core support"
	depends on !MMU
	default y
	help
	  This enables support for the FR555 CPU

config CPU_FR551_COMPILE
	bool "Specifically compile for FR551 core"
	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
	default y
	help
	  This causes appropriate flags to be passed to the compiler to
	  optimise for the FR555 CPU

config FRV_L1_CACHE_SHIFT
	int
	default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
	default "6" if CPU_FR551

endmenu

choice
	prompt "System support"
	default MB93091_VDK

config MB93091_VDK
	bool "MB93091 CPU board with or without motherboard"

config MB93093_PDK
	bool "MB93093 PDK unit"

endchoice

if MB93091_VDK
choice
	prompt "Motherboard support"
	default MB93090_MB00

config MB93090_MB00
	bool "Use the MB93090-MB00 motherboard"
	help
	  Select this option if the MB93091 CPU board is going to be used with
	  a MB93090-MB00 VDK motherboard

config MB93091_NO_MB
	bool "Use standalone"
	help
	  Select this option if the MB93091 CPU board is going to be used
	  without a motherboard

endchoice
endif

config FUJITSU_MB93493
	bool "MB93493 Multimedia chip"
	help
	  Select this option if the MB93493 multimedia chip is going to be
	  used.

choice
	prompt "GP-Relative data support"
	default GPREL_DATA_8
	help
	  This option controls what data, if any, should be placed in the GP
	  relative data sections. Using this means that the compiler can
	  generate accesses to the data using GR16-relative addressing which
	  is faster than absolute instructions and saves space (2 instructions
	  per access).

	  However, the GPREL region is limited in size because the immediate
	  value used in the load and store instructions is limited to a 12-bit
	  signed number.

	  So if the linker starts complaining that accesses to GPREL data are
	  out of range, try changing this option from the default.

	  Note that modules will always be compiled with this feature disabled
	  as the module data will not be in range of the GP base address.

config GPREL_DATA_8
	bool "Put data objects of up to 8 bytes into GP-REL"

config GPREL_DATA_4
	bool "Put data objects of up to 4 bytes into GP-REL"

config GPREL_DATA_NONE
	bool "Don't use GP-REL"

endchoice

config FRV_ONCPU_SERIAL
	bool "Use on-CPU serial ports"
	select SERIAL_8250
	default y

config PCI
	bool "Use PCI"
	depends on MB93090_MB00
	default y
	help
	  Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	  onboard. If you have one of these boards and you wish to use the PCI
	  facilities, say Y here.

config RESERVE_DMA_COHERENT
	bool "Reserve DMA coherent memory"
	depends on PCI && !MMU
	default y
	help
	  Many PCI drivers require access to uncached memory for DMA device
	  communications (such as is done with some Ethernet buffer rings). If
	  a fully featured MMU is available, this can be done through page
	  table settings, but if not, a region has to be set aside and marked
	  with a special DAMPR register.

	  Setting this option causes uClinux to set aside a portion of the
	  available memory for use in this manner. The memory will then be
	  unavailable for normal kernel use.

source "drivers/pci/Kconfig"

source "drivers/pcmcia/Kconfig"

#config MATH_EMULATION
#	bool "Math emulation support (EXPERIMENTAL)"
#	depends on EXPERIMENTAL
#	help
#	  At some point in the future, this will cause floating-point math
#	  instructions to be emulated by the kernel on machines that lack a
#	  floating-point math coprocessor.  Thrill-seekers and chronically
#	  sleep-deprived psychotic hacker types can say Y now, everyone else
#	  should probably wait a while.

menu "Power management options"

config ARCH_SUSPEND_POSSIBLE
	def_bool y

source kernel/power/Kconfig
endmenu

endmenu


menu "Executable formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "arch/frv/Kconfig.debug"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"
Commit	Line	Data
1da177e4 LT	1	config FRV
	2	bool
	3	default y
ec7748b5	4	select HAVE_IDE
4a3b9893	5	select HAVE_ARCH_TRACEHOOK
e360adbe	6	select HAVE_IRQ_WORK
cdd6c482	7	select HAVE_PERF_EVENTS
f39b02d6	8	select HAVE_GENERIC_HARDIRQS
3062aa50	9	select GENERIC_IRQ_SHOW
1da177e4	10
66701b14 CL	11	config ZONE_DMA
	12	bool
	13	default y
	14
1da177e4 LT	15	config RWSEM_GENERIC_SPINLOCK
	16	bool
	17	default y
	18
	19	config RWSEM_XCHGADD_ALGORITHM
	20	bool
	21
1f6d7a93 AM	22	config GENERIC_HWEIGHT
	23	bool
	24	default y
	25
1da177e4 LT	26	config GENERIC_CALIBRATE_DELAY
	27	bool
	28	default n
	29
06027bdd IM	30	config TIME_LOW_RES
	31	bool
	32	default y
	33
8defab33	34	config QUICKLIST
f0d1b0b3 DH	35	bool
	36	default y
	37
8defab33	38	config ARCH_HAS_ILOG2_U32
f0d1b0b3 DH	39	bool
	40	default y
	41
8defab33	42	config ARCH_HAS_ILOG2_U64
81819f0f CL	43	bool
	44	default y
	45
bdc80787 PA	46	config HZ
	47	int
	48	default 1000
	49
1da177e4 LT	50	source "init/Kconfig"
1da177e4 LT	51
dc52ddc0 MH	52	source "kernel/Kconfig.freezer"
dc52ddc0 MH	53
1da177e4 LT	54
	55	menu "Fujitsu FR-V system setup"
	56
	57	config MMU
	58	bool "MMU support"
	59	help
	60	This options switches on and off support for the FR-V MMU
	61	(effectively switching between vmlinux and uClinux). Not all FR-V
	62	CPUs support this. Currently only the FR451 has a sufficiently
	63	featured MMU.
	64
	65	config FRV_OUTOFLINE_ATOMIC_OPS
	66	bool "Out-of-line the FRV atomic operations"
	67	default n
	68	help
	69	Setting this option causes the FR-V atomic operations to be mostly
	70	implemented out-of-line.
	71
0868ff7a	72	See Documentation/frv/atomic-ops.txt for more information.
1da177e4 LT	73
	74	config HIGHMEM
	75	bool "High memory support"
	76	depends on MMU
	77	default y
	78	help
	79	If you wish to use more than 256MB of memory with your MMU based
	80	system, you will need to select this option. The kernel can only see
	81	the memory between 0xC0000000 and 0xD0000000 directly... everything
	82	else must be kmapped.
	83
	84	The arch is, however, capable of supporting up to 3GB of SDRAM.
	85
	86	config HIGHPTE
	87	bool "Allocate page tables in highmem"
	88	depends on HIGHMEM
	89	default y
	90	help
	91	The VM uses one page of memory for each page table. For systems
	92	with a lot of RAM, this can be wasteful of precious low memory.
	93	Setting this option will put user-space page tables in high memory.
	94
3f22ab27 DH	95	source "mm/Kconfig"
3f22ab27 DH	96
1da177e4 LT	97	choice
	98	prompt "uClinux kernel load address"
	99	depends on !MMU
	100	default UCPAGE_OFFSET_C0000000
	101	help
	102	This option sets the base address for the uClinux kernel. The kernel
	103	will rearrange the SDRAM layout to start at this address, and move
	104	itself to start there. It must be greater than 0, and it must be
	105	sufficiently less than 0xE0000000 that the SDRAM does not intersect
	106	the I/O region.
	107
	108	The base address must also be aligned such that the SDRAM controller
	109	can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
	110
	111	config UCPAGE_OFFSET_20000000
	112	bool "0x20000000"
	113
	114	config UCPAGE_OFFSET_40000000
	115	bool "0x40000000"
	116
	117	config UCPAGE_OFFSET_60000000
	118	bool "0x60000000"
	119
	120	config UCPAGE_OFFSET_80000000
	121	bool "0x80000000"
	122
	123	config UCPAGE_OFFSET_A0000000
	124	bool "0xA0000000"
	125
	126	config UCPAGE_OFFSET_C0000000
	127	bool "0xC0000000 (Recommended)"
	128
	129	endchoice
	130
7038220a DH	131	config PAGE_OFFSET
	132	hex
	133	default 0x20000000 if UCPAGE_OFFSET_20000000
	134	default 0x40000000 if UCPAGE_OFFSET_40000000
	135	default 0x60000000 if UCPAGE_OFFSET_60000000
	136	default 0x80000000 if UCPAGE_OFFSET_80000000
	137	default 0xA0000000 if UCPAGE_OFFSET_A0000000
	138	default 0xC0000000
	139
1da177e4 LT	140	config PROTECT_KERNEL
	141	bool "Protect core kernel against userspace"
	142	depends on !MMU
	143	default y
	144	help
	145	Selecting this option causes the uClinux kernel to change the
	146	permittivity of DAMPR register covering the core kernel image to
	147	prevent userspace accessing the underlying memory directly.
	148
	149	choice
	150	prompt "CPU Caching mode"
	151	default FRV_DEFL_CACHE_WBACK
	152	help
	153	This option determines the default caching mode for the kernel.
	154
	155	Write-Back caching mode involves the all reads and writes causing
	156	the affected cacheline to be read into the cache first before being
	157	operated upon. Memory is not then updated by a write until the cache
	158	is filled and a cacheline needs to be displaced from the cache to
	159	make room. Only at that point is it written back.
	160
	161	Write-Behind caching is similar to Write-Back caching, except that a
	162	write won't fetch a cacheline into the cache if there isn't already
	163	one there; it will write directly to memory instead.
	164
	165	Write-Through caching only fetches cachelines from memory on a
	166	read. Writes always get written directly to memory. If the affected
	167	cacheline is also in cache, it will be updated too.
	168
	169	The final option is to turn of caching entirely.
	170
	171	Note that not all CPUs support Write-Behind caching. If the CPU on
	172	which the kernel is running doesn't, it'll fall back to Write-Back
	173	caching.
	174
	175	config FRV_DEFL_CACHE_WBACK
	176	bool "Write-Back"
	177
	178	config FRV_DEFL_CACHE_WBEHIND
	179	bool "Write-Behind"
	180
	181	config FRV_DEFL_CACHE_WTHRU
	182	bool "Write-Through"
	183
	184	config FRV_DEFL_CACHE_DISABLED
	185	bool "Disabled"
	186
	187	endchoice
	188
	189	menu "CPU core support"
	190
	191	config CPU_FR401
	192	bool "Include FR401 core support"
	193	depends on !MMU
	194	default y
	195	help
	196	This enables support for the FR401, FR401A and FR403 CPUs
	197
	198	config CPU_FR405
	199	bool "Include FR405 core support"
	200	depends on !MMU
	201	default y
	202	help
	203	This enables support for the FR405 CPU
204
205	config CPU_FR451
206	bool "Include FR451 core support"
207	default y
208	help
209	This enables support for the FR451 CPU
210
211	config CPU_FR451_COMPILE
212	bool "Specifically compile for FR451 core"
213	depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
214	default y
215	help
216	This causes appropriate flags to be passed to the compiler to
217	optimise for the FR451 CPU
218
219	config CPU_FR551
220	bool "Include FR551 core support"
221	depends on !MMU
222	default y
223	help
224	This enables support for the FR555 CPU
225
226	config CPU_FR551_COMPILE
227	bool "Specifically compile for FR551 core"
228	depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
229	default y
230	help
231	This causes appropriate flags to be passed to the compiler to
232	optimise for the FR555 CPU
233
234	config FRV_L1_CACHE_SHIFT
235	int
236	default "5" if CPU_FR401 \|\| CPU_FR405 \|\| CPU_FR451
237	default "6" if CPU_FR551
238
239	endmenu
240
241	choice
242	prompt "System support"
243	default MB93091_VDK
244
245	config MB93091_VDK
246	bool "MB93091 CPU board with or without motherboard"
247
248	config MB93093_PDK
249	bool "MB93093 PDK unit"
250
251	endchoice
252
253	if MB93091_VDK
254	choice
255	prompt "Motherboard support"
256	default MB93090_MB00
257
258	config MB93090_MB00
259	bool "Use the MB93090-MB00 motherboard"
260	help
261	Select this option if the MB93091 CPU board is going to be used with
262	a MB93090-MB00 VDK motherboard
263
264	config MB93091_NO_MB
265	bool "Use standalone"
266	help
267	Select this option if the MB93091 CPU board is going to be used
268	without a motherboard
269
270	endchoice
271	endif
272
1bcbba30 DH	273	config FUJITSU_MB93493
	274	bool "MB93493 Multimedia chip"
	275	help
	276	Select this option if the MB93493 multimedia chip is going to be
	277	used.
	278
1da177e4 LT	279	choice
	280	prompt "GP-Relative data support"
	281	default GPREL_DATA_8
	282	help
	283	This option controls what data, if any, should be placed in the GP
	284	relative data sections. Using this means that the compiler can
	285	generate accesses to the data using GR16-relative addressing which
	286	is faster than absolute instructions and saves space (2 instructions
	287	per access).
	288
	289	However, the GPREL region is limited in size because the immediate
	290	value used in the load and store instructions is limited to a 12-bit
	291	signed number.
	292
	293	So if the linker starts complaining that accesses to GPREL data are
	294	out of range, try changing this option from the default.
	295
	296	Note that modules will always be compiled with this feature disabled
	297	as the module data will not be in range of the GP base address.
	298
	299	config GPREL_DATA_8
	300	bool "Put data objects of up to 8 bytes into GP-REL"
	301
	302	config GPREL_DATA_4
	303	bool "Put data objects of up to 4 bytes into GP-REL"
	304
	305	config GPREL_DATA_NONE
	306	bool "Don't use GP-REL"
	307
	308	endchoice
	309
f8aec757 DH	310	config FRV_ONCPU_SERIAL
	311	bool "Use on-CPU serial ports"
	312	select SERIAL_8250
	313	default y
	314
1da177e4 LT	315	config PCI
	316	bool "Use PCI"
	317	depends on MB93090_MB00
	318	default y
	319	help
	320	Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
	321	onboard. If you have one of these boards and you wish to use the PCI
	322	facilities, say Y here.
	323
1da177e4 LT	324	config RESERVE_DMA_COHERENT
	325	bool "Reserve DMA coherent memory"
	326	depends on PCI && !MMU
	327	default y
	328	help
	329	Many PCI drivers require access to uncached memory for DMA device
	330	communications (such as is done with some Ethernet buffer rings). If
	331	a fully featured MMU is available, this can be done through page
	332	table settings, but if not, a region has to be set aside and marked
	333	with a special DAMPR register.
	334
	335	Setting this option causes uClinux to set aside a portion of the
	336	available memory for use in this manner. The memory will then be
	337	unavailable for normal kernel use.
	338
	339	source "drivers/pci/Kconfig"
	340
7a758313	341	source "drivers/pcmcia/Kconfig"
1da177e4 LT	342
	343	#config MATH_EMULATION
	344	# bool "Math emulation support (EXPERIMENTAL)"
	345	# depends on EXPERIMENTAL
	346	# help
	347	# At some point in the future, this will cause floating-point math
	348	# instructions to be emulated by the kernel on machines that lack a
	349	# floating-point math coprocessor. Thrill-seekers and chronically
	350	# sleep-deprived psychotic hacker types can say Y now, everyone else
	351	# should probably wait a while.
	352
	353	menu "Power management options"
f4cb5700 JB	354
	355	config ARCH_SUSPEND_POSSIBLE
	356	def_bool y
f4cb5700	357
1da177e4 LT	358	source kernel/power/Kconfig
	359	endmenu
	360
	361	endmenu
	362
	363
	364	menu "Executable formats"
	365
	366	source "fs/Kconfig.binfmt"
	367
	368	endmenu
	369
d5950b43 SR	370	source "net/Kconfig"
d5950b43 SR	371
1da177e4 LT	372	source "drivers/Kconfig"
	373
	374	source "fs/Kconfig"
	375
	376	source "arch/frv/Kconfig.debug"
	377
	378	source "security/Kconfig"
	379
	380	source "crypto/Kconfig"
	381
	382	source "lib/Kconfig"