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1da177e4 LT |
1 | /* process.c: FRV specific parts of process handling |
2 | * | |
3 | * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. | |
4 | * Written by David Howells (dhowells@redhat.com) | |
5 | * - Derived from arch/m68k/kernel/process.c | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
9dec17eb | 13 | #include <linux/module.h> |
1da177e4 LT |
14 | #include <linux/errno.h> |
15 | #include <linux/sched.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/mm.h> | |
18 | #include <linux/smp.h> | |
1da177e4 LT |
19 | #include <linux/stddef.h> |
20 | #include <linux/unistd.h> | |
21 | #include <linux/ptrace.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/user.h> | |
24 | #include <linux/elf.h> | |
25 | #include <linux/reboot.h> | |
26 | #include <linux/interrupt.h> | |
8defab33 | 27 | #include <linux/pagemap.h> |
41d8fe5b | 28 | #include <linux/rcupdate.h> |
1da177e4 | 29 | |
84e8cd6d | 30 | #include <asm/asm-offsets.h> |
1da177e4 | 31 | #include <asm/uaccess.h> |
1da177e4 LT |
32 | #include <asm/setup.h> |
33 | #include <asm/pgtable.h> | |
8defab33 | 34 | #include <asm/tlb.h> |
1da177e4 LT |
35 | #include <asm/gdb-stub.h> |
36 | #include <asm/mb-regs.h> | |
37 | ||
38 | #include "local.h" | |
39 | ||
40 | asmlinkage void ret_from_fork(void); | |
02ce496f | 41 | asmlinkage void ret_from_kernel_thread(void); |
1da177e4 LT |
42 | |
43 | #include <asm/pgalloc.h> | |
44 | ||
9dec17eb DH |
45 | void (*pm_power_off)(void); |
46 | EXPORT_SYMBOL(pm_power_off); | |
47 | ||
1da177e4 LT |
48 | static void core_sleep_idle(void) |
49 | { | |
50 | #ifdef LED_DEBUG_SLEEP | |
51 | /* Show that we're sleeping... */ | |
52 | __set_LEDS(0x55aa); | |
53 | #endif | |
54 | frv_cpu_core_sleep(); | |
55 | #ifdef LED_DEBUG_SLEEP | |
56 | /* ... and that we woke up */ | |
57 | __set_LEDS(0); | |
58 | #endif | |
59 | mb(); | |
60 | } | |
61 | ||
62 | void (*idle)(void) = core_sleep_idle; | |
63 | ||
64 | /* | |
65 | * The idle thread. There's no useful work to be | |
66 | * done, so just try to conserve power and have a | |
67 | * low exit latency (ie sit in a loop waiting for | |
68 | * somebody to say that they'd like to reschedule) | |
69 | */ | |
70 | void cpu_idle(void) | |
71 | { | |
72 | /* endless idle loop with no priority at all */ | |
73 | while (1) { | |
41d8fe5b | 74 | rcu_idle_enter(); |
1da177e4 | 75 | while (!need_resched()) { |
8defab33 CL |
76 | check_pgt_cache(); |
77 | ||
1da177e4 LT |
78 | if (!frv_dma_inprogress && idle) |
79 | idle(); | |
80 | } | |
41d8fe5b | 81 | rcu_idle_exit(); |
1da177e4 | 82 | |
bd2f5536 | 83 | schedule_preempt_disabled(); |
1da177e4 LT |
84 | } |
85 | } | |
86 | ||
87 | void machine_restart(char * __unused) | |
88 | { | |
89 | unsigned long reset_addr; | |
90 | #ifdef CONFIG_GDBSTUB | |
91 | gdbstub_exit(0); | |
92 | #endif | |
93 | ||
94 | if (PSR_IMPLE(__get_PSR()) == PSR_IMPLE_FR551) | |
95 | reset_addr = 0xfefff500; | |
96 | else | |
97 | reset_addr = 0xfeff0500; | |
98 | ||
99 | /* Software reset. */ | |
100 | asm volatile(" dcef @(gr0,gr0),1 ! membar !" | |
101 | " sti %1,@(%0,0) !" | |
102 | " nop ! nop ! nop ! nop ! nop ! " | |
103 | " nop ! nop ! nop ! nop ! nop ! " | |
104 | " nop ! nop ! nop ! nop ! nop ! " | |
105 | " nop ! nop ! nop ! nop ! nop ! " | |
106 | : : "r" (reset_addr), "r" (1) ); | |
107 | ||
108 | for (;;) | |
109 | ; | |
110 | } | |
111 | ||
112 | void machine_halt(void) | |
113 | { | |
114 | #ifdef CONFIG_GDBSTUB | |
115 | gdbstub_exit(0); | |
116 | #endif | |
117 | ||
118 | for (;;); | |
119 | } | |
120 | ||
121 | void machine_power_off(void) | |
122 | { | |
123 | #ifdef CONFIG_GDBSTUB | |
124 | gdbstub_exit(0); | |
125 | #endif | |
126 | ||
127 | for (;;); | |
128 | } | |
129 | ||
130 | void flush_thread(void) | |
131 | { | |
adc400f6 | 132 | /* nothing */ |
1da177e4 LT |
133 | } |
134 | ||
135 | inline unsigned long user_stack(const struct pt_regs *regs) | |
136 | { | |
137 | while (regs->next_frame) | |
138 | regs = regs->next_frame; | |
139 | return user_mode(regs) ? regs->sp : 0; | |
140 | } | |
141 | ||
1da177e4 LT |
142 | /* |
143 | * set up the kernel stack and exception frames for a new process | |
144 | */ | |
6f2c55b8 | 145 | int copy_thread(unsigned long clone_flags, |
49ed3398 | 146 | unsigned long usp, unsigned long arg, |
afa86fc4 | 147 | struct task_struct *p) |
1da177e4 | 148 | { |
02ce496f | 149 | struct pt_regs *childregs; |
1da177e4 | 150 | |
02ce496f | 151 | childregs = (struct pt_regs *) |
84e8cd6d | 152 | (task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE); |
1da177e4 | 153 | |
e7aa51b2 | 154 | /* set up the userspace frame (the only place that the USP is stored) */ |
b9763ce3 | 155 | *childregs = *current_pt_regs(); |
1da177e4 LT |
156 | |
157 | p->thread.frame = childregs; | |
158 | p->thread.curr = p; | |
159 | p->thread.sp = (unsigned long) childregs; | |
160 | p->thread.fp = 0; | |
161 | p->thread.lr = 0; | |
02ce496f | 162 | p->thread.frame0 = childregs; |
1da177e4 | 163 | |
b9763ce3 | 164 | if (unlikely(p->flags & PF_KTHREAD)) { |
49ed3398 AV |
165 | childregs->gr9 = usp; /* function */ |
166 | childregs->gr8 = arg; | |
49ed3398 AV |
167 | p->thread.pc = (unsigned long) ret_from_kernel_thread; |
168 | save_user_regs(p->thread.user); | |
169 | return 0; | |
170 | } | |
b9763ce3 AV |
171 | if (usp) |
172 | childregs->sp = usp; | |
49ed3398 AV |
173 | childregs->next_frame = NULL; |
174 | ||
175 | p->thread.pc = (unsigned long) ret_from_fork; | |
1da177e4 LT |
176 | |
177 | /* the new TLS pointer is passed in as arg #5 to sys_clone() */ | |
178 | if (clone_flags & CLONE_SETTLS) | |
179 | childregs->gr29 = childregs->gr12; | |
180 | ||
181 | save_user_regs(p->thread.user); | |
182 | ||
183 | return 0; | |
184 | } /* end copy_thread() */ | |
185 | ||
1da177e4 LT |
186 | unsigned long get_wchan(struct task_struct *p) |
187 | { | |
188 | struct pt_regs *regs0; | |
189 | unsigned long fp, pc; | |
190 | unsigned long stack_limit; | |
191 | int count = 0; | |
192 | if (!p || p == current || p->state == TASK_RUNNING) | |
193 | return 0; | |
194 | ||
195 | stack_limit = (unsigned long) (p + 1); | |
196 | fp = p->thread.fp; | |
197 | regs0 = p->thread.frame0; | |
198 | ||
199 | do { | |
200 | if (fp < stack_limit || fp >= (unsigned long) regs0 || fp & 3) | |
201 | return 0; | |
202 | ||
203 | pc = ((unsigned long *) fp)[2]; | |
204 | ||
205 | /* FIXME: This depends on the order of these functions. */ | |
206 | if (!in_sched_functions(pc)) | |
207 | return pc; | |
208 | ||
209 | fp = *(unsigned long *) fp; | |
210 | } while (count++ < 16); | |
211 | ||
212 | return 0; | |
213 | } | |
214 | ||
215 | unsigned long thread_saved_pc(struct task_struct *tsk) | |
216 | { | |
217 | /* Check whether the thread is blocked in resume() */ | |
218 | if (in_sched_functions(tsk->thread.pc)) | |
219 | return ((unsigned long *)tsk->thread.fp)[2]; | |
220 | else | |
221 | return tsk->thread.pc; | |
222 | } | |
223 | ||
224 | int elf_check_arch(const struct elf32_hdr *hdr) | |
225 | { | |
226 | unsigned long hsr0 = __get_HSR(0); | |
227 | unsigned long psr = __get_PSR(); | |
228 | ||
229 | if (hdr->e_machine != EM_FRV) | |
230 | return 0; | |
231 | ||
232 | switch (hdr->e_flags & EF_FRV_GPR_MASK) { | |
233 | case EF_FRV_GPR64: | |
234 | if ((hsr0 & HSR0_GRN) == HSR0_GRN_32) | |
235 | return 0; | |
236 | case EF_FRV_GPR32: | |
237 | case 0: | |
238 | break; | |
239 | default: | |
240 | return 0; | |
241 | } | |
242 | ||
243 | switch (hdr->e_flags & EF_FRV_FPR_MASK) { | |
244 | case EF_FRV_FPR64: | |
245 | if ((hsr0 & HSR0_FRN) == HSR0_FRN_32) | |
246 | return 0; | |
247 | case EF_FRV_FPR32: | |
248 | case EF_FRV_FPR_NONE: | |
249 | case 0: | |
250 | break; | |
251 | default: | |
252 | return 0; | |
253 | } | |
254 | ||
255 | if ((hdr->e_flags & EF_FRV_MULADD) == EF_FRV_MULADD) | |
256 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR405 && | |
257 | PSR_IMPLE(psr) != PSR_IMPLE_FR451) | |
258 | return 0; | |
259 | ||
260 | switch (hdr->e_flags & EF_FRV_CPU_MASK) { | |
261 | case EF_FRV_CPU_GENERIC: | |
262 | break; | |
263 | case EF_FRV_CPU_FR300: | |
264 | case EF_FRV_CPU_SIMPLE: | |
265 | case EF_FRV_CPU_TOMCAT: | |
266 | default: | |
267 | return 0; | |
268 | case EF_FRV_CPU_FR400: | |
269 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR401 && | |
270 | PSR_IMPLE(psr) != PSR_IMPLE_FR405 && | |
271 | PSR_IMPLE(psr) != PSR_IMPLE_FR451 && | |
272 | PSR_IMPLE(psr) != PSR_IMPLE_FR551) | |
273 | return 0; | |
274 | break; | |
275 | case EF_FRV_CPU_FR450: | |
276 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR451) | |
277 | return 0; | |
278 | break; | |
279 | case EF_FRV_CPU_FR500: | |
280 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR501) | |
281 | return 0; | |
282 | break; | |
283 | case EF_FRV_CPU_FR550: | |
284 | if (PSR_IMPLE(psr) != PSR_IMPLE_FR551) | |
285 | return 0; | |
286 | break; | |
287 | } | |
288 | ||
289 | return 1; | |
290 | } | |
6d8c4e3b DH |
291 | |
292 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs) | |
293 | { | |
294 | memcpy(fpregs, | |
295 | ¤t->thread.user->f, | |
296 | sizeof(current->thread.user->f)); | |
297 | return 1; | |
298 | } |