[PATCH] x86_64: Remove duplicated syscall entry.
[deliverable/linux.git] / arch / i386 / kernel / cpu / proc.c
CommitLineData
1da177e4
LT
1#include <linux/smp.h>
2#include <linux/timex.h>
3#include <linux/string.h>
4#include <asm/semaphore.h>
5#include <linux/seq_file.h>
6
7/*
8 * Get CPU information for use by the procfs.
9 */
10static int show_cpuinfo(struct seq_file *m, void *v)
11{
12 /*
13 * These flag bits must match the definitions in <asm/cpufeature.h>.
14 * NULL means this bit is undefined or reserved; either way it doesn't
15 * have meaning as far as Linux is concerned. Note that it's important
16 * to realize there is a difference between this table and CPUID -- if
17 * applications want to get the raw CPUID data, they should access
18 * /dev/cpu/<cpu_nr>/cpuid instead.
19 */
20 static char *x86_cap_flags[] = {
21 /* Intel-defined */
22 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
23 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
24 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
25 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
26
27 /* AMD-defined */
28 "pni", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
29 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
30 NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
31 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
32
33 /* Transmeta-defined */
34 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
35 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
36 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
37 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
38
39 /* Other (Linux-defined) */
40 "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
41 NULL, NULL, NULL, NULL,
42 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
43 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
44 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
45
46 /* Intel-defined (#2) */
47 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
48 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
49 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
50 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
51
52 /* VIA/Cyrix/Centaur-defined */
53 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
54 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
55 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
56 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
57
58 /* AMD-defined (#2) */
59 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
60 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
61 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
62 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
63 };
64 struct cpuinfo_x86 *c = v;
65 int i, n = c - cpu_data;
66 int fpu_exception;
67
68#ifdef CONFIG_SMP
69 if (!cpu_online(n))
70 return 0;
71#endif
72 seq_printf(m, "processor\t: %d\n"
73 "vendor_id\t: %s\n"
74 "cpu family\t: %d\n"
75 "model\t\t: %d\n"
76 "model name\t: %s\n",
77 n,
78 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
79 c->x86,
80 c->x86_model,
81 c->x86_model_id[0] ? c->x86_model_id : "unknown");
82
83 if (c->x86_mask || c->cpuid_level >= 0)
84 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
85 else
86 seq_printf(m, "stepping\t: unknown\n");
87
88 if ( cpu_has(c, X86_FEATURE_TSC) ) {
89 seq_printf(m, "cpu MHz\t\t: %lu.%03lu\n",
90 cpu_khz / 1000, (cpu_khz % 1000));
91 }
92
93 /* Cache size */
94 if (c->x86_cache_size >= 0)
95 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
96#ifdef CONFIG_X86_HT
db468681
AK
97 if (c->x86_num_cores * smp_num_siblings > 1) {
98 seq_printf(m, "physical id\t: %d\n", phys_proc_id[n]);
99 seq_printf(m, "siblings\t: %d\n",
100 c->x86_num_cores * smp_num_siblings);
101 }
1da177e4
LT
102#endif
103
104 /* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */
105 fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);
106 seq_printf(m, "fdiv_bug\t: %s\n"
107 "hlt_bug\t\t: %s\n"
108 "f00f_bug\t: %s\n"
109 "coma_bug\t: %s\n"
110 "fpu\t\t: %s\n"
111 "fpu_exception\t: %s\n"
112 "cpuid level\t: %d\n"
113 "wp\t\t: %s\n"
114 "flags\t\t:",
115 c->fdiv_bug ? "yes" : "no",
116 c->hlt_works_ok ? "no" : "yes",
117 c->f00f_bug ? "yes" : "no",
118 c->coma_bug ? "yes" : "no",
119 c->hard_math ? "yes" : "no",
120 fpu_exception ? "yes" : "no",
121 c->cpuid_level,
122 c->wp_works_ok ? "yes" : "no");
123
124 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
125 if ( test_bit(i, c->x86_capability) &&
126 x86_cap_flags[i] != NULL )
127 seq_printf(m, " %s", x86_cap_flags[i]);
128
129 seq_printf(m, "\nbogomips\t: %lu.%02lu\n\n",
130 c->loops_per_jiffy/(500000/HZ),
131 (c->loops_per_jiffy/(5000/HZ)) % 100);
132 return 0;
133}
134
135static void *c_start(struct seq_file *m, loff_t *pos)
136{
137 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
138}
139static void *c_next(struct seq_file *m, void *v, loff_t *pos)
140{
141 ++*pos;
142 return c_start(m, pos);
143}
144static void c_stop(struct seq_file *m, void *v)
145{
146}
147struct seq_operations cpuinfo_op = {
148 .start = c_start,
149 .next = c_next,
150 .stop = c_stop,
151 .show = show_cpuinfo,
152};
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