[IA64] allow user to force_pal_cache_flush
[deliverable/linux.git] / arch / ia64 / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * Architecture-specific setup.
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
b8d8b883 6 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
9138d581
KO
7 *
8 * 2005-10-07 Keith Owens <kaos@sgi.com>
9 * Add notify_die() hooks.
1da177e4 10 */
1da177e4
LT
11#include <linux/cpu.h>
12#include <linux/pm.h>
13#include <linux/elf.h>
14#include <linux/errno.h>
15#include <linux/kallsyms.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/module.h>
19#include <linux/notifier.h>
20#include <linux/personality.h>
21#include <linux/sched.h>
22#include <linux/slab.h>
1da177e4
LT
23#include <linux/stddef.h>
24#include <linux/thread_info.h>
25#include <linux/unistd.h>
26#include <linux/efi.h>
27#include <linux/interrupt.h>
28#include <linux/delay.h>
1eeb66a1 29#include <linux/kdebug.h>
ee211b37 30#include <linux/utsname.h>
1da177e4
LT
31
32#include <asm/cpu.h>
33#include <asm/delay.h>
34#include <asm/elf.h>
35#include <asm/ia32.h>
36#include <asm/irq.h>
c237508a 37#include <asm/kexec.h>
1da177e4
LT
38#include <asm/pgalloc.h>
39#include <asm/processor.h>
40#include <asm/sal.h>
41#include <asm/tlbflush.h>
42#include <asm/uaccess.h>
43#include <asm/unwind.h>
44#include <asm/user.h>
45
46#include "entry.h"
47
48#ifdef CONFIG_PERFMON
49# include <asm/perfmon.h>
50#endif
51
52#include "sigframe.h"
53
54void (*ia64_mark_idle)(int);
1da177e4
LT
55
56unsigned long boot_option_idle_override = 0;
57EXPORT_SYMBOL(boot_option_idle_override);
58
59void
60ia64_do_show_stack (struct unw_frame_info *info, void *arg)
61{
62 unsigned long ip, sp, bsp;
63 char buf[128]; /* don't make it so big that it overflows the stack! */
64
65 printk("\nCall Trace:\n");
66 do {
67 unw_get_ip(info, &ip);
68 if (ip == 0)
69 break;
70
71 unw_get_sp(info, &sp);
72 unw_get_bsp(info, &bsp);
73 snprintf(buf, sizeof(buf),
74 " [<%016lx>] %%s\n"
75 " sp=%016lx bsp=%016lx\n",
76 ip, sp, bsp);
77 print_symbol(buf, ip);
78 } while (unw_unwind(info) >= 0);
79}
80
81void
82show_stack (struct task_struct *task, unsigned long *sp)
83{
84 if (!task)
85 unw_init_running(ia64_do_show_stack, NULL);
86 else {
87 struct unw_frame_info info;
88
89 unw_init_from_blocked_task(&info, task);
90 ia64_do_show_stack(&info, NULL);
91 }
92}
93
94void
95dump_stack (void)
96{
97 show_stack(NULL, NULL);
98}
99
100EXPORT_SYMBOL(dump_stack);
101
102void
103show_regs (struct pt_regs *regs)
104{
105 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
106
107 print_modules();
19c5870c
AD
108 printk("\nPid: %d, CPU %d, comm: %20s\n", task_pid_nr(current),
109 smp_processor_id(), current->comm);
ee211b37
LT
110 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
111 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
112 init_utsname()->release);
1da177e4
LT
113 print_symbol("ip is at %s\n", ip);
114 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
115 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
116 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
117 regs->ar_rnat, regs->ar_bspstore, regs->pr);
118 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
119 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
120 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
121 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
122 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
123 regs->f6.u.bits[1], regs->f6.u.bits[0],
124 regs->f7.u.bits[1], regs->f7.u.bits[0]);
125 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
126 regs->f8.u.bits[1], regs->f8.u.bits[0],
127 regs->f9.u.bits[1], regs->f9.u.bits[0]);
128 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
129 regs->f10.u.bits[1], regs->f10.u.bits[0],
130 regs->f11.u.bits[1], regs->f11.u.bits[0]);
131
132 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
133 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
134 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
135 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
136 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
137 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
138 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
139 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
140 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
141
142 if (user_mode(regs)) {
143 /* print the stacked registers */
144 unsigned long val, *bsp, ndirty;
145 int i, sof, is_nat = 0;
146
147 sof = regs->cr_ifs & 0x7f; /* size of frame */
148 ndirty = (regs->loadrs >> 19);
149 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
150 for (i = 0; i < sof; ++i) {
151 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
152 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
153 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
154 }
155 } else
156 show_stack(NULL, NULL);
157}
158
5aa92ffd
PT
159void tsk_clear_notify_resume(struct task_struct *tsk)
160{
161#ifdef CONFIG_PERFMON
162 if (tsk->thread.pfm_needs_checking)
163 return;
164#endif
3b2ce0b1
PT
165 if (test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_RSE))
166 return;
5aa92ffd
PT
167 clear_ti_thread_flag(task_thread_info(tsk), TIF_NOTIFY_RESUME);
168}
169
1da177e4 170void
4a177cbf 171do_notify_resume_user (sigset_t *unused, struct sigscratch *scr, long in_syscall)
1da177e4
LT
172{
173 if (fsys_mode(current, &scr->pt)) {
174 /* defer signal-handling etc. until we return to privilege-level 0. */
175 if (!ia64_psr(&scr->pt)->lp)
176 ia64_psr(&scr->pt)->lp = 1;
177 return;
178 }
179
180#ifdef CONFIG_PERFMON
181 if (current->thread.pfm_needs_checking)
182 pfm_handle_work();
183#endif
184
185 /* deal with pending signal delivery */
49eaeb4b 186 if (test_thread_flag(TIF_SIGPENDING))
4a177cbf 187 ia64_do_signal(scr, in_syscall);
3b2ce0b1
PT
188
189 /* copy user rbs to kernel rbs */
190 if (unlikely(test_thread_flag(TIF_RESTORE_RSE)))
191 ia64_sync_krbs();
1da177e4
LT
192}
193
8df5a500
SE
194static int pal_halt = 1;
195static int can_do_pal_halt = 1;
196
1da177e4
LT
197static int __init nohalt_setup(char * str)
198{
fb573856 199 pal_halt = can_do_pal_halt = 0;
1da177e4
LT
200 return 1;
201}
202__setup("nohalt", nohalt_setup);
203
a71f62ed 204void
8df5a500
SE
205update_pal_halt_status(int status)
206{
207 can_do_pal_halt = pal_halt && status;
208}
209
1da177e4
LT
210/*
211 * We use this if we don't have any better idle routine..
212 */
213void
214default_idle (void)
215{
6c4fa560 216 local_irq_enable();
64c7c8f8 217 while (!need_resched()) {
71416bea
DS
218 if (can_do_pal_halt) {
219 local_irq_disable();
220 if (!need_resched()) {
221 safe_halt();
222 }
223 local_irq_enable();
224 } else
1da177e4 225 cpu_relax();
64c7c8f8 226 }
1da177e4
LT
227}
228
229#ifdef CONFIG_HOTPLUG_CPU
230/* We don't actually take CPU down, just spin without interrupts. */
231static inline void play_dead(void)
232{
233 extern void ia64_cpu_local_tick (void);
b8d8b883
AR
234 unsigned int this_cpu = smp_processor_id();
235
1da177e4
LT
236 /* Ack it */
237 __get_cpu_var(cpu_state) = CPU_DEAD;
238
1da177e4
LT
239 max_xtp();
240 local_irq_disable();
b8d8b883
AR
241 idle_task_exit();
242 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
1da177e4 243 /*
b8d8b883
AR
244 * The above is a point of no-return, the processor is
245 * expected to be in SAL loop now.
1da177e4 246 */
b8d8b883 247 BUG();
1da177e4
LT
248}
249#else
250static inline void play_dead(void)
251{
252 BUG();
253}
254#endif /* CONFIG_HOTPLUG_CPU */
255
42763935 256static void do_nothing(void *unused)
1da177e4 257{
42763935 258}
7d5f9c0f 259
42763935
TL
260/*
261 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
262 * pm_idle and update to new pm_idle value. Required while changing pm_idle
263 * handler on SMP systems.
264 *
265 * Caller must have changed pm_idle to the new value before the call. Old
266 * pm_idle value will not be used by any CPU after the return of this function.
267 */
268void cpu_idle_wait(void)
269{
270 smp_mb();
271 /* kick all the CPUs so that they exit out of pm_idle */
272 smp_call_function(do_nothing, NULL, 0, 1);
1da177e4
LT
273}
274EXPORT_SYMBOL_GPL(cpu_idle_wait);
275
276void __attribute__((noreturn))
277cpu_idle (void)
278{
279 void (*mark_idle)(int) = ia64_mark_idle;
64c7c8f8 280 int cpu = smp_processor_id();
1da177e4
LT
281
282 /* endless idle loop with no priority at all */
283 while (1) {
0888f06a 284 if (can_do_pal_halt) {
495ab9c0 285 current_thread_info()->status &= ~TS_POLLING;
0888f06a
IM
286 /*
287 * TS_POLLING-cleared state must be visible before we
288 * test NEED_RESCHED:
289 */
290 smp_mb();
291 } else {
495ab9c0 292 current_thread_info()->status |= TS_POLLING;
0888f06a 293 }
1e185b97 294
64c7c8f8
NP
295 if (!need_resched()) {
296 void (*idle)(void);
1da177e4 297#ifdef CONFIG_SMP
1da177e4
LT
298 min_xtp();
299#endif
7d5f9c0f 300 rmb();
1da177e4
LT
301 if (mark_idle)
302 (*mark_idle)(1);
303
1da177e4
LT
304 idle = pm_idle;
305 if (!idle)
306 idle = default_idle;
307 (*idle)();
64c7c8f8
NP
308 if (mark_idle)
309 (*mark_idle)(0);
1da177e4 310#ifdef CONFIG_SMP
64c7c8f8 311 normal_xtp();
1da177e4 312#endif
64c7c8f8 313 }
5bfb5d69 314 preempt_enable_no_resched();
1da177e4 315 schedule();
5bfb5d69 316 preempt_disable();
1da177e4 317 check_pgt_cache();
64c7c8f8 318 if (cpu_is_offline(cpu))
1da177e4
LT
319 play_dead();
320 }
321}
322
323void
324ia64_save_extra (struct task_struct *task)
325{
326#ifdef CONFIG_PERFMON
327 unsigned long info;
328#endif
329
330 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
331 ia64_save_debug_regs(&task->thread.dbr[0]);
332
333#ifdef CONFIG_PERFMON
334 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
335 pfm_save_regs(task);
336
337 info = __get_cpu_var(pfm_syst_info);
338 if (info & PFM_CPUINFO_SYST_WIDE)
339 pfm_syst_wide_update_task(task, info, 0);
340#endif
341
342#ifdef CONFIG_IA32_SUPPORT
6450578f 343 if (IS_IA32_PROCESS(task_pt_regs(task)))
1da177e4
LT
344 ia32_save_state(task);
345#endif
346}
347
348void
349ia64_load_extra (struct task_struct *task)
350{
351#ifdef CONFIG_PERFMON
352 unsigned long info;
353#endif
354
355 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
356 ia64_load_debug_regs(&task->thread.dbr[0]);
357
358#ifdef CONFIG_PERFMON
359 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
360 pfm_load_regs(task);
361
362 info = __get_cpu_var(pfm_syst_info);
363 if (info & PFM_CPUINFO_SYST_WIDE)
364 pfm_syst_wide_update_task(task, info, 1);
365#endif
366
367#ifdef CONFIG_IA32_SUPPORT
6450578f 368 if (IS_IA32_PROCESS(task_pt_regs(task)))
1da177e4
LT
369 ia32_load_state(task);
370#endif
371}
372
373/*
374 * Copy the state of an ia-64 thread.
375 *
376 * We get here through the following call chain:
377 *
378 * from user-level: from kernel:
379 *
380 * <clone syscall> <some kernel call frames>
381 * sys_clone :
382 * do_fork do_fork
383 * copy_thread copy_thread
384 *
385 * This means that the stack layout is as follows:
386 *
387 * +---------------------+ (highest addr)
388 * | struct pt_regs |
389 * +---------------------+
390 * | struct switch_stack |
391 * +---------------------+
392 * | |
393 * | memory stack |
394 * | | <-- sp (lowest addr)
395 * +---------------------+
396 *
397 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
398 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
399 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
400 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
401 * the stack is page aligned and the page size is at least 4KB, this is always the case,
402 * so there is nothing to worry about.
403 */
404int
405copy_thread (int nr, unsigned long clone_flags,
406 unsigned long user_stack_base, unsigned long user_stack_size,
407 struct task_struct *p, struct pt_regs *regs)
408{
409 extern char ia64_ret_from_clone, ia32_ret_from_clone;
410 struct switch_stack *child_stack, *stack;
411 unsigned long rbs, child_rbs, rbs_size;
412 struct pt_regs *child_ptregs;
413 int retval = 0;
414
415#ifdef CONFIG_SMP
416 /*
417 * For SMP idle threads, fork_by_hand() calls do_fork with
418 * NULL regs.
419 */
420 if (!regs)
421 return 0;
422#endif
423
424 stack = ((struct switch_stack *) regs) - 1;
425
426 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
427 child_stack = (struct switch_stack *) child_ptregs - 1;
428
429 /* copy parent's switch_stack & pt_regs to child: */
430 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
431
432 rbs = (unsigned long) current + IA64_RBS_OFFSET;
433 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
434 rbs_size = stack->ar_bspstore - rbs;
435
436 /* copy the parent's register backing store to the child: */
437 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
438
439 if (likely(user_mode(child_ptregs))) {
440 if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
441 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
442 if (user_stack_base) {
443 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
444 child_ptregs->ar_bspstore = user_stack_base;
445 child_ptregs->ar_rnat = 0;
446 child_ptregs->loadrs = 0;
447 }
448 } else {
449 /*
450 * Note: we simply preserve the relative position of
451 * the stack pointer here. There is no need to
452 * allocate a scratch area here, since that will have
453 * been taken care of by the caller of sys_clone()
454 * already.
455 */
456 child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
457 child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
458 }
459 child_stack->ar_bspstore = child_rbs + rbs_size;
460 if (IS_IA32_PROCESS(regs))
461 child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
462 else
463 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
464
465 /* copy parts of thread_struct: */
466 p->thread.ksp = (unsigned long) child_stack - 16;
467
468 /* stop some PSR bits from being inherited.
469 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
470 * therefore we must specify them explicitly here and not include them in
471 * IA64_PSR_BITS_TO_CLEAR.
472 */
473 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
474 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
475
476 /*
477 * NOTE: The calling convention considers all floating point
478 * registers in the high partition (fph) to be scratch. Since
479 * the only way to get to this point is through a system call,
480 * we know that the values in fph are all dead. Hence, there
481 * is no need to inherit the fph state from the parent to the
482 * child and all we have to do is to make sure that
483 * IA64_THREAD_FPH_VALID is cleared in the child.
484 *
485 * XXX We could push this optimization a bit further by
486 * clearing IA64_THREAD_FPH_VALID on ANY system call.
487 * However, it's not clear this is worth doing. Also, it
488 * would be a slight deviation from the normal Linux system
489 * call behavior where scratch registers are preserved across
490 * system calls (unless used by the system call itself).
491 */
492# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
493 | IA64_THREAD_PM_VALID)
494# define THREAD_FLAGS_TO_SET 0
495 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
496 | THREAD_FLAGS_TO_SET);
497 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
498#ifdef CONFIG_IA32_SUPPORT
499 /*
500 * If we're cloning an IA32 task then save the IA32 extra
501 * state from the current task to the new task
502 */
6450578f 503 if (IS_IA32_PROCESS(task_pt_regs(current))) {
1da177e4
LT
504 ia32_save_state(p);
505 if (clone_flags & CLONE_SETTLS)
506 retval = ia32_clone_tls(p, child_ptregs);
507
508 /* Copy partially mapped page list */
509 if (!retval)
3b74d18e 510 retval = ia32_copy_ia64_partial_page_list(p,
511 clone_flags);
1da177e4
LT
512 }
513#endif
514
515#ifdef CONFIG_PERFMON
516 if (current->thread.pfm_context)
517 pfm_inherit(p, child_ptregs);
518#endif
519 return retval;
520}
521
522static void
523do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
524{
256a7e09
JS
525 unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
526 unsigned long uninitialized_var(ip); /* GCC be quiet */
1da177e4
LT
527 elf_greg_t *dst = arg;
528 struct pt_regs *pt;
529 char nat;
530 int i;
531
532 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
533
534 if (unw_unwind_to_user(info) < 0)
535 return;
536
537 unw_get_sp(info, &sp);
538 pt = (struct pt_regs *) (sp + 16);
539
540 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
541
542 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
543 return;
544
545 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
546 &ar_rnat);
547
548 /*
549 * coredump format:
550 * r0-r31
551 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
552 * predicate registers (p0-p63)
553 * b0-b7
554 * ip cfm user-mask
555 * ar.rsc ar.bsp ar.bspstore ar.rnat
556 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
557 */
558
559 /* r0 is zero */
560 for (i = 1, mask = (1UL << i); i < 32; ++i) {
561 unw_get_gr(info, i, &dst[i], &nat);
562 if (nat)
563 nat_bits |= mask;
564 mask <<= 1;
565 }
566 dst[32] = nat_bits;
567 unw_get_pr(info, &dst[33]);
568
569 for (i = 0; i < 8; ++i)
570 unw_get_br(info, i, &dst[34 + i]);
571
572 unw_get_rp(info, &ip);
573 dst[42] = ip + ia64_psr(pt)->ri;
574 dst[43] = cfm;
575 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
576
577 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
578 /*
579 * For bsp and bspstore, unw_get_ar() would return the kernel
580 * addresses, but we need the user-level addresses instead:
581 */
582 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
583 dst[47] = pt->ar_bspstore;
584 dst[48] = ar_rnat;
585 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
586 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
587 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
588 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
589 unw_get_ar(info, UNW_AR_LC, &dst[53]);
590 unw_get_ar(info, UNW_AR_EC, &dst[54]);
591 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
592 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
593}
594
595void
596do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
597{
598 elf_fpreg_t *dst = arg;
599 int i;
600
601 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
602
603 if (unw_unwind_to_user(info) < 0)
604 return;
605
606 /* f0 is 0.0, f1 is 1.0 */
607
608 for (i = 2; i < 32; ++i)
609 unw_get_fr(info, i, dst + i);
610
611 ia64_flush_fph(task);
612 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
613 memcpy(dst + 32, task->thread.fph, 96*16);
614}
615
616void
617do_copy_regs (struct unw_frame_info *info, void *arg)
618{
619 do_copy_task_regs(current, info, arg);
620}
621
622void
623do_dump_fpu (struct unw_frame_info *info, void *arg)
624{
625 do_dump_task_fpu(current, info, arg);
626}
627
1da177e4
LT
628void
629ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
630{
631 unw_init_running(do_copy_regs, dst);
632}
633
1da177e4
LT
634int
635dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
636{
637 unw_init_running(do_dump_fpu, dst);
638 return 1; /* f0-f31 are always valid so we always return 1 */
639}
640
641long
642sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
643 struct pt_regs *regs)
644{
645 char *fname;
646 int error;
647
648 fname = getname(filename);
649 error = PTR_ERR(fname);
650 if (IS_ERR(fname))
651 goto out;
652 error = do_execve(fname, argv, envp, regs);
653 putname(fname);
654out:
655 return error;
656}
657
658pid_t
659kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
660{
661 extern void start_kernel_thread (void);
662 unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
663 struct {
664 struct switch_stack sw;
665 struct pt_regs pt;
666 } regs;
667
668 memset(&regs, 0, sizeof(regs));
669 regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
670 regs.pt.r1 = helper_fptr[1]; /* set GP */
671 regs.pt.r9 = (unsigned long) fn; /* 1st argument */
672 regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
673 /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
674 regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
675 regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
676 regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
677 regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
678 regs.sw.pr = (1 << PRED_KERNEL_STACK);
679 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
680}
681EXPORT_SYMBOL(kernel_thread);
682
683/* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
684int
685kernel_thread_helper (int (*fn)(void *), void *arg)
686{
687#ifdef CONFIG_IA32_SUPPORT
6450578f 688 if (IS_IA32_PROCESS(task_pt_regs(current))) {
1da177e4
LT
689 /* A kernel thread is always a 64-bit process. */
690 current->thread.map_base = DEFAULT_MAP_BASE;
691 current->thread.task_size = DEFAULT_TASK_SIZE;
692 ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
693 ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
694 }
695#endif
696 return (*fn)(arg);
697}
698
699/*
700 * Flush thread state. This is called when a thread does an execve().
701 */
702void
703flush_thread (void)
704{
705 /* drop floating-point and debug-register state if it exists: */
706 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
707 ia64_drop_fpu(current);
27af4cfd 708#ifdef CONFIG_IA32_SUPPORT
6450578f 709 if (IS_IA32_PROCESS(task_pt_regs(current))) {
3b74d18e 710 ia32_drop_ia64_partial_page_list(current);
bd1d6e24
RH
711 current->thread.task_size = IA32_PAGE_OFFSET;
712 set_fs(USER_DS);
e384f414 713 memset(current->thread.tls_array, 0, sizeof(current->thread.tls_array));
bd1d6e24 714 }
27af4cfd 715#endif
1da177e4
LT
716}
717
718/*
719 * Clean up state associated with current thread. This is called when
720 * the thread calls exit().
721 */
722void
723exit_thread (void)
724{
9508dbfe 725
1da177e4
LT
726 ia64_drop_fpu(current);
727#ifdef CONFIG_PERFMON
728 /* if needed, stop monitoring and flush state to perfmon context */
729 if (current->thread.pfm_context)
730 pfm_exit_thread(current);
731
732 /* free debug register resources */
733 if (current->thread.flags & IA64_THREAD_DBG_VALID)
734 pfm_release_debug_registers(current);
735#endif
6450578f 736 if (IS_IA32_PROCESS(task_pt_regs(current)))
3b74d18e 737 ia32_drop_ia64_partial_page_list(current);
1da177e4
LT
738}
739
740unsigned long
741get_wchan (struct task_struct *p)
742{
743 struct unw_frame_info info;
744 unsigned long ip;
745 int count = 0;
746
6ae38488
RH
747 if (!p || p == current || p->state == TASK_RUNNING)
748 return 0;
749
1da177e4
LT
750 /*
751 * Note: p may not be a blocked task (it could be current or
752 * another process running on some other CPU. Rather than
753 * trying to determine if p is really blocked, we just assume
754 * it's blocked and rely on the unwind routines to fail
755 * gracefully if the process wasn't really blocked after all.
756 * --davidm 99/12/15
757 */
758 unw_init_from_blocked_task(&info, p);
759 do {
6ae38488
RH
760 if (p->state == TASK_RUNNING)
761 return 0;
1da177e4
LT
762 if (unw_unwind(&info) < 0)
763 return 0;
764 unw_get_ip(&info, &ip);
765 if (!in_sched_functions(ip))
766 return ip;
767 } while (count++ < 16);
768 return 0;
769}
770
771void
772cpu_halt (void)
773{
774 pal_power_mgmt_info_u_t power_info[8];
775 unsigned long min_power;
776 int i, min_power_state;
777
778 if (ia64_pal_halt_info(power_info) != 0)
779 return;
780
781 min_power_state = 0;
782 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
783 for (i = 1; i < 8; ++i)
784 if (power_info[i].pal_power_mgmt_info_s.im
785 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
786 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
787 min_power_state = i;
788 }
789
790 while (1)
791 ia64_pal_halt(min_power_state);
792}
793
c237508a
H
794void machine_shutdown(void)
795{
796#ifdef CONFIG_HOTPLUG_CPU
797 int cpu;
798
799 for_each_online_cpu(cpu) {
800 if (cpu != smp_processor_id())
801 cpu_down(cpu);
802 }
803#endif
804#ifdef CONFIG_KEXEC
805 kexec_disable_iosapic();
806#endif
807}
808
1da177e4
LT
809void
810machine_restart (char *restart_cmd)
811{
9138d581 812 (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
1da177e4
LT
813 (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
814}
815
1da177e4
LT
816void
817machine_halt (void)
818{
9138d581 819 (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
1da177e4
LT
820 cpu_halt();
821}
822
1da177e4
LT
823void
824machine_power_off (void)
825{
826 if (pm_power_off)
827 pm_power_off();
828 machine_halt();
829}
830
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