Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * SMP boot-related support | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
6 | * | |
7 | * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here. | |
8 | * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code. | |
9 | * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence. | |
10 | * smp_boot_cpus()/smp_commence() is replaced by | |
11 | * smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). | |
b8d8b883 | 12 | * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support |
1da177e4 LT |
13 | */ |
14 | #include <linux/config.h> | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/acpi.h> | |
18 | #include <linux/bootmem.h> | |
19 | #include <linux/cpu.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/kernel_stat.h> | |
26 | #include <linux/mm.h> | |
27 | #include <linux/notifier.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/smp_lock.h> | |
30 | #include <linux/spinlock.h> | |
31 | #include <linux/efi.h> | |
32 | #include <linux/percpu.h> | |
33 | #include <linux/bitops.h> | |
34 | ||
35 | #include <asm/atomic.h> | |
36 | #include <asm/cache.h> | |
37 | #include <asm/current.h> | |
38 | #include <asm/delay.h> | |
39 | #include <asm/ia32.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/irq.h> | |
42 | #include <asm/machvec.h> | |
43 | #include <asm/mca.h> | |
44 | #include <asm/page.h> | |
45 | #include <asm/pgalloc.h> | |
46 | #include <asm/pgtable.h> | |
47 | #include <asm/processor.h> | |
48 | #include <asm/ptrace.h> | |
49 | #include <asm/sal.h> | |
50 | #include <asm/system.h> | |
51 | #include <asm/tlbflush.h> | |
52 | #include <asm/unistd.h> | |
53 | ||
54 | #define SMP_DEBUG 0 | |
55 | ||
56 | #if SMP_DEBUG | |
57 | #define Dprintk(x...) printk(x) | |
58 | #else | |
59 | #define Dprintk(x...) | |
60 | #endif | |
61 | ||
b8d8b883 AR |
62 | #ifdef CONFIG_HOTPLUG_CPU |
63 | /* | |
64 | * Store all idle threads, this can be reused instead of creating | |
65 | * a new thread. Also avoids complicated thread destroy functionality | |
66 | * for idle threads. | |
67 | */ | |
68 | struct task_struct *idle_thread_array[NR_CPUS]; | |
69 | ||
70 | /* | |
71 | * Global array allocated for NR_CPUS at boot time | |
72 | */ | |
73 | struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; | |
74 | ||
75 | /* | |
76 | * start_ap in head.S uses this to store current booting cpu | |
77 | * info. | |
78 | */ | |
79 | struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; | |
80 | ||
81 | #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); | |
82 | ||
83 | #define get_idle_for_cpu(x) (idle_thread_array[(x)]) | |
84 | #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p)) | |
85 | ||
86 | #else | |
87 | ||
88 | #define get_idle_for_cpu(x) (NULL) | |
89 | #define set_idle_for_cpu(x,p) | |
90 | #define set_brendez_area(x) | |
91 | #endif | |
92 | ||
1da177e4 LT |
93 | |
94 | /* | |
95 | * ITC synchronization related stuff: | |
96 | */ | |
97 | #define MASTER 0 | |
98 | #define SLAVE (SMP_CACHE_BYTES/8) | |
99 | ||
100 | #define NUM_ROUNDS 64 /* magic value */ | |
101 | #define NUM_ITERS 5 /* likewise */ | |
102 | ||
103 | static DEFINE_SPINLOCK(itc_sync_lock); | |
104 | static volatile unsigned long go[SLAVE + 1]; | |
105 | ||
106 | #define DEBUG_ITC_SYNC 0 | |
107 | ||
108 | extern void __devinit calibrate_delay (void); | |
109 | extern void start_ap (void); | |
110 | extern unsigned long ia64_iobase; | |
111 | ||
112 | task_t *task_for_booting_cpu; | |
113 | ||
114 | /* | |
115 | * State for each CPU | |
116 | */ | |
117 | DEFINE_PER_CPU(int, cpu_state); | |
118 | ||
119 | /* Bitmasks of currently online, and possible CPUs */ | |
120 | cpumask_t cpu_online_map; | |
121 | EXPORT_SYMBOL(cpu_online_map); | |
122 | cpumask_t cpu_possible_map; | |
123 | EXPORT_SYMBOL(cpu_possible_map); | |
124 | ||
125 | /* which logical CPU number maps to which CPU (physical APIC ID) */ | |
126 | volatile int ia64_cpu_to_sapicid[NR_CPUS]; | |
127 | EXPORT_SYMBOL(ia64_cpu_to_sapicid); | |
128 | ||
129 | static volatile cpumask_t cpu_callin_map; | |
130 | ||
131 | struct smp_boot_data smp_boot_data __initdata; | |
132 | ||
133 | unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ | |
134 | ||
135 | char __initdata no_int_routing; | |
136 | ||
137 | unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ | |
138 | ||
139 | static int __init | |
140 | nointroute (char *str) | |
141 | { | |
142 | no_int_routing = 1; | |
143 | printk ("no_int_routing on\n"); | |
144 | return 1; | |
145 | } | |
146 | ||
147 | __setup("nointroute", nointroute); | |
148 | ||
149 | void | |
150 | sync_master (void *arg) | |
151 | { | |
152 | unsigned long flags, i; | |
153 | ||
154 | go[MASTER] = 0; | |
155 | ||
156 | local_irq_save(flags); | |
157 | { | |
158 | for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { | |
159 | while (!go[MASTER]); | |
160 | go[MASTER] = 0; | |
161 | go[SLAVE] = ia64_get_itc(); | |
162 | } | |
163 | } | |
164 | local_irq_restore(flags); | |
165 | } | |
166 | ||
167 | /* | |
168 | * Return the number of cycles by which our itc differs from the itc on the master | |
169 | * (time-keeper) CPU. A positive number indicates our itc is ahead of the master, | |
170 | * negative that it is behind. | |
171 | */ | |
172 | static inline long | |
173 | get_delta (long *rt, long *master) | |
174 | { | |
175 | unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; | |
176 | unsigned long tcenter, t0, t1, tm; | |
177 | long i; | |
178 | ||
179 | for (i = 0; i < NUM_ITERS; ++i) { | |
180 | t0 = ia64_get_itc(); | |
181 | go[MASTER] = 1; | |
182 | while (!(tm = go[SLAVE])); | |
183 | go[SLAVE] = 0; | |
184 | t1 = ia64_get_itc(); | |
185 | ||
186 | if (t1 - t0 < best_t1 - best_t0) | |
187 | best_t0 = t0, best_t1 = t1, best_tm = tm; | |
188 | } | |
189 | ||
190 | *rt = best_t1 - best_t0; | |
191 | *master = best_tm - best_t0; | |
192 | ||
193 | /* average best_t0 and best_t1 without overflow: */ | |
194 | tcenter = (best_t0/2 + best_t1/2); | |
195 | if (best_t0 % 2 + best_t1 % 2 == 2) | |
196 | ++tcenter; | |
197 | return tcenter - best_tm; | |
198 | } | |
199 | ||
200 | /* | |
201 | * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU | |
202 | * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of | |
203 | * unaccounted-for errors (such as getting a machine check in the middle of a calibration | |
204 | * step). The basic idea is for the slave to ask the master what itc value it has and to | |
205 | * read its own itc before and after the master responds. Each iteration gives us three | |
206 | * timestamps: | |
207 | * | |
208 | * slave master | |
209 | * | |
210 | * t0 ---\ | |
211 | * ---\ | |
212 | * ---> | |
213 | * tm | |
214 | * /--- | |
215 | * /--- | |
216 | * t1 <--- | |
217 | * | |
218 | * | |
219 | * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 | |
220 | * and t1. If we achieve this, the clocks are synchronized provided the interconnect | |
221 | * between the slave and the master is symmetric. Even if the interconnect were | |
222 | * asymmetric, we would still know that the synchronization error is smaller than the | |
223 | * roundtrip latency (t0 - t1). | |
224 | * | |
225 | * When the interconnect is quiet and symmetric, this lets us synchronize the itc to | |
226 | * within one or two cycles. However, we can only *guarantee* that the synchronization is | |
227 | * accurate to within a round-trip time, which is typically in the range of several | |
228 | * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually | |
229 | * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better | |
230 | * than half a micro second or so. | |
231 | */ | |
232 | void | |
233 | ia64_sync_itc (unsigned int master) | |
234 | { | |
235 | long i, delta, adj, adjust_latency = 0, done = 0; | |
236 | unsigned long flags, rt, master_time_stamp, bound; | |
237 | #if DEBUG_ITC_SYNC | |
238 | struct { | |
239 | long rt; /* roundtrip time */ | |
240 | long master; /* master's timestamp */ | |
241 | long diff; /* difference between midpoint and master's timestamp */ | |
242 | long lat; /* estimate of itc adjustment latency */ | |
243 | } t[NUM_ROUNDS]; | |
244 | #endif | |
245 | ||
246 | /* | |
247 | * Make sure local timer ticks are disabled while we sync. If | |
248 | * they were enabled, we'd have to worry about nasty issues | |
249 | * like setting the ITC ahead of (or a long time before) the | |
250 | * next scheduled tick. | |
251 | */ | |
252 | BUG_ON((ia64_get_itv() & (1 << 16)) == 0); | |
253 | ||
254 | go[MASTER] = 1; | |
255 | ||
256 | if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) { | |
257 | printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); | |
258 | return; | |
259 | } | |
260 | ||
261 | while (go[MASTER]); /* wait for master to be ready */ | |
262 | ||
263 | spin_lock_irqsave(&itc_sync_lock, flags); | |
264 | { | |
265 | for (i = 0; i < NUM_ROUNDS; ++i) { | |
266 | delta = get_delta(&rt, &master_time_stamp); | |
267 | if (delta == 0) { | |
268 | done = 1; /* let's lock on to this... */ | |
269 | bound = rt; | |
270 | } | |
271 | ||
272 | if (!done) { | |
273 | if (i > 0) { | |
274 | adjust_latency += -delta; | |
275 | adj = -delta + adjust_latency/4; | |
276 | } else | |
277 | adj = -delta; | |
278 | ||
279 | ia64_set_itc(ia64_get_itc() + adj); | |
280 | } | |
281 | #if DEBUG_ITC_SYNC | |
282 | t[i].rt = rt; | |
283 | t[i].master = master_time_stamp; | |
284 | t[i].diff = delta; | |
285 | t[i].lat = adjust_latency/4; | |
286 | #endif | |
287 | } | |
288 | } | |
289 | spin_unlock_irqrestore(&itc_sync_lock, flags); | |
290 | ||
291 | #if DEBUG_ITC_SYNC | |
292 | for (i = 0; i < NUM_ROUNDS; ++i) | |
293 | printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", | |
294 | t[i].rt, t[i].master, t[i].diff, t[i].lat); | |
295 | #endif | |
296 | ||
297 | printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " | |
298 | "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); | |
299 | } | |
300 | ||
301 | /* | |
302 | * Ideally sets up per-cpu profiling hooks. Doesn't do much now... | |
303 | */ | |
304 | static inline void __devinit | |
305 | smp_setup_percpu_timer (void) | |
306 | { | |
307 | } | |
308 | ||
309 | static void __devinit | |
310 | smp_callin (void) | |
311 | { | |
312 | int cpuid, phys_id; | |
313 | extern void ia64_init_itm(void); | |
314 | ||
315 | #ifdef CONFIG_PERFMON | |
316 | extern void pfm_init_percpu(void); | |
317 | #endif | |
318 | ||
319 | cpuid = smp_processor_id(); | |
320 | phys_id = hard_smp_processor_id(); | |
321 | ||
322 | if (cpu_online(cpuid)) { | |
323 | printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", | |
324 | phys_id, cpuid); | |
325 | BUG(); | |
326 | } | |
327 | ||
328 | lock_ipi_calllock(); | |
329 | cpu_set(cpuid, cpu_online_map); | |
330 | unlock_ipi_calllock(); | |
331 | ||
332 | smp_setup_percpu_timer(); | |
333 | ||
334 | ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ | |
335 | ||
336 | #ifdef CONFIG_PERFMON | |
337 | pfm_init_percpu(); | |
338 | #endif | |
339 | ||
340 | local_irq_enable(); | |
341 | ||
342 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { | |
343 | /* | |
344 | * Synchronize the ITC with the BP. Need to do this after irqs are | |
345 | * enabled because ia64_sync_itc() calls smp_call_function_single(), which | |
346 | * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls | |
347 | * local_bh_enable(), which bugs out if irqs are not enabled... | |
348 | */ | |
349 | Dprintk("Going to syncup ITC with BP.\n"); | |
350 | ia64_sync_itc(0); | |
351 | } | |
352 | ||
353 | /* | |
354 | * Get our bogomips. | |
355 | */ | |
356 | ia64_init_itm(); | |
357 | calibrate_delay(); | |
358 | local_cpu_data->loops_per_jiffy = loops_per_jiffy; | |
359 | ||
360 | #ifdef CONFIG_IA32_SUPPORT | |
361 | ia32_gdt_init(); | |
362 | #endif | |
363 | ||
364 | /* | |
365 | * Allow the master to continue. | |
366 | */ | |
367 | cpu_set(cpuid, cpu_callin_map); | |
368 | Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); | |
369 | } | |
370 | ||
371 | ||
372 | /* | |
373 | * Activate a secondary processor. head.S calls this. | |
374 | */ | |
375 | int __devinit | |
376 | start_secondary (void *unused) | |
377 | { | |
378 | /* Early console may use I/O ports */ | |
379 | ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); | |
1da177e4 LT |
380 | Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); |
381 | efi_map_pal_code(); | |
382 | cpu_init(); | |
383 | smp_callin(); | |
384 | ||
385 | cpu_idle(); | |
386 | return 0; | |
387 | } | |
388 | ||
389 | struct pt_regs * __devinit idle_regs(struct pt_regs *regs) | |
390 | { | |
391 | return NULL; | |
392 | } | |
393 | ||
394 | struct create_idle { | |
395 | struct task_struct *idle; | |
396 | struct completion done; | |
397 | int cpu; | |
398 | }; | |
399 | ||
400 | void | |
401 | do_fork_idle(void *_c_idle) | |
402 | { | |
403 | struct create_idle *c_idle = _c_idle; | |
404 | ||
405 | c_idle->idle = fork_idle(c_idle->cpu); | |
406 | complete(&c_idle->done); | |
407 | } | |
408 | ||
409 | static int __devinit | |
410 | do_boot_cpu (int sapicid, int cpu) | |
411 | { | |
412 | int timeout; | |
413 | struct create_idle c_idle = { | |
414 | .cpu = cpu, | |
415 | .done = COMPLETION_INITIALIZER(c_idle.done), | |
416 | }; | |
417 | DECLARE_WORK(work, do_fork_idle, &c_idle); | |
b8d8b883 AR |
418 | |
419 | c_idle.idle = get_idle_for_cpu(cpu); | |
420 | if (c_idle.idle) { | |
421 | init_idle(c_idle.idle, cpu); | |
422 | goto do_rest; | |
423 | } | |
424 | ||
1da177e4 LT |
425 | /* |
426 | * We can't use kernel_thread since we must avoid to reschedule the child. | |
427 | */ | |
428 | if (!keventd_up() || current_is_keventd()) | |
429 | work.func(work.data); | |
430 | else { | |
431 | schedule_work(&work); | |
432 | wait_for_completion(&c_idle.done); | |
433 | } | |
434 | ||
435 | if (IS_ERR(c_idle.idle)) | |
436 | panic("failed fork for CPU %d", cpu); | |
b8d8b883 AR |
437 | |
438 | set_idle_for_cpu(cpu, c_idle.idle); | |
439 | ||
440 | do_rest: | |
1da177e4 LT |
441 | task_for_booting_cpu = c_idle.idle; |
442 | ||
443 | Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); | |
444 | ||
b8d8b883 | 445 | set_brendez_area(cpu); |
1da177e4 LT |
446 | platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); |
447 | ||
448 | /* | |
449 | * Wait 10s total for the AP to start | |
450 | */ | |
451 | Dprintk("Waiting on callin_map ..."); | |
452 | for (timeout = 0; timeout < 100000; timeout++) { | |
453 | if (cpu_isset(cpu, cpu_callin_map)) | |
454 | break; /* It has booted */ | |
455 | udelay(100); | |
456 | } | |
457 | Dprintk("\n"); | |
458 | ||
459 | if (!cpu_isset(cpu, cpu_callin_map)) { | |
460 | printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); | |
461 | ia64_cpu_to_sapicid[cpu] = -1; | |
462 | cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */ | |
463 | return -EINVAL; | |
464 | } | |
465 | return 0; | |
466 | } | |
467 | ||
468 | static int __init | |
469 | decay (char *str) | |
470 | { | |
471 | int ticks; | |
472 | get_option (&str, &ticks); | |
473 | return 1; | |
474 | } | |
475 | ||
476 | __setup("decay=", decay); | |
477 | ||
478 | /* | |
479 | * Initialize the logical CPU number to SAPICID mapping | |
480 | */ | |
481 | void __init | |
482 | smp_build_cpu_map (void) | |
483 | { | |
484 | int sapicid, cpu, i; | |
485 | int boot_cpu_id = hard_smp_processor_id(); | |
486 | ||
487 | for (cpu = 0; cpu < NR_CPUS; cpu++) { | |
488 | ia64_cpu_to_sapicid[cpu] = -1; | |
489 | #ifdef CONFIG_HOTPLUG_CPU | |
490 | cpu_set(cpu, cpu_possible_map); | |
491 | #endif | |
492 | } | |
493 | ||
494 | ia64_cpu_to_sapicid[0] = boot_cpu_id; | |
495 | cpus_clear(cpu_present_map); | |
496 | cpu_set(0, cpu_present_map); | |
497 | cpu_set(0, cpu_possible_map); | |
498 | for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { | |
499 | sapicid = smp_boot_data.cpu_phys_id[i]; | |
500 | if (sapicid == boot_cpu_id) | |
501 | continue; | |
502 | cpu_set(cpu, cpu_present_map); | |
503 | cpu_set(cpu, cpu_possible_map); | |
504 | ia64_cpu_to_sapicid[cpu] = sapicid; | |
505 | cpu++; | |
506 | } | |
507 | } | |
508 | ||
509 | #ifdef CONFIG_NUMA | |
510 | ||
511 | /* on which node is each logical CPU (one cacheline even for 64 CPUs) */ | |
512 | u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned; | |
513 | EXPORT_SYMBOL(cpu_to_node_map); | |
514 | /* which logical CPUs are on which nodes */ | |
515 | cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned; | |
516 | ||
517 | /* | |
518 | * Build cpu to node mapping and initialize the per node cpu masks. | |
519 | */ | |
520 | void __init | |
521 | build_cpu_to_node_map (void) | |
522 | { | |
523 | int cpu, i, node; | |
524 | ||
525 | for(node=0; node<MAX_NUMNODES; node++) | |
526 | cpus_clear(node_to_cpu_mask[node]); | |
527 | for(cpu = 0; cpu < NR_CPUS; ++cpu) { | |
528 | /* | |
529 | * All Itanium NUMA platforms I know use ACPI, so maybe we | |
530 | * can drop this ifdef completely. [EF] | |
531 | */ | |
532 | #ifdef CONFIG_ACPI_NUMA | |
533 | node = -1; | |
534 | for (i = 0; i < NR_CPUS; ++i) | |
535 | if (cpu_physical_id(cpu) == node_cpuid[i].phys_id) { | |
536 | node = node_cpuid[i].nid; | |
537 | break; | |
538 | } | |
539 | #else | |
540 | # error Fixme: Dunno how to build CPU-to-node map. | |
541 | #endif | |
542 | cpu_to_node_map[cpu] = (node >= 0) ? node : 0; | |
543 | if (node >= 0) | |
544 | cpu_set(cpu, node_to_cpu_mask[node]); | |
545 | } | |
546 | } | |
547 | ||
548 | #endif /* CONFIG_NUMA */ | |
549 | ||
550 | /* | |
551 | * Cycle through the APs sending Wakeup IPIs to boot each. | |
552 | */ | |
553 | void __init | |
554 | smp_prepare_cpus (unsigned int max_cpus) | |
555 | { | |
556 | int boot_cpu_id = hard_smp_processor_id(); | |
557 | ||
558 | /* | |
559 | * Initialize the per-CPU profiling counter/multiplier | |
560 | */ | |
561 | ||
562 | smp_setup_percpu_timer(); | |
563 | ||
564 | /* | |
565 | * We have the boot CPU online for sure. | |
566 | */ | |
567 | cpu_set(0, cpu_online_map); | |
568 | cpu_set(0, cpu_callin_map); | |
569 | ||
570 | local_cpu_data->loops_per_jiffy = loops_per_jiffy; | |
571 | ia64_cpu_to_sapicid[0] = boot_cpu_id; | |
572 | ||
573 | printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); | |
574 | ||
575 | current_thread_info()->cpu = 0; | |
576 | ||
577 | /* | |
578 | * If SMP should be disabled, then really disable it! | |
579 | */ | |
580 | if (!max_cpus) { | |
581 | printk(KERN_INFO "SMP mode deactivated.\n"); | |
582 | cpus_clear(cpu_online_map); | |
583 | cpus_clear(cpu_present_map); | |
584 | cpus_clear(cpu_possible_map); | |
585 | cpu_set(0, cpu_online_map); | |
586 | cpu_set(0, cpu_present_map); | |
587 | cpu_set(0, cpu_possible_map); | |
588 | return; | |
589 | } | |
590 | } | |
591 | ||
592 | void __devinit smp_prepare_boot_cpu(void) | |
593 | { | |
594 | cpu_set(smp_processor_id(), cpu_online_map); | |
595 | cpu_set(smp_processor_id(), cpu_callin_map); | |
596 | } | |
597 | ||
598 | #ifdef CONFIG_HOTPLUG_CPU | |
599 | extern void fixup_irqs(void); | |
600 | /* must be called with cpucontrol mutex held */ | |
1da177e4 LT |
601 | int __cpu_disable(void) |
602 | { | |
603 | int cpu = smp_processor_id(); | |
604 | ||
605 | /* | |
606 | * dont permit boot processor for now | |
607 | */ | |
608 | if (cpu == 0) | |
609 | return -EBUSY; | |
610 | ||
611 | fixup_irqs(); | |
612 | local_flush_tlb_all(); | |
b8d8b883 | 613 | cpu_clear(cpu, cpu_callin_map); |
1da177e4 LT |
614 | return 0; |
615 | } | |
616 | ||
617 | void __cpu_die(unsigned int cpu) | |
618 | { | |
619 | unsigned int i; | |
620 | ||
621 | for (i = 0; i < 100; i++) { | |
622 | /* They ack this in play_dead by setting CPU_DEAD */ | |
623 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) | |
624 | { | |
b8d8b883 | 625 | printk ("CPU %d is now offline\n", cpu); |
1da177e4 LT |
626 | return; |
627 | } | |
628 | msleep(100); | |
629 | } | |
630 | printk(KERN_ERR "CPU %u didn't die...\n", cpu); | |
631 | } | |
632 | #else /* !CONFIG_HOTPLUG_CPU */ | |
1da177e4 LT |
633 | int __cpu_disable(void) |
634 | { | |
635 | return -ENOSYS; | |
636 | } | |
637 | ||
638 | void __cpu_die(unsigned int cpu) | |
639 | { | |
640 | /* We said "no" in __cpu_disable */ | |
641 | BUG(); | |
642 | } | |
643 | #endif /* CONFIG_HOTPLUG_CPU */ | |
644 | ||
645 | void | |
646 | smp_cpus_done (unsigned int dummy) | |
647 | { | |
648 | int cpu; | |
649 | unsigned long bogosum = 0; | |
650 | ||
651 | /* | |
652 | * Allow the user to impress friends. | |
653 | */ | |
654 | ||
655 | for (cpu = 0; cpu < NR_CPUS; cpu++) | |
656 | if (cpu_online(cpu)) | |
657 | bogosum += cpu_data(cpu)->loops_per_jiffy; | |
658 | ||
659 | printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", | |
660 | (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); | |
661 | } | |
662 | ||
663 | int __devinit | |
664 | __cpu_up (unsigned int cpu) | |
665 | { | |
666 | int ret; | |
667 | int sapicid; | |
668 | ||
669 | sapicid = ia64_cpu_to_sapicid[cpu]; | |
670 | if (sapicid == -1) | |
671 | return -EINVAL; | |
672 | ||
673 | /* | |
b8d8b883 AR |
674 | * Already booted cpu? not valid anymore since we dont |
675 | * do idle loop tightspin anymore. | |
1da177e4 LT |
676 | */ |
677 | if (cpu_isset(cpu, cpu_callin_map)) | |
b8d8b883 AR |
678 | return -EINVAL; |
679 | ||
1da177e4 LT |
680 | /* Processor goes to start_secondary(), sets online flag */ |
681 | ret = do_boot_cpu(sapicid, cpu); | |
682 | if (ret < 0) | |
683 | return ret; | |
684 | ||
685 | return 0; | |
686 | } | |
687 | ||
688 | /* | |
689 | * Assume that CPU's have been discovered by some platform-dependent interface. For | |
690 | * SoftSDV/Lion, that would be ACPI. | |
691 | * | |
692 | * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). | |
693 | */ | |
694 | void __init | |
695 | init_smp_config(void) | |
696 | { | |
697 | struct fptr { | |
698 | unsigned long fp; | |
699 | unsigned long gp; | |
700 | } *ap_startup; | |
701 | long sal_ret; | |
702 | ||
703 | /* Tell SAL where to drop the AP's. */ | |
704 | ap_startup = (struct fptr *) start_ap; | |
705 | sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, | |
706 | ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); | |
707 | if (sal_ret < 0) | |
708 | printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", | |
709 | ia64_sal_strerror(sal_ret)); | |
710 | } | |
711 |