Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * SMP boot-related support | |
3 | * | |
82975115 | 4 | * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co |
1da177e4 | 5 | * David Mosberger-Tang <davidm@hpl.hp.com> |
e927ecb0 SS |
6 | * Copyright (C) 2001, 2004-2005 Intel Corp |
7 | * Rohit Seth <rohit.seth@intel.com> | |
8 | * Suresh Siddha <suresh.b.siddha@intel.com> | |
9 | * Gordon Jin <gordon.jin@intel.com> | |
10 | * Ashok Raj <ashok.raj@intel.com> | |
1da177e4 LT |
11 | * |
12 | * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here. | |
13 | * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code. | |
14 | * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence. | |
15 | * smp_boot_cpus()/smp_commence() is replaced by | |
16 | * smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). | |
b8d8b883 | 17 | * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support |
e927ecb0 SS |
18 | * 04/12/26 Jin Gordon <gordon.jin@intel.com> |
19 | * 04/12/26 Rohit Seth <rohit.seth@intel.com> | |
20 | * Add multi-threading and multi-core detection | |
21 | * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com> | |
22 | * Setup cpu_sibling_map and cpu_core_map | |
1da177e4 LT |
23 | */ |
24 | #include <linux/config.h> | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/acpi.h> | |
28 | #include <linux/bootmem.h> | |
29 | #include <linux/cpu.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/interrupt.h> | |
33 | #include <linux/irq.h> | |
34 | #include <linux/kernel.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/mm.h> | |
37 | #include <linux/notifier.h> | |
38 | #include <linux/smp.h> | |
39 | #include <linux/smp_lock.h> | |
40 | #include <linux/spinlock.h> | |
41 | #include <linux/efi.h> | |
42 | #include <linux/percpu.h> | |
43 | #include <linux/bitops.h> | |
44 | ||
45 | #include <asm/atomic.h> | |
46 | #include <asm/cache.h> | |
47 | #include <asm/current.h> | |
48 | #include <asm/delay.h> | |
49 | #include <asm/ia32.h> | |
50 | #include <asm/io.h> | |
51 | #include <asm/irq.h> | |
52 | #include <asm/machvec.h> | |
53 | #include <asm/mca.h> | |
54 | #include <asm/page.h> | |
55 | #include <asm/pgalloc.h> | |
56 | #include <asm/pgtable.h> | |
57 | #include <asm/processor.h> | |
58 | #include <asm/ptrace.h> | |
59 | #include <asm/sal.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/tlbflush.h> | |
62 | #include <asm/unistd.h> | |
63 | ||
64 | #define SMP_DEBUG 0 | |
65 | ||
66 | #if SMP_DEBUG | |
67 | #define Dprintk(x...) printk(x) | |
68 | #else | |
69 | #define Dprintk(x...) | |
70 | #endif | |
71 | ||
b8d8b883 AR |
72 | #ifdef CONFIG_HOTPLUG_CPU |
73 | /* | |
74 | * Store all idle threads, this can be reused instead of creating | |
75 | * a new thread. Also avoids complicated thread destroy functionality | |
76 | * for idle threads. | |
77 | */ | |
78 | struct task_struct *idle_thread_array[NR_CPUS]; | |
79 | ||
80 | /* | |
81 | * Global array allocated for NR_CPUS at boot time | |
82 | */ | |
83 | struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; | |
84 | ||
85 | /* | |
86 | * start_ap in head.S uses this to store current booting cpu | |
87 | * info. | |
88 | */ | |
89 | struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; | |
90 | ||
91 | #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); | |
92 | ||
93 | #define get_idle_for_cpu(x) (idle_thread_array[(x)]) | |
94 | #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p)) | |
95 | ||
96 | #else | |
97 | ||
98 | #define get_idle_for_cpu(x) (NULL) | |
99 | #define set_idle_for_cpu(x,p) | |
100 | #define set_brendez_area(x) | |
101 | #endif | |
102 | ||
1da177e4 LT |
103 | |
104 | /* | |
105 | * ITC synchronization related stuff: | |
106 | */ | |
107 | #define MASTER 0 | |
108 | #define SLAVE (SMP_CACHE_BYTES/8) | |
109 | ||
110 | #define NUM_ROUNDS 64 /* magic value */ | |
111 | #define NUM_ITERS 5 /* likewise */ | |
112 | ||
113 | static DEFINE_SPINLOCK(itc_sync_lock); | |
114 | static volatile unsigned long go[SLAVE + 1]; | |
115 | ||
116 | #define DEBUG_ITC_SYNC 0 | |
117 | ||
118 | extern void __devinit calibrate_delay (void); | |
119 | extern void start_ap (void); | |
120 | extern unsigned long ia64_iobase; | |
121 | ||
122 | task_t *task_for_booting_cpu; | |
123 | ||
124 | /* | |
125 | * State for each CPU | |
126 | */ | |
127 | DEFINE_PER_CPU(int, cpu_state); | |
128 | ||
129 | /* Bitmasks of currently online, and possible CPUs */ | |
130 | cpumask_t cpu_online_map; | |
131 | EXPORT_SYMBOL(cpu_online_map); | |
132 | cpumask_t cpu_possible_map; | |
133 | EXPORT_SYMBOL(cpu_possible_map); | |
134 | ||
e927ecb0 SS |
135 | cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; |
136 | cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned; | |
137 | int smp_num_siblings = 1; | |
138 | int smp_num_cpucores = 1; | |
139 | ||
1da177e4 LT |
140 | /* which logical CPU number maps to which CPU (physical APIC ID) */ |
141 | volatile int ia64_cpu_to_sapicid[NR_CPUS]; | |
142 | EXPORT_SYMBOL(ia64_cpu_to_sapicid); | |
143 | ||
144 | static volatile cpumask_t cpu_callin_map; | |
145 | ||
146 | struct smp_boot_data smp_boot_data __initdata; | |
147 | ||
148 | unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ | |
149 | ||
150 | char __initdata no_int_routing; | |
151 | ||
152 | unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ | |
153 | ||
154 | static int __init | |
155 | nointroute (char *str) | |
156 | { | |
157 | no_int_routing = 1; | |
158 | printk ("no_int_routing on\n"); | |
159 | return 1; | |
160 | } | |
161 | ||
162 | __setup("nointroute", nointroute); | |
163 | ||
164 | void | |
165 | sync_master (void *arg) | |
166 | { | |
167 | unsigned long flags, i; | |
168 | ||
169 | go[MASTER] = 0; | |
170 | ||
171 | local_irq_save(flags); | |
172 | { | |
173 | for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { | |
82975115 DMT |
174 | while (!go[MASTER]) |
175 | cpu_relax(); | |
1da177e4 LT |
176 | go[MASTER] = 0; |
177 | go[SLAVE] = ia64_get_itc(); | |
178 | } | |
179 | } | |
180 | local_irq_restore(flags); | |
181 | } | |
182 | ||
183 | /* | |
184 | * Return the number of cycles by which our itc differs from the itc on the master | |
185 | * (time-keeper) CPU. A positive number indicates our itc is ahead of the master, | |
186 | * negative that it is behind. | |
187 | */ | |
188 | static inline long | |
189 | get_delta (long *rt, long *master) | |
190 | { | |
191 | unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; | |
192 | unsigned long tcenter, t0, t1, tm; | |
193 | long i; | |
194 | ||
195 | for (i = 0; i < NUM_ITERS; ++i) { | |
196 | t0 = ia64_get_itc(); | |
197 | go[MASTER] = 1; | |
82975115 DMT |
198 | while (!(tm = go[SLAVE])) |
199 | cpu_relax(); | |
1da177e4 LT |
200 | go[SLAVE] = 0; |
201 | t1 = ia64_get_itc(); | |
202 | ||
203 | if (t1 - t0 < best_t1 - best_t0) | |
204 | best_t0 = t0, best_t1 = t1, best_tm = tm; | |
205 | } | |
206 | ||
207 | *rt = best_t1 - best_t0; | |
208 | *master = best_tm - best_t0; | |
209 | ||
210 | /* average best_t0 and best_t1 without overflow: */ | |
211 | tcenter = (best_t0/2 + best_t1/2); | |
212 | if (best_t0 % 2 + best_t1 % 2 == 2) | |
213 | ++tcenter; | |
214 | return tcenter - best_tm; | |
215 | } | |
216 | ||
217 | /* | |
218 | * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU | |
219 | * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of | |
220 | * unaccounted-for errors (such as getting a machine check in the middle of a calibration | |
221 | * step). The basic idea is for the slave to ask the master what itc value it has and to | |
222 | * read its own itc before and after the master responds. Each iteration gives us three | |
223 | * timestamps: | |
224 | * | |
225 | * slave master | |
226 | * | |
227 | * t0 ---\ | |
228 | * ---\ | |
229 | * ---> | |
230 | * tm | |
231 | * /--- | |
232 | * /--- | |
233 | * t1 <--- | |
234 | * | |
235 | * | |
236 | * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 | |
237 | * and t1. If we achieve this, the clocks are synchronized provided the interconnect | |
238 | * between the slave and the master is symmetric. Even if the interconnect were | |
239 | * asymmetric, we would still know that the synchronization error is smaller than the | |
240 | * roundtrip latency (t0 - t1). | |
241 | * | |
242 | * When the interconnect is quiet and symmetric, this lets us synchronize the itc to | |
243 | * within one or two cycles. However, we can only *guarantee* that the synchronization is | |
244 | * accurate to within a round-trip time, which is typically in the range of several | |
245 | * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually | |
246 | * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better | |
247 | * than half a micro second or so. | |
248 | */ | |
249 | void | |
250 | ia64_sync_itc (unsigned int master) | |
251 | { | |
252 | long i, delta, adj, adjust_latency = 0, done = 0; | |
253 | unsigned long flags, rt, master_time_stamp, bound; | |
254 | #if DEBUG_ITC_SYNC | |
255 | struct { | |
256 | long rt; /* roundtrip time */ | |
257 | long master; /* master's timestamp */ | |
258 | long diff; /* difference between midpoint and master's timestamp */ | |
259 | long lat; /* estimate of itc adjustment latency */ | |
260 | } t[NUM_ROUNDS]; | |
261 | #endif | |
262 | ||
263 | /* | |
264 | * Make sure local timer ticks are disabled while we sync. If | |
265 | * they were enabled, we'd have to worry about nasty issues | |
266 | * like setting the ITC ahead of (or a long time before) the | |
267 | * next scheduled tick. | |
268 | */ | |
269 | BUG_ON((ia64_get_itv() & (1 << 16)) == 0); | |
270 | ||
271 | go[MASTER] = 1; | |
272 | ||
273 | if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) { | |
274 | printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); | |
275 | return; | |
276 | } | |
277 | ||
82975115 DMT |
278 | while (go[MASTER]) |
279 | cpu_relax(); /* wait for master to be ready */ | |
1da177e4 LT |
280 | |
281 | spin_lock_irqsave(&itc_sync_lock, flags); | |
282 | { | |
283 | for (i = 0; i < NUM_ROUNDS; ++i) { | |
284 | delta = get_delta(&rt, &master_time_stamp); | |
285 | if (delta == 0) { | |
286 | done = 1; /* let's lock on to this... */ | |
287 | bound = rt; | |
288 | } | |
289 | ||
290 | if (!done) { | |
291 | if (i > 0) { | |
292 | adjust_latency += -delta; | |
293 | adj = -delta + adjust_latency/4; | |
294 | } else | |
295 | adj = -delta; | |
296 | ||
297 | ia64_set_itc(ia64_get_itc() + adj); | |
298 | } | |
299 | #if DEBUG_ITC_SYNC | |
300 | t[i].rt = rt; | |
301 | t[i].master = master_time_stamp; | |
302 | t[i].diff = delta; | |
303 | t[i].lat = adjust_latency/4; | |
304 | #endif | |
305 | } | |
306 | } | |
307 | spin_unlock_irqrestore(&itc_sync_lock, flags); | |
308 | ||
309 | #if DEBUG_ITC_SYNC | |
310 | for (i = 0; i < NUM_ROUNDS; ++i) | |
311 | printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", | |
312 | t[i].rt, t[i].master, t[i].diff, t[i].lat); | |
313 | #endif | |
314 | ||
315 | printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " | |
316 | "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); | |
317 | } | |
318 | ||
319 | /* | |
320 | * Ideally sets up per-cpu profiling hooks. Doesn't do much now... | |
321 | */ | |
322 | static inline void __devinit | |
323 | smp_setup_percpu_timer (void) | |
324 | { | |
325 | } | |
326 | ||
327 | static void __devinit | |
328 | smp_callin (void) | |
329 | { | |
330 | int cpuid, phys_id; | |
331 | extern void ia64_init_itm(void); | |
332 | ||
333 | #ifdef CONFIG_PERFMON | |
334 | extern void pfm_init_percpu(void); | |
335 | #endif | |
336 | ||
337 | cpuid = smp_processor_id(); | |
338 | phys_id = hard_smp_processor_id(); | |
339 | ||
340 | if (cpu_online(cpuid)) { | |
341 | printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", | |
342 | phys_id, cpuid); | |
343 | BUG(); | |
344 | } | |
345 | ||
346 | lock_ipi_calllock(); | |
347 | cpu_set(cpuid, cpu_online_map); | |
348 | unlock_ipi_calllock(); | |
a9fa06c2 | 349 | per_cpu(cpu_state, cpuid) = CPU_ONLINE; |
1da177e4 LT |
350 | |
351 | smp_setup_percpu_timer(); | |
352 | ||
353 | ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ | |
354 | ||
355 | #ifdef CONFIG_PERFMON | |
356 | pfm_init_percpu(); | |
357 | #endif | |
358 | ||
359 | local_irq_enable(); | |
360 | ||
361 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { | |
362 | /* | |
363 | * Synchronize the ITC with the BP. Need to do this after irqs are | |
364 | * enabled because ia64_sync_itc() calls smp_call_function_single(), which | |
365 | * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls | |
366 | * local_bh_enable(), which bugs out if irqs are not enabled... | |
367 | */ | |
368 | Dprintk("Going to syncup ITC with BP.\n"); | |
369 | ia64_sync_itc(0); | |
370 | } | |
371 | ||
372 | /* | |
373 | * Get our bogomips. | |
374 | */ | |
375 | ia64_init_itm(); | |
376 | calibrate_delay(); | |
377 | local_cpu_data->loops_per_jiffy = loops_per_jiffy; | |
378 | ||
379 | #ifdef CONFIG_IA32_SUPPORT | |
380 | ia32_gdt_init(); | |
381 | #endif | |
382 | ||
383 | /* | |
384 | * Allow the master to continue. | |
385 | */ | |
386 | cpu_set(cpuid, cpu_callin_map); | |
387 | Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); | |
388 | } | |
389 | ||
390 | ||
391 | /* | |
392 | * Activate a secondary processor. head.S calls this. | |
393 | */ | |
394 | int __devinit | |
395 | start_secondary (void *unused) | |
396 | { | |
397 | /* Early console may use I/O ports */ | |
398 | ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); | |
1da177e4 LT |
399 | Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); |
400 | efi_map_pal_code(); | |
401 | cpu_init(); | |
402 | smp_callin(); | |
403 | ||
404 | cpu_idle(); | |
405 | return 0; | |
406 | } | |
407 | ||
408 | struct pt_regs * __devinit idle_regs(struct pt_regs *regs) | |
409 | { | |
410 | return NULL; | |
411 | } | |
412 | ||
413 | struct create_idle { | |
414 | struct task_struct *idle; | |
415 | struct completion done; | |
416 | int cpu; | |
417 | }; | |
418 | ||
419 | void | |
420 | do_fork_idle(void *_c_idle) | |
421 | { | |
422 | struct create_idle *c_idle = _c_idle; | |
423 | ||
424 | c_idle->idle = fork_idle(c_idle->cpu); | |
425 | complete(&c_idle->done); | |
426 | } | |
427 | ||
428 | static int __devinit | |
429 | do_boot_cpu (int sapicid, int cpu) | |
430 | { | |
431 | int timeout; | |
432 | struct create_idle c_idle = { | |
433 | .cpu = cpu, | |
434 | .done = COMPLETION_INITIALIZER(c_idle.done), | |
435 | }; | |
436 | DECLARE_WORK(work, do_fork_idle, &c_idle); | |
b8d8b883 AR |
437 | |
438 | c_idle.idle = get_idle_for_cpu(cpu); | |
439 | if (c_idle.idle) { | |
440 | init_idle(c_idle.idle, cpu); | |
441 | goto do_rest; | |
442 | } | |
443 | ||
1da177e4 LT |
444 | /* |
445 | * We can't use kernel_thread since we must avoid to reschedule the child. | |
446 | */ | |
447 | if (!keventd_up() || current_is_keventd()) | |
448 | work.func(work.data); | |
449 | else { | |
450 | schedule_work(&work); | |
451 | wait_for_completion(&c_idle.done); | |
452 | } | |
453 | ||
454 | if (IS_ERR(c_idle.idle)) | |
455 | panic("failed fork for CPU %d", cpu); | |
b8d8b883 AR |
456 | |
457 | set_idle_for_cpu(cpu, c_idle.idle); | |
458 | ||
459 | do_rest: | |
1da177e4 LT |
460 | task_for_booting_cpu = c_idle.idle; |
461 | ||
462 | Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); | |
463 | ||
b8d8b883 | 464 | set_brendez_area(cpu); |
1da177e4 LT |
465 | platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); |
466 | ||
467 | /* | |
468 | * Wait 10s total for the AP to start | |
469 | */ | |
470 | Dprintk("Waiting on callin_map ..."); | |
471 | for (timeout = 0; timeout < 100000; timeout++) { | |
472 | if (cpu_isset(cpu, cpu_callin_map)) | |
473 | break; /* It has booted */ | |
474 | udelay(100); | |
475 | } | |
476 | Dprintk("\n"); | |
477 | ||
478 | if (!cpu_isset(cpu, cpu_callin_map)) { | |
479 | printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); | |
480 | ia64_cpu_to_sapicid[cpu] = -1; | |
481 | cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */ | |
482 | return -EINVAL; | |
483 | } | |
484 | return 0; | |
485 | } | |
486 | ||
487 | static int __init | |
488 | decay (char *str) | |
489 | { | |
490 | int ticks; | |
491 | get_option (&str, &ticks); | |
492 | return 1; | |
493 | } | |
494 | ||
495 | __setup("decay=", decay); | |
496 | ||
497 | /* | |
498 | * Initialize the logical CPU number to SAPICID mapping | |
499 | */ | |
500 | void __init | |
501 | smp_build_cpu_map (void) | |
502 | { | |
503 | int sapicid, cpu, i; | |
504 | int boot_cpu_id = hard_smp_processor_id(); | |
505 | ||
506 | for (cpu = 0; cpu < NR_CPUS; cpu++) { | |
507 | ia64_cpu_to_sapicid[cpu] = -1; | |
508 | #ifdef CONFIG_HOTPLUG_CPU | |
509 | cpu_set(cpu, cpu_possible_map); | |
510 | #endif | |
511 | } | |
512 | ||
513 | ia64_cpu_to_sapicid[0] = boot_cpu_id; | |
514 | cpus_clear(cpu_present_map); | |
515 | cpu_set(0, cpu_present_map); | |
516 | cpu_set(0, cpu_possible_map); | |
517 | for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { | |
518 | sapicid = smp_boot_data.cpu_phys_id[i]; | |
519 | if (sapicid == boot_cpu_id) | |
520 | continue; | |
521 | cpu_set(cpu, cpu_present_map); | |
522 | cpu_set(cpu, cpu_possible_map); | |
523 | ia64_cpu_to_sapicid[cpu] = sapicid; | |
524 | cpu++; | |
525 | } | |
526 | } | |
527 | ||
1da177e4 LT |
528 | /* |
529 | * Cycle through the APs sending Wakeup IPIs to boot each. | |
530 | */ | |
531 | void __init | |
532 | smp_prepare_cpus (unsigned int max_cpus) | |
533 | { | |
534 | int boot_cpu_id = hard_smp_processor_id(); | |
535 | ||
536 | /* | |
537 | * Initialize the per-CPU profiling counter/multiplier | |
538 | */ | |
539 | ||
540 | smp_setup_percpu_timer(); | |
541 | ||
542 | /* | |
543 | * We have the boot CPU online for sure. | |
544 | */ | |
545 | cpu_set(0, cpu_online_map); | |
546 | cpu_set(0, cpu_callin_map); | |
547 | ||
548 | local_cpu_data->loops_per_jiffy = loops_per_jiffy; | |
549 | ia64_cpu_to_sapicid[0] = boot_cpu_id; | |
550 | ||
551 | printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); | |
552 | ||
553 | current_thread_info()->cpu = 0; | |
554 | ||
555 | /* | |
556 | * If SMP should be disabled, then really disable it! | |
557 | */ | |
558 | if (!max_cpus) { | |
559 | printk(KERN_INFO "SMP mode deactivated.\n"); | |
560 | cpus_clear(cpu_online_map); | |
561 | cpus_clear(cpu_present_map); | |
562 | cpus_clear(cpu_possible_map); | |
563 | cpu_set(0, cpu_online_map); | |
564 | cpu_set(0, cpu_present_map); | |
565 | cpu_set(0, cpu_possible_map); | |
566 | return; | |
567 | } | |
568 | } | |
569 | ||
570 | void __devinit smp_prepare_boot_cpu(void) | |
571 | { | |
572 | cpu_set(smp_processor_id(), cpu_online_map); | |
573 | cpu_set(smp_processor_id(), cpu_callin_map); | |
a9fa06c2 | 574 | per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; |
1da177e4 LT |
575 | } |
576 | ||
e927ecb0 SS |
577 | /* |
578 | * mt_info[] is a temporary store for all info returned by | |
579 | * PAL_LOGICAL_TO_PHYSICAL, to be copied into cpuinfo_ia64 when the | |
580 | * specific cpu comes. | |
581 | */ | |
582 | static struct { | |
583 | __u32 socket_id; | |
584 | __u16 core_id; | |
585 | __u16 thread_id; | |
586 | __u16 proc_fixed_addr; | |
587 | __u8 valid; | |
66302f21 | 588 | } mt_info[NR_CPUS] __devinitdata; |
e927ecb0 | 589 | |
1da177e4 | 590 | #ifdef CONFIG_HOTPLUG_CPU |
e927ecb0 SS |
591 | static inline void |
592 | remove_from_mtinfo(int cpu) | |
593 | { | |
594 | int i; | |
595 | ||
596 | for_each_cpu(i) | |
597 | if (mt_info[i].valid && mt_info[i].socket_id == | |
598 | cpu_data(cpu)->socket_id) | |
599 | mt_info[i].valid = 0; | |
600 | } | |
601 | ||
602 | static inline void | |
603 | clear_cpu_sibling_map(int cpu) | |
604 | { | |
605 | int i; | |
606 | ||
607 | for_each_cpu_mask(i, cpu_sibling_map[cpu]) | |
608 | cpu_clear(cpu, cpu_sibling_map[i]); | |
609 | for_each_cpu_mask(i, cpu_core_map[cpu]) | |
610 | cpu_clear(cpu, cpu_core_map[i]); | |
611 | ||
612 | cpu_sibling_map[cpu] = cpu_core_map[cpu] = CPU_MASK_NONE; | |
613 | } | |
614 | ||
615 | static void | |
616 | remove_siblinginfo(int cpu) | |
617 | { | |
618 | int last = 0; | |
619 | ||
620 | if (cpu_data(cpu)->threads_per_core == 1 && | |
621 | cpu_data(cpu)->cores_per_socket == 1) { | |
622 | cpu_clear(cpu, cpu_core_map[cpu]); | |
623 | cpu_clear(cpu, cpu_sibling_map[cpu]); | |
624 | return; | |
625 | } | |
626 | ||
627 | last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0); | |
628 | ||
629 | /* remove it from all sibling map's */ | |
630 | clear_cpu_sibling_map(cpu); | |
631 | ||
632 | /* if this cpu is the last in the core group, remove all its info | |
633 | * from mt_info structure | |
634 | */ | |
635 | if (last) | |
636 | remove_from_mtinfo(cpu); | |
637 | } | |
638 | ||
1da177e4 LT |
639 | extern void fixup_irqs(void); |
640 | /* must be called with cpucontrol mutex held */ | |
1da177e4 LT |
641 | int __cpu_disable(void) |
642 | { | |
643 | int cpu = smp_processor_id(); | |
644 | ||
645 | /* | |
646 | * dont permit boot processor for now | |
647 | */ | |
648 | if (cpu == 0) | |
649 | return -EBUSY; | |
650 | ||
e927ecb0 | 651 | remove_siblinginfo(cpu); |
f3705136 | 652 | cpu_clear(cpu, cpu_online_map); |
1da177e4 LT |
653 | fixup_irqs(); |
654 | local_flush_tlb_all(); | |
b8d8b883 | 655 | cpu_clear(cpu, cpu_callin_map); |
1da177e4 LT |
656 | return 0; |
657 | } | |
658 | ||
659 | void __cpu_die(unsigned int cpu) | |
660 | { | |
661 | unsigned int i; | |
662 | ||
663 | for (i = 0; i < 100; i++) { | |
664 | /* They ack this in play_dead by setting CPU_DEAD */ | |
665 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) | |
666 | { | |
b8d8b883 | 667 | printk ("CPU %d is now offline\n", cpu); |
1da177e4 LT |
668 | return; |
669 | } | |
670 | msleep(100); | |
671 | } | |
672 | printk(KERN_ERR "CPU %u didn't die...\n", cpu); | |
673 | } | |
674 | #else /* !CONFIG_HOTPLUG_CPU */ | |
1da177e4 LT |
675 | int __cpu_disable(void) |
676 | { | |
677 | return -ENOSYS; | |
678 | } | |
679 | ||
680 | void __cpu_die(unsigned int cpu) | |
681 | { | |
682 | /* We said "no" in __cpu_disable */ | |
683 | BUG(); | |
684 | } | |
685 | #endif /* CONFIG_HOTPLUG_CPU */ | |
686 | ||
687 | void | |
688 | smp_cpus_done (unsigned int dummy) | |
689 | { | |
690 | int cpu; | |
691 | unsigned long bogosum = 0; | |
692 | ||
693 | /* | |
694 | * Allow the user to impress friends. | |
695 | */ | |
696 | ||
dc565b52 | 697 | for_each_online_cpu(cpu) { |
698 | bogosum += cpu_data(cpu)->loops_per_jiffy; | |
699 | } | |
1da177e4 LT |
700 | |
701 | printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", | |
702 | (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); | |
703 | } | |
704 | ||
e927ecb0 SS |
705 | static inline void __devinit |
706 | set_cpu_sibling_map(int cpu) | |
707 | { | |
708 | int i; | |
709 | ||
710 | for_each_online_cpu(i) { | |
711 | if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { | |
712 | cpu_set(i, cpu_core_map[cpu]); | |
713 | cpu_set(cpu, cpu_core_map[i]); | |
714 | if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { | |
715 | cpu_set(i, cpu_sibling_map[cpu]); | |
716 | cpu_set(cpu, cpu_sibling_map[i]); | |
717 | } | |
718 | } | |
719 | } | |
720 | } | |
721 | ||
1da177e4 LT |
722 | int __devinit |
723 | __cpu_up (unsigned int cpu) | |
724 | { | |
725 | int ret; | |
726 | int sapicid; | |
727 | ||
728 | sapicid = ia64_cpu_to_sapicid[cpu]; | |
729 | if (sapicid == -1) | |
730 | return -EINVAL; | |
731 | ||
732 | /* | |
b8d8b883 AR |
733 | * Already booted cpu? not valid anymore since we dont |
734 | * do idle loop tightspin anymore. | |
1da177e4 LT |
735 | */ |
736 | if (cpu_isset(cpu, cpu_callin_map)) | |
b8d8b883 AR |
737 | return -EINVAL; |
738 | ||
a9fa06c2 | 739 | per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; |
1da177e4 LT |
740 | /* Processor goes to start_secondary(), sets online flag */ |
741 | ret = do_boot_cpu(sapicid, cpu); | |
742 | if (ret < 0) | |
743 | return ret; | |
744 | ||
e927ecb0 SS |
745 | if (cpu_data(cpu)->threads_per_core == 1 && |
746 | cpu_data(cpu)->cores_per_socket == 1) { | |
747 | cpu_set(cpu, cpu_sibling_map[cpu]); | |
748 | cpu_set(cpu, cpu_core_map[cpu]); | |
749 | return 0; | |
750 | } | |
751 | ||
752 | set_cpu_sibling_map(cpu); | |
753 | ||
1da177e4 LT |
754 | return 0; |
755 | } | |
756 | ||
757 | /* | |
758 | * Assume that CPU's have been discovered by some platform-dependent interface. For | |
759 | * SoftSDV/Lion, that would be ACPI. | |
760 | * | |
761 | * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). | |
762 | */ | |
763 | void __init | |
764 | init_smp_config(void) | |
765 | { | |
766 | struct fptr { | |
767 | unsigned long fp; | |
768 | unsigned long gp; | |
769 | } *ap_startup; | |
770 | long sal_ret; | |
771 | ||
772 | /* Tell SAL where to drop the AP's. */ | |
773 | ap_startup = (struct fptr *) start_ap; | |
774 | sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, | |
775 | ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); | |
776 | if (sal_ret < 0) | |
777 | printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", | |
778 | ia64_sal_strerror(sal_ret)); | |
779 | } | |
780 | ||
e927ecb0 SS |
781 | static inline int __devinit |
782 | check_for_mtinfo_index(void) | |
783 | { | |
784 | int i; | |
785 | ||
786 | for_each_cpu(i) | |
787 | if (!mt_info[i].valid) | |
788 | return i; | |
789 | ||
790 | return -1; | |
791 | } | |
792 | ||
793 | /* | |
794 | * Search the mt_info to find out if this socket's cid/tid information is | |
795 | * cached or not. If the socket exists, fill in the core_id and thread_id | |
796 | * in cpuinfo | |
797 | */ | |
798 | static int __devinit | |
799 | check_for_new_socket(__u16 logical_address, struct cpuinfo_ia64 *c) | |
800 | { | |
801 | int i; | |
802 | __u32 sid = c->socket_id; | |
803 | ||
804 | for_each_cpu(i) { | |
805 | if (mt_info[i].valid && mt_info[i].proc_fixed_addr == logical_address | |
806 | && mt_info[i].socket_id == sid) { | |
807 | c->core_id = mt_info[i].core_id; | |
808 | c->thread_id = mt_info[i].thread_id; | |
809 | return 1; /* not a new socket */ | |
810 | } | |
811 | } | |
812 | return 0; | |
813 | } | |
814 | ||
815 | /* | |
816 | * identify_siblings(cpu) gets called from identify_cpu. This populates the | |
817 | * information related to logical execution units in per_cpu_data structure. | |
818 | */ | |
819 | void __devinit | |
820 | identify_siblings(struct cpuinfo_ia64 *c) | |
821 | { | |
822 | s64 status; | |
823 | u16 pltid; | |
824 | u64 proc_fixed_addr; | |
825 | int count, i; | |
826 | pal_logical_to_physical_t info; | |
827 | ||
828 | if (smp_num_cpucores == 1 && smp_num_siblings == 1) | |
829 | return; | |
830 | ||
831 | if ((status = ia64_pal_logical_to_phys(0, &info)) != PAL_STATUS_SUCCESS) { | |
832 | printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n", | |
833 | status); | |
834 | return; | |
835 | } | |
836 | if ((status = ia64_sal_physical_id_info(&pltid)) != PAL_STATUS_SUCCESS) { | |
837 | printk(KERN_ERR "ia64_sal_pltid failed with %ld\n", status); | |
838 | return; | |
839 | } | |
840 | if ((status = ia64_pal_fixed_addr(&proc_fixed_addr)) != PAL_STATUS_SUCCESS) { | |
841 | printk(KERN_ERR "ia64_pal_fixed_addr failed with %ld\n", status); | |
842 | return; | |
843 | } | |
844 | ||
845 | c->socket_id = (pltid << 8) | info.overview_ppid; | |
846 | c->cores_per_socket = info.overview_cpp; | |
847 | c->threads_per_core = info.overview_tpc; | |
848 | count = c->num_log = info.overview_num_log; | |
849 | ||
850 | /* If the thread and core id information is already cached, then | |
851 | * we will simply update cpu_info and return. Otherwise, we will | |
852 | * do the PAL calls and cache core and thread id's of all the siblings. | |
853 | */ | |
854 | if (check_for_new_socket(proc_fixed_addr, c)) | |
855 | return; | |
856 | ||
857 | for (i = 0; i < count; i++) { | |
858 | int index; | |
859 | ||
860 | if (i && (status = ia64_pal_logical_to_phys(i, &info)) | |
861 | != PAL_STATUS_SUCCESS) { | |
862 | printk(KERN_ERR "ia64_pal_logical_to_phys failed" | |
863 | " with %ld\n", status); | |
864 | return; | |
865 | } | |
866 | if (info.log2_la == proc_fixed_addr) { | |
867 | c->core_id = info.log1_cid; | |
868 | c->thread_id = info.log1_tid; | |
869 | } | |
870 | ||
871 | index = check_for_mtinfo_index(); | |
872 | /* We will not do the mt_info caching optimization in this case. | |
873 | */ | |
874 | if (index < 0) | |
875 | continue; | |
876 | ||
877 | mt_info[index].valid = 1; | |
878 | mt_info[index].socket_id = c->socket_id; | |
879 | mt_info[index].core_id = info.log1_cid; | |
880 | mt_info[index].thread_id = info.log1_tid; | |
881 | mt_info[index].proc_fixed_addr = info.log2_la; | |
882 | } | |
883 | } |