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1da177e4 LT |
1 | /* |
2 | * linux/arch/ia64/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * Stephane Eranian <eranian@hpl.hp.com> | |
6 | * David Mosberger <davidm@hpl.hp.com> | |
7 | * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> | |
8 | * Copyright (C) 1999-2000 VA Linux Systems | |
9 | * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com> | |
10 | */ | |
1da177e4 LT |
11 | |
12 | #include <linux/cpu.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/profile.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/time.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/efi.h> | |
1da177e4 | 21 | #include <linux/timex.h> |
0aa366f3 | 22 | #include <linux/clocksource.h> |
1da177e4 LT |
23 | |
24 | #include <asm/machvec.h> | |
25 | #include <asm/delay.h> | |
26 | #include <asm/hw_irq.h> | |
00d21d82 | 27 | #include <asm/paravirt.h> |
1da177e4 LT |
28 | #include <asm/ptrace.h> |
29 | #include <asm/sal.h> | |
30 | #include <asm/sections.h> | |
31 | #include <asm/system.h> | |
32 | ||
0aa366f3 TL |
33 | #include "fsyscall_gtod_data.h" |
34 | ||
35 | static cycle_t itc_get_cycles(void); | |
36 | ||
37 | struct fsyscall_gtod_data_t fsyscall_gtod_data = { | |
38 | .lock = SEQLOCK_UNLOCKED, | |
39 | }; | |
40 | ||
41 | struct itc_jitter_data_t itc_jitter_data; | |
42 | ||
ff741906 | 43 | volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */ |
1da177e4 LT |
44 | |
45 | #ifdef CONFIG_IA64_DEBUG_IRQ | |
46 | ||
47 | unsigned long last_cli_ip; | |
48 | EXPORT_SYMBOL(last_cli_ip); | |
49 | ||
50 | #endif | |
51 | ||
00d21d82 IY |
52 | #ifdef CONFIG_PARAVIRT |
53 | static void | |
54 | paravirt_clocksource_resume(void) | |
55 | { | |
56 | if (pv_time_ops.clocksource_resume) | |
57 | pv_time_ops.clocksource_resume(); | |
58 | } | |
59 | #endif | |
60 | ||
0aa366f3 | 61 | static struct clocksource clocksource_itc = { |
3eb05676 LZ |
62 | .name = "itc", |
63 | .rating = 350, | |
64 | .read = itc_get_cycles, | |
65 | .mask = CLOCKSOURCE_MASK(64), | |
66 | .mult = 0, /*to be calculated*/ | |
67 | .shift = 16, | |
68 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
00d21d82 IY |
69 | #ifdef CONFIG_PARAVIRT |
70 | .resume = paravirt_clocksource_resume, | |
71 | #endif | |
1da177e4 | 72 | }; |
0aa366f3 | 73 | static struct clocksource *itc_clocksource; |
1da177e4 | 74 | |
b64f34cd HS |
75 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
76 | ||
77 | #include <linux/kernel_stat.h> | |
78 | ||
79 | extern cputime_t cycle_to_cputime(u64 cyc); | |
80 | ||
81 | /* | |
82 | * Called from the context switch with interrupts disabled, to charge all | |
83 | * accumulated times to the current process, and to prepare accounting on | |
84 | * the next process. | |
85 | */ | |
86 | void ia64_account_on_switch(struct task_struct *prev, struct task_struct *next) | |
87 | { | |
88 | struct thread_info *pi = task_thread_info(prev); | |
89 | struct thread_info *ni = task_thread_info(next); | |
90 | cputime_t delta_stime, delta_utime; | |
91 | __u64 now; | |
92 | ||
93 | now = ia64_get_itc(); | |
94 | ||
95 | delta_stime = cycle_to_cputime(pi->ac_stime + (now - pi->ac_stamp)); | |
457533a7 | 96 | account_system_time(prev, 0, delta_stime, delta_stime); |
b64f34cd HS |
97 | |
98 | if (pi->ac_utime) { | |
99 | delta_utime = cycle_to_cputime(pi->ac_utime); | |
457533a7 | 100 | account_user_time(prev, delta_utime, delta_utime); |
b64f34cd HS |
101 | } |
102 | ||
103 | pi->ac_stamp = ni->ac_stamp = now; | |
104 | ni->ac_stime = ni->ac_utime = 0; | |
105 | } | |
106 | ||
107 | /* | |
108 | * Account time for a transition between system, hard irq or soft irq state. | |
109 | * Note that this function is called with interrupts enabled. | |
110 | */ | |
111 | void account_system_vtime(struct task_struct *tsk) | |
112 | { | |
113 | struct thread_info *ti = task_thread_info(tsk); | |
114 | unsigned long flags; | |
115 | cputime_t delta_stime; | |
116 | __u64 now; | |
117 | ||
118 | local_irq_save(flags); | |
119 | ||
120 | now = ia64_get_itc(); | |
121 | ||
122 | delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp)); | |
457533a7 | 123 | account_system_time(tsk, 0, delta_stime, delta_stime); |
b64f34cd HS |
124 | ti->ac_stime = 0; |
125 | ||
126 | ti->ac_stamp = now; | |
127 | ||
128 | local_irq_restore(flags); | |
129 | } | |
3a677d21 | 130 | EXPORT_SYMBOL_GPL(account_system_vtime); |
b64f34cd HS |
131 | |
132 | /* | |
133 | * Called from the timer interrupt handler to charge accumulated user time | |
134 | * to the current process. Must be called with interrupts disabled. | |
135 | */ | |
136 | void account_process_tick(struct task_struct *p, int user_tick) | |
137 | { | |
138 | struct thread_info *ti = task_thread_info(p); | |
139 | cputime_t delta_utime; | |
140 | ||
141 | if (ti->ac_utime) { | |
142 | delta_utime = cycle_to_cputime(ti->ac_utime); | |
457533a7 | 143 | account_user_time(p, delta_utime, delta_utime); |
b64f34cd HS |
144 | ti->ac_utime = 0; |
145 | } | |
146 | } | |
147 | ||
148 | #endif /* CONFIG_VIRT_CPU_ACCOUNTING */ | |
149 | ||
1da177e4 | 150 | static irqreturn_t |
7d12e780 | 151 | timer_interrupt (int irq, void *dev_id) |
1da177e4 LT |
152 | { |
153 | unsigned long new_itm; | |
154 | ||
155 | if (unlikely(cpu_is_offline(smp_processor_id()))) { | |
156 | return IRQ_HANDLED; | |
157 | } | |
158 | ||
7d12e780 | 159 | platform_timer_interrupt(irq, dev_id); |
1da177e4 LT |
160 | |
161 | new_itm = local_cpu_data->itm_next; | |
162 | ||
163 | if (!time_after(ia64_get_itc(), new_itm)) | |
164 | printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", | |
165 | ia64_get_itc(), new_itm); | |
166 | ||
7d12e780 | 167 | profile_tick(CPU_PROFILING); |
1da177e4 | 168 | |
00d21d82 IY |
169 | if (paravirt_do_steal_accounting(&new_itm)) |
170 | goto skip_process_time_accounting; | |
171 | ||
1da177e4 | 172 | while (1) { |
7d12e780 | 173 | update_process_times(user_mode(get_irq_regs())); |
1da177e4 LT |
174 | |
175 | new_itm += local_cpu_data->itm_delta; | |
176 | ||
ff741906 | 177 | if (smp_processor_id() == time_keeper_id) { |
1da177e4 LT |
178 | /* |
179 | * Here we are in the timer irq handler. We have irqs locally | |
180 | * disabled, but we don't know if the timer_bh is running on | |
181 | * another CPU. We need to avoid to SMP race by acquiring the | |
182 | * xtime_lock. | |
183 | */ | |
184 | write_seqlock(&xtime_lock); | |
3171a030 | 185 | do_timer(1); |
1da177e4 LT |
186 | local_cpu_data->itm_next = new_itm; |
187 | write_sequnlock(&xtime_lock); | |
188 | } else | |
189 | local_cpu_data->itm_next = new_itm; | |
190 | ||
191 | if (time_after(new_itm, ia64_get_itc())) | |
192 | break; | |
accaddb2 JS |
193 | |
194 | /* | |
195 | * Allow IPIs to interrupt the timer loop. | |
196 | */ | |
197 | local_irq_enable(); | |
198 | local_irq_disable(); | |
1da177e4 LT |
199 | } |
200 | ||
00d21d82 IY |
201 | skip_process_time_accounting: |
202 | ||
1da177e4 LT |
203 | do { |
204 | /* | |
205 | * If we're too close to the next clock tick for | |
206 | * comfort, we increase the safety margin by | |
207 | * intentionally dropping the next tick(s). We do NOT | |
208 | * update itm.next because that would force us to call | |
209 | * do_timer() which in turn would let our clock run | |
210 | * too fast (with the potentially devastating effect | |
211 | * of losing monotony of time). | |
212 | */ | |
213 | while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2)) | |
214 | new_itm += local_cpu_data->itm_delta; | |
215 | ia64_set_itm(new_itm); | |
216 | /* double check, in case we got hit by a (slow) PMI: */ | |
217 | } while (time_after_eq(ia64_get_itc(), new_itm)); | |
218 | return IRQ_HANDLED; | |
219 | } | |
220 | ||
221 | /* | |
222 | * Encapsulate access to the itm structure for SMP. | |
223 | */ | |
224 | void | |
225 | ia64_cpu_local_tick (void) | |
226 | { | |
227 | int cpu = smp_processor_id(); | |
228 | unsigned long shift = 0, delta; | |
229 | ||
230 | /* arrange for the cycle counter to generate a timer interrupt: */ | |
231 | ia64_set_itv(IA64_TIMER_VECTOR); | |
232 | ||
233 | delta = local_cpu_data->itm_delta; | |
234 | /* | |
235 | * Stagger the timer tick for each CPU so they don't occur all at (almost) the | |
236 | * same time: | |
237 | */ | |
238 | if (cpu) { | |
239 | unsigned long hi = 1UL << ia64_fls(cpu); | |
240 | shift = (2*(cpu - hi) + 1) * delta/hi/2; | |
241 | } | |
242 | local_cpu_data->itm_next = ia64_get_itc() + delta + shift; | |
243 | ia64_set_itm(local_cpu_data->itm_next); | |
244 | } | |
245 | ||
246 | static int nojitter; | |
247 | ||
248 | static int __init nojitter_setup(char *str) | |
249 | { | |
250 | nojitter = 1; | |
251 | printk("Jitter checking for ITC timers disabled\n"); | |
252 | return 1; | |
253 | } | |
254 | ||
255 | __setup("nojitter", nojitter_setup); | |
256 | ||
257 | ||
258 | void __devinit | |
259 | ia64_init_itm (void) | |
260 | { | |
261 | unsigned long platform_base_freq, itc_freq; | |
262 | struct pal_freq_ratio itc_ratio, proc_ratio; | |
263 | long status, platform_base_drift, itc_drift; | |
264 | ||
265 | /* | |
266 | * According to SAL v2.6, we need to use a SAL call to determine the platform base | |
267 | * frequency and then a PAL call to determine the frequency ratio between the ITC | |
268 | * and the base frequency. | |
269 | */ | |
270 | status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM, | |
271 | &platform_base_freq, &platform_base_drift); | |
272 | if (status != 0) { | |
273 | printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status)); | |
274 | } else { | |
275 | status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio); | |
276 | if (status != 0) | |
277 | printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status); | |
278 | } | |
279 | if (status != 0) { | |
280 | /* invent "random" values */ | |
281 | printk(KERN_ERR | |
282 | "SAL/PAL failed to obtain frequency info---inventing reasonable values\n"); | |
283 | platform_base_freq = 100000000; | |
284 | platform_base_drift = -1; /* no drift info */ | |
285 | itc_ratio.num = 3; | |
286 | itc_ratio.den = 1; | |
287 | } | |
288 | if (platform_base_freq < 40000000) { | |
289 | printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n", | |
290 | platform_base_freq); | |
291 | platform_base_freq = 75000000; | |
292 | platform_base_drift = -1; | |
293 | } | |
294 | if (!proc_ratio.den) | |
295 | proc_ratio.den = 1; /* avoid division by zero */ | |
296 | if (!itc_ratio.den) | |
297 | itc_ratio.den = 1; /* avoid division by zero */ | |
298 | ||
299 | itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den; | |
300 | ||
301 | local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ; | |
2ab9391d | 302 | printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " |
1da177e4 LT |
303 | "ITC freq=%lu.%03luMHz", smp_processor_id(), |
304 | platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000, | |
305 | itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000); | |
306 | ||
307 | if (platform_base_drift != -1) { | |
308 | itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den; | |
309 | printk("+/-%ldppm\n", itc_drift); | |
310 | } else { | |
311 | itc_drift = -1; | |
312 | printk("\n"); | |
313 | } | |
314 | ||
315 | local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den; | |
316 | local_cpu_data->itc_freq = itc_freq; | |
317 | local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC; | |
318 | local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT) | |
319 | + itc_freq/2)/itc_freq; | |
320 | ||
321 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { | |
1da177e4 LT |
322 | #ifdef CONFIG_SMP |
323 | /* On IA64 in an SMP configuration ITCs are never accurately synchronized. | |
324 | * Jitter compensation requires a cmpxchg which may limit | |
325 | * the scalability of the syscalls for retrieving time. | |
326 | * The ITC synchronization is usually successful to within a few | |
327 | * ITC ticks but this is not a sure thing. If you need to improve | |
328 | * timer performance in SMP situations then boot the kernel with the | |
329 | * "nojitter" option. However, doing so may result in time fluctuating (maybe | |
330 | * even going backward) if the ITC offsets between the individual CPUs | |
331 | * are too large. | |
332 | */ | |
0aa366f3 TL |
333 | if (!nojitter) |
334 | itc_jitter_data.itc_jitter = 1; | |
1da177e4 | 335 | #endif |
b718f91c CL |
336 | } else |
337 | /* | |
338 | * ITC is drifty and we have not synchronized the ITCs in smpboot.c. | |
339 | * ITC values may fluctuate significantly between processors. | |
340 | * Clock should not be used for hrtimers. Mark itc as only | |
341 | * useful for boot and testing. | |
342 | * | |
343 | * Note that jitter compensation is off! There is no point of | |
344 | * synchronizing ITCs since they may be large differentials | |
345 | * that change over time. | |
346 | * | |
347 | * The only way to fix this would be to repeatedly sync the | |
348 | * ITCs. Until that time we have to avoid ITC. | |
349 | */ | |
350 | clocksource_itc.rating = 50; | |
1da177e4 | 351 | |
00d21d82 IY |
352 | paravirt_init_missing_ticks_accounting(smp_processor_id()); |
353 | ||
354 | /* avoid softlock up message when cpu is unplug and plugged again. */ | |
355 | touch_softlockup_watchdog(); | |
356 | ||
1da177e4 LT |
357 | /* Setup the CPU local timer tick */ |
358 | ia64_cpu_local_tick(); | |
0aa366f3 TL |
359 | |
360 | if (!itc_clocksource) { | |
361 | /* Sort out mult/shift values: */ | |
362 | clocksource_itc.mult = | |
363 | clocksource_hz2mult(local_cpu_data->itc_freq, | |
364 | clocksource_itc.shift); | |
365 | clocksource_register(&clocksource_itc); | |
366 | itc_clocksource = &clocksource_itc; | |
367 | } | |
1da177e4 LT |
368 | } |
369 | ||
8dc94630 | 370 | static cycle_t itc_get_cycles(void) |
0aa366f3 TL |
371 | { |
372 | u64 lcycle, now, ret; | |
373 | ||
374 | if (!itc_jitter_data.itc_jitter) | |
375 | return get_cycles(); | |
376 | ||
377 | lcycle = itc_jitter_data.itc_lastcycle; | |
378 | now = get_cycles(); | |
379 | if (lcycle && time_after(lcycle, now)) | |
380 | return lcycle; | |
381 | ||
382 | /* | |
383 | * Keep track of the last timer value returned. | |
384 | * In an SMP environment, you could lose out in contention of | |
385 | * cmpxchg. If so, your cmpxchg returns new value which the | |
386 | * winner of contention updated to. Use the new value instead. | |
387 | */ | |
388 | ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now); | |
389 | if (unlikely(ret != lcycle)) | |
390 | return ret; | |
391 | ||
392 | return now; | |
393 | } | |
394 | ||
395 | ||
1da177e4 LT |
396 | static struct irqaction timer_irqaction = { |
397 | .handler = timer_interrupt, | |
d217c265 | 398 | .flags = IRQF_DISABLED | IRQF_IRQPOLL, |
1da177e4 LT |
399 | .name = "timer" |
400 | }; | |
401 | ||
402 | void __init | |
403 | time_init (void) | |
404 | { | |
405 | register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction); | |
406 | efi_gettimeofday(&xtime); | |
407 | ia64_init_itm(); | |
408 | ||
409 | /* | |
410 | * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the | |
411 | * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC). | |
412 | */ | |
413 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); | |
414 | } | |
f5899b5d | 415 | |
defbb2c9 | 416 | /* |
417 | * Generic udelay assumes that if preemption is allowed and the thread | |
418 | * migrates to another CPU, that the ITC values are synchronized across | |
419 | * all CPUs. | |
420 | */ | |
421 | static void | |
422 | ia64_itc_udelay (unsigned long usecs) | |
f5899b5d | 423 | { |
defbb2c9 | 424 | unsigned long start = ia64_get_itc(); |
425 | unsigned long end = start + usecs*local_cpu_data->cyc_per_usec; | |
f5899b5d | 426 | |
defbb2c9 | 427 | while (time_before(ia64_get_itc(), end)) |
428 | cpu_relax(); | |
429 | } | |
f5899b5d | 430 | |
defbb2c9 | 431 | void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay; |
f5899b5d | 432 | |
defbb2c9 | 433 | void |
434 | udelay (unsigned long usecs) | |
435 | { | |
436 | (*ia64_udelay)(usecs); | |
f5899b5d JH |
437 | } |
438 | EXPORT_SYMBOL(udelay); | |
d6e56a2a | 439 | |
2c622148 TB |
440 | /* IA64 doesn't cache the timezone */ |
441 | void update_vsyscall_tz(void) | |
442 | { | |
443 | } | |
444 | ||
0aa366f3 TL |
445 | void update_vsyscall(struct timespec *wall, struct clocksource *c) |
446 | { | |
447 | unsigned long flags; | |
448 | ||
449 | write_seqlock_irqsave(&fsyscall_gtod_data.lock, flags); | |
450 | ||
451 | /* copy fsyscall clock data */ | |
452 | fsyscall_gtod_data.clk_mask = c->mask; | |
453 | fsyscall_gtod_data.clk_mult = c->mult; | |
454 | fsyscall_gtod_data.clk_shift = c->shift; | |
455 | fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio; | |
456 | fsyscall_gtod_data.clk_cycle_last = c->cycle_last; | |
457 | ||
458 | /* copy kernel time structures */ | |
459 | fsyscall_gtod_data.wall_time.tv_sec = wall->tv_sec; | |
460 | fsyscall_gtod_data.wall_time.tv_nsec = wall->tv_nsec; | |
461 | fsyscall_gtod_data.monotonic_time.tv_sec = wall_to_monotonic.tv_sec | |
462 | + wall->tv_sec; | |
463 | fsyscall_gtod_data.monotonic_time.tv_nsec = wall_to_monotonic.tv_nsec | |
464 | + wall->tv_nsec; | |
465 | ||
466 | /* normalize */ | |
467 | while (fsyscall_gtod_data.monotonic_time.tv_nsec >= NSEC_PER_SEC) { | |
468 | fsyscall_gtod_data.monotonic_time.tv_nsec -= NSEC_PER_SEC; | |
469 | fsyscall_gtod_data.monotonic_time.tv_sec++; | |
470 | } | |
471 | ||
472 | write_sequnlock_irqrestore(&fsyscall_gtod_data.lock, flags); | |
473 | } | |
474 |