[deliverable/linux.git] / arch / ia64 / kernel / time.c

/*
 * linux/arch/ia64/kernel/time.c
 *
 * Copyright (C) 1998-2003 Hewlett-Packard Co
 *	Stephane Eranian <eranian@hpl.hp.com>
 *	David Mosberger <davidm@hpl.hp.com>
 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
 * Copyright (C) 1999-2000 VA Linux Systems
 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
 */

#include <linux/cpu.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/profile.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <linux/interrupt.h>
#include <linux/efi.h>
#include <linux/timex.h>
#include <linux/clocksource.h>

#include <asm/machvec.h>
#include <asm/delay.h>
#include <asm/hw_irq.h>
#include <asm/ptrace.h>
#include <asm/sal.h>
#include <asm/sections.h>
#include <asm/system.h>

#include "fsyscall_gtod_data.h"

static cycle_t itc_get_cycles(void);

struct fsyscall_gtod_data_t fsyscall_gtod_data = {
	.lock = SEQLOCK_UNLOCKED,
};

struct itc_jitter_data_t itc_jitter_data;

volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */

#ifdef CONFIG_IA64_DEBUG_IRQ

unsigned long last_cli_ip;
EXPORT_SYMBOL(last_cli_ip);

#endif

static struct clocksource clocksource_itc = {
	.name           = "itc",
	.rating         = 350,
	.read           = itc_get_cycles,
	.mask           = CLOCKSOURCE_MASK(64),
	.mult           = 0, /*to be calculated*/
	.shift          = 16,
	.flags          = CLOCK_SOURCE_IS_CONTINUOUS,
};
static struct clocksource *itc_clocksource;

#ifdef CONFIG_VIRT_CPU_ACCOUNTING

#include <linux/kernel_stat.h>

extern cputime_t cycle_to_cputime(u64 cyc);

/*
 * Called from the context switch with interrupts disabled, to charge all
 * accumulated times to the current process, and to prepare accounting on
 * the next process.
 */
void ia64_account_on_switch(struct task_struct *prev, struct task_struct *next)
{
	struct thread_info *pi = task_thread_info(prev);
	struct thread_info *ni = task_thread_info(next);
	cputime_t delta_stime, delta_utime;
	__u64 now;

	now = ia64_get_itc();

	delta_stime = cycle_to_cputime(pi->ac_stime + (now - pi->ac_stamp));
	account_system_time(prev, 0, delta_stime);
	account_system_time_scaled(prev, delta_stime);

	if (pi->ac_utime) {
		delta_utime = cycle_to_cputime(pi->ac_utime);
		account_user_time(prev, delta_utime);
		account_user_time_scaled(prev, delta_utime);
	}

	pi->ac_stamp = ni->ac_stamp = now;
	ni->ac_stime = ni->ac_utime = 0;
}

/*
 * Account time for a transition between system, hard irq or soft irq state.
 * Note that this function is called with interrupts enabled.
 */
void account_system_vtime(struct task_struct *tsk)
{
	struct thread_info *ti = task_thread_info(tsk);
	unsigned long flags;
	cputime_t delta_stime;
	__u64 now;

	local_irq_save(flags);

	now = ia64_get_itc();

	delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp));
	account_system_time(tsk, 0, delta_stime);
	account_system_time_scaled(tsk, delta_stime);
	ti->ac_stime = 0;

	ti->ac_stamp = now;

	local_irq_restore(flags);
}

/*
 * Called from the timer interrupt handler to charge accumulated user time
 * to the current process.  Must be called with interrupts disabled.
 */
void account_process_tick(struct task_struct *p, int user_tick)
{
	struct thread_info *ti = task_thread_info(p);
	cputime_t delta_utime;

	if (ti->ac_utime) {
		delta_utime = cycle_to_cputime(ti->ac_utime);
		account_user_time(p, delta_utime);
		account_user_time_scaled(p, delta_utime);
		ti->ac_utime = 0;
	}
}

#endif /* CONFIG_VIRT_CPU_ACCOUNTING */

static irqreturn_t
timer_interrupt (int irq, void *dev_id)
{
	unsigned long new_itm;

	if (unlikely(cpu_is_offline(smp_processor_id()))) {
		return IRQ_HANDLED;
	}

	platform_timer_interrupt(irq, dev_id);

	new_itm = local_cpu_data->itm_next;

	if (!time_after(ia64_get_itc(), new_itm))
		printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
		       ia64_get_itc(), new_itm);

	profile_tick(CPU_PROFILING);

	while (1) {
		update_process_times(user_mode(get_irq_regs()));

		new_itm += local_cpu_data->itm_delta;

		if (smp_processor_id() == time_keeper_id) {
			/*
			 * Here we are in the timer irq handler. We have irqs locally
			 * disabled, but we don't know if the timer_bh is running on
			 * another CPU. We need to avoid to SMP race by acquiring the
			 * xtime_lock.
			 */
			write_seqlock(&xtime_lock);
			do_timer(1);
			local_cpu_data->itm_next = new_itm;
			write_sequnlock(&xtime_lock);
		} else
			local_cpu_data->itm_next = new_itm;

		if (time_after(new_itm, ia64_get_itc()))
			break;

		/*
		 * Allow IPIs to interrupt the timer loop.
		 */
		local_irq_enable();
		local_irq_disable();
	}

	do {
		/*
		 * If we're too close to the next clock tick for
		 * comfort, we increase the safety margin by
		 * intentionally dropping the next tick(s).  We do NOT
		 * update itm.next because that would force us to call
		 * do_timer() which in turn would let our clock run
		 * too fast (with the potentially devastating effect
		 * of losing monotony of time).
		 */
		while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
			new_itm += local_cpu_data->itm_delta;
		ia64_set_itm(new_itm);
		/* double check, in case we got hit by a (slow) PMI: */
	} while (time_after_eq(ia64_get_itc(), new_itm));
	return IRQ_HANDLED;
}

/*
 * Encapsulate access to the itm structure for SMP.
 */
void
ia64_cpu_local_tick (void)
{
	int cpu = smp_processor_id();
	unsigned long shift = 0, delta;

	/* arrange for the cycle counter to generate a timer interrupt: */
	ia64_set_itv(IA64_TIMER_VECTOR);

	delta = local_cpu_data->itm_delta;
	/*
	 * Stagger the timer tick for each CPU so they don't occur all at (almost) the
	 * same time:
	 */
	if (cpu) {
		unsigned long hi = 1UL << ia64_fls(cpu);
		shift = (2*(cpu - hi) + 1) * delta/hi/2;
	}
	local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
	ia64_set_itm(local_cpu_data->itm_next);
}

static int nojitter;

static int __init nojitter_setup(char *str)
{
	nojitter = 1;
	printk("Jitter checking for ITC timers disabled\n");
	return 1;
}

__setup("nojitter", nojitter_setup);


void __devinit
ia64_init_itm (void)
{
	unsigned long platform_base_freq, itc_freq;
	struct pal_freq_ratio itc_ratio, proc_ratio;
	long status, platform_base_drift, itc_drift;

	/*
	 * According to SAL v2.6, we need to use a SAL call to determine the platform base
	 * frequency and then a PAL call to determine the frequency ratio between the ITC
	 * and the base frequency.
	 */
	status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
				    &platform_base_freq, &platform_base_drift);
	if (status != 0) {
		printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
	} else {
		status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
		if (status != 0)
			printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
	}
	if (status != 0) {
		/* invent "random" values */
		printk(KERN_ERR
		       "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
		platform_base_freq = 100000000;
		platform_base_drift = -1;	/* no drift info */
		itc_ratio.num = 3;
		itc_ratio.den = 1;
	}
	if (platform_base_freq < 40000000) {
		printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
		       platform_base_freq);
		platform_base_freq = 75000000;
		platform_base_drift = -1;
	}
	if (!proc_ratio.den)
		proc_ratio.den = 1;	/* avoid division by zero */
	if (!itc_ratio.den)
		itc_ratio.den = 1;	/* avoid division by zero */

	itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;

	local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
	printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
	       "ITC freq=%lu.%03luMHz", smp_processor_id(),
	       platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
	       itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);

	if (platform_base_drift != -1) {
		itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
		printk("+/-%ldppm\n", itc_drift);
	} else {
		itc_drift = -1;
		printk("\n");
	}

	local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
	local_cpu_data->itc_freq = itc_freq;
	local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
	local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
					+ itc_freq/2)/itc_freq;

	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
#ifdef CONFIG_SMP
		/* On IA64 in an SMP configuration ITCs are never accurately synchronized.
		 * Jitter compensation requires a cmpxchg which may limit
		 * the scalability of the syscalls for retrieving time.
		 * The ITC synchronization is usually successful to within a few
		 * ITC ticks but this is not a sure thing. If you need to improve
		 * timer performance in SMP situations then boot the kernel with the
		 * "nojitter" option. However, doing so may result in time fluctuating (maybe
		 * even going backward) if the ITC offsets between the individual CPUs
		 * are too large.
		 */
		if (!nojitter)
			itc_jitter_data.itc_jitter = 1;
#endif
	} else
		/*
		 * ITC is drifty and we have not synchronized the ITCs in smpboot.c.
		 * ITC values may fluctuate significantly between processors.
		 * Clock should not be used for hrtimers. Mark itc as only
		 * useful for boot and testing.
		 *
		 * Note that jitter compensation is off! There is no point of
		 * synchronizing ITCs since they may be large differentials
		 * that change over time.
		 *
		 * The only way to fix this would be to repeatedly sync the
		 * ITCs. Until that time we have to avoid ITC.
		 */
		clocksource_itc.rating = 50;

	/* Setup the CPU local timer tick */
	ia64_cpu_local_tick();

	if (!itc_clocksource) {
		/* Sort out mult/shift values: */
		clocksource_itc.mult =
			clocksource_hz2mult(local_cpu_data->itc_freq,
						clocksource_itc.shift);
		clocksource_register(&clocksource_itc);
		itc_clocksource = &clocksource_itc;
	}
}

static cycle_t itc_get_cycles(void)
{
	u64 lcycle, now, ret;

	if (!itc_jitter_data.itc_jitter)
		return get_cycles();

	lcycle = itc_jitter_data.itc_lastcycle;
	now = get_cycles();
	if (lcycle && time_after(lcycle, now))
		return lcycle;

	/*
	 * Keep track of the last timer value returned.
	 * In an SMP environment, you could lose out in contention of
	 * cmpxchg. If so, your cmpxchg returns new value which the
	 * winner of contention updated to. Use the new value instead.
	 */
	ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
	if (unlikely(ret != lcycle))
		return ret;

	return now;
}


static struct irqaction timer_irqaction = {
	.handler =	timer_interrupt,
	.flags =	IRQF_DISABLED | IRQF_IRQPOLL,
	.name =		"timer"
};

void __init
time_init (void)
{
	register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
	efi_gettimeofday(&xtime);
	ia64_init_itm();

	/*
	 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
	 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
	 */
	set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
}

/*
 * Generic udelay assumes that if preemption is allowed and the thread
 * migrates to another CPU, that the ITC values are synchronized across
 * all CPUs.
 */
static void
ia64_itc_udelay (unsigned long usecs)
{
	unsigned long start = ia64_get_itc();
	unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;

	while (time_before(ia64_get_itc(), end))
		cpu_relax();
}

void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;

void
udelay (unsigned long usecs)
{
	(*ia64_udelay)(usecs);
}
EXPORT_SYMBOL(udelay);

/* IA64 doesn't cache the timezone */
void update_vsyscall_tz(void)
{
}

void update_vsyscall(struct timespec *wall, struct clocksource *c)
{
        unsigned long flags;

        write_seqlock_irqsave(&fsyscall_gtod_data.lock, flags);

        /* copy fsyscall clock data */
        fsyscall_gtod_data.clk_mask = c->mask;
        fsyscall_gtod_data.clk_mult = c->mult;
        fsyscall_gtod_data.clk_shift = c->shift;
        fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio;
        fsyscall_gtod_data.clk_cycle_last = c->cycle_last;

	/* copy kernel time structures */
        fsyscall_gtod_data.wall_time.tv_sec = wall->tv_sec;
        fsyscall_gtod_data.wall_time.tv_nsec = wall->tv_nsec;
        fsyscall_gtod_data.monotonic_time.tv_sec = wall_to_monotonic.tv_sec
							+ wall->tv_sec;
        fsyscall_gtod_data.monotonic_time.tv_nsec = wall_to_monotonic.tv_nsec
							+ wall->tv_nsec;

	/* normalize */
	while (fsyscall_gtod_data.monotonic_time.tv_nsec >= NSEC_PER_SEC) {
		fsyscall_gtod_data.monotonic_time.tv_nsec -= NSEC_PER_SEC;
		fsyscall_gtod_data.monotonic_time.tv_sec++;
	}

        write_sequnlock_irqrestore(&fsyscall_gtod_data.lock, flags);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/ia64/kernel/time.c
	3	*
	4	* Copyright (C) 1998-2003 Hewlett-Packard Co
	5	* Stephane Eranian <eranian@hpl.hp.com>
	6	* David Mosberger <davidm@hpl.hp.com>
	7	* Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
	8	* Copyright (C) 1999-2000 VA Linux Systems
	9	* Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
	10	*/
1da177e4 LT	11
	12	#include <linux/cpu.h>
	13	#include <linux/init.h>
	14	#include <linux/kernel.h>
	15	#include <linux/module.h>
	16	#include <linux/profile.h>
	17	#include <linux/sched.h>
	18	#include <linux/time.h>
	19	#include <linux/interrupt.h>
	20	#include <linux/efi.h>
1da177e4	21	#include <linux/timex.h>
0aa366f3	22	#include <linux/clocksource.h>
1da177e4 LT	23
	24	#include <asm/machvec.h>
	25	#include <asm/delay.h>
	26	#include <asm/hw_irq.h>
	27	#include <asm/ptrace.h>
	28	#include <asm/sal.h>
	29	#include <asm/sections.h>
	30	#include <asm/system.h>
	31
0aa366f3 TL	32	#include "fsyscall_gtod_data.h"
	33
	34	static cycle_t itc_get_cycles(void);
	35
	36	struct fsyscall_gtod_data_t fsyscall_gtod_data = {
	37	.lock = SEQLOCK_UNLOCKED,
	38	};
	39
	40	struct itc_jitter_data_t itc_jitter_data;
	41
ff741906	42	volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
1da177e4 LT	43
	44	#ifdef CONFIG_IA64_DEBUG_IRQ
	45
	46	unsigned long last_cli_ip;
	47	EXPORT_SYMBOL(last_cli_ip);
	48
	49	#endif
	50
0aa366f3	51	static struct clocksource clocksource_itc = {
3eb05676 LZ	52	.name = "itc",
	53	.rating = 350,
	54	.read = itc_get_cycles,
	55	.mask = CLOCKSOURCE_MASK(64),
	56	.mult = 0, /to be calculated/
	57	.shift = 16,
	58	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
1da177e4	59	};
0aa366f3	60	static struct clocksource *itc_clocksource;
1da177e4	61
b64f34cd HS	62	#ifdef CONFIG_VIRT_CPU_ACCOUNTING
	63
	64	#include <linux/kernel_stat.h>
	65
	66	extern cputime_t cycle_to_cputime(u64 cyc);
	67
	68	/*
	69	* Called from the context switch with interrupts disabled, to charge all
	70	* accumulated times to the current process, and to prepare accounting on
	71	* the next process.
	72	*/
	73	void ia64_account_on_switch(struct task_struct prev, struct task_struct next)
	74	{
	75	struct thread_info *pi = task_thread_info(prev);
	76	struct thread_info *ni = task_thread_info(next);
	77	cputime_t delta_stime, delta_utime;
	78	__u64 now;
	79
	80	now = ia64_get_itc();
	81
	82	delta_stime = cycle_to_cputime(pi->ac_stime + (now - pi->ac_stamp));
	83	account_system_time(prev, 0, delta_stime);
	84	account_system_time_scaled(prev, delta_stime);
	85
	86	if (pi->ac_utime) {
	87	delta_utime = cycle_to_cputime(pi->ac_utime);
	88	account_user_time(prev, delta_utime);
	89	account_user_time_scaled(prev, delta_utime);
	90	}
	91
	92	pi->ac_stamp = ni->ac_stamp = now;
	93	ni->ac_stime = ni->ac_utime = 0;
	94	}
	95
	96	/*
	97	* Account time for a transition between system, hard irq or soft irq state.
	98	* Note that this function is called with interrupts enabled.
	99	*/
	100	void account_system_vtime(struct task_struct *tsk)
	101	{
	102	struct thread_info *ti = task_thread_info(tsk);
	103	unsigned long flags;
	104	cputime_t delta_stime;
	105	__u64 now;
	106
	107	local_irq_save(flags);
	108
	109	now = ia64_get_itc();
	110
	111	delta_stime = cycle_to_cputime(ti->ac_stime + (now - ti->ac_stamp));
	112	account_system_time(tsk, 0, delta_stime);
	113	account_system_time_scaled(tsk, delta_stime);
	114	ti->ac_stime = 0;
	115
	116	ti->ac_stamp = now;
	117
	118	local_irq_restore(flags);
	119	}
	120
	121	/*
	122	* Called from the timer interrupt handler to charge accumulated user time
	123	* to the current process. Must be called with interrupts disabled.
	124	*/
	125	void account_process_tick(struct task_struct *p, int user_tick)
126	{
127	struct thread_info *ti = task_thread_info(p);
128	cputime_t delta_utime;
129
130	if (ti->ac_utime) {
131	delta_utime = cycle_to_cputime(ti->ac_utime);
132	account_user_time(p, delta_utime);
133	account_user_time_scaled(p, delta_utime);
134	ti->ac_utime = 0;
135	}
136	}
137
138	#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
139
1da177e4	140	static irqreturn_t
7d12e780	141	timer_interrupt (int irq, void *dev_id)
1da177e4 LT	142	{
	143	unsigned long new_itm;
	144
	145	if (unlikely(cpu_is_offline(smp_processor_id()))) {
	146	return IRQ_HANDLED;
	147	}
	148
7d12e780	149	platform_timer_interrupt(irq, dev_id);
1da177e4 LT	150
	151	new_itm = local_cpu_data->itm_next;
	152
	153	if (!time_after(ia64_get_itc(), new_itm))
	154	printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
	155	ia64_get_itc(), new_itm);
	156
7d12e780	157	profile_tick(CPU_PROFILING);
1da177e4 LT	158
1da177e4 LT	159	while (1) {
7d12e780	160	update_process_times(user_mode(get_irq_regs()));
1da177e4 LT	161
	162	new_itm += local_cpu_data->itm_delta;
	163
ff741906	164	if (smp_processor_id() == time_keeper_id) {
1da177e4 LT	165	/*
	166	* Here we are in the timer irq handler. We have irqs locally
	167	* disabled, but we don't know if the timer_bh is running on
	168	* another CPU. We need to avoid to SMP race by acquiring the
	169	* xtime_lock.
	170	*/
	171	write_seqlock(&xtime_lock);
3171a030	172	do_timer(1);
1da177e4 LT	173	local_cpu_data->itm_next = new_itm;
	174	write_sequnlock(&xtime_lock);
	175	} else
	176	local_cpu_data->itm_next = new_itm;
	177
	178	if (time_after(new_itm, ia64_get_itc()))
	179	break;
accaddb2 JS	180
	181	/*
	182	* Allow IPIs to interrupt the timer loop.
	183	*/
	184	local_irq_enable();
	185	local_irq_disable();
1da177e4 LT	186	}
	187
	188	do {
	189	/*
	190	* If we're too close to the next clock tick for
	191	* comfort, we increase the safety margin by
	192	* intentionally dropping the next tick(s). We do NOT
	193	* update itm.next because that would force us to call
	194	* do_timer() which in turn would let our clock run
	195	* too fast (with the potentially devastating effect
	196	* of losing monotony of time).
	197	*/
	198	while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
	199	new_itm += local_cpu_data->itm_delta;
	200	ia64_set_itm(new_itm);
	201	/* double check, in case we got hit by a (slow) PMI: */
	202	} while (time_after_eq(ia64_get_itc(), new_itm));
	203	return IRQ_HANDLED;
	204	}
	205
	206	/*
	207	* Encapsulate access to the itm structure for SMP.
	208	*/
	209	void
	210	ia64_cpu_local_tick (void)
	211	{
	212	int cpu = smp_processor_id();
	213	unsigned long shift = 0, delta;
	214
	215	/* arrange for the cycle counter to generate a timer interrupt: */
	216	ia64_set_itv(IA64_TIMER_VECTOR);
	217
	218	delta = local_cpu_data->itm_delta;
	219	/*
	220	* Stagger the timer tick for each CPU so they don't occur all at (almost) the
	221	* same time:
	222	*/
	223	if (cpu) {
	224	unsigned long hi = 1UL << ia64_fls(cpu);
	225	shift = (2(cpu - hi) + 1) delta/hi/2;
	226	}
	227	local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
	228	ia64_set_itm(local_cpu_data->itm_next);
	229	}
	230
	231	static int nojitter;
	232
	233	static int __init nojitter_setup(char *str)
	234	{
	235	nojitter = 1;
	236	printk("Jitter checking for ITC timers disabled\n");
	237	return 1;
	238	}
	239
	240	__setup("nojitter", nojitter_setup);
	241
	242
	243	void __devinit
	244	ia64_init_itm (void)
	245	{
	246	unsigned long platform_base_freq, itc_freq;
	247	struct pal_freq_ratio itc_ratio, proc_ratio;
	248	long status, platform_base_drift, itc_drift;
	249
250	/*
251	* According to SAL v2.6, we need to use a SAL call to determine the platform base
252	* frequency and then a PAL call to determine the frequency ratio between the ITC
253	* and the base frequency.
254	*/
255	status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
256	&platform_base_freq, &platform_base_drift);
257	if (status != 0) {
258	printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
259	} else {
260	status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
261	if (status != 0)
262	printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
263	}
264	if (status != 0) {
265	/* invent "random" values */
266	printk(KERN_ERR
267	"SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
268	platform_base_freq = 100000000;
269	platform_base_drift = -1; /* no drift info */
270	itc_ratio.num = 3;
271	itc_ratio.den = 1;
272	}
273	if (platform_base_freq < 40000000) {
274	printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
275	platform_base_freq);
276	platform_base_freq = 75000000;
277	platform_base_drift = -1;
278	}
279	if (!proc_ratio.den)
280	proc_ratio.den = 1; /* avoid division by zero */
281	if (!itc_ratio.den)
282	itc_ratio.den = 1; /* avoid division by zero */
283
284	itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
285
286	local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
2ab9391d	287	printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
1da177e4 LT	288	"ITC freq=%lu.%03luMHz", smp_processor_id(),
	289	platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
	290	itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
	291
	292	if (platform_base_drift != -1) {
	293	itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
	294	printk("+/-%ldppm\n", itc_drift);
	295	} else {
	296	itc_drift = -1;
	297	printk("\n");
	298	}
	299
	300	local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
	301	local_cpu_data->itc_freq = itc_freq;
	302	local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
	303	local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
	304	+ itc_freq/2)/itc_freq;
	305
	306	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
1da177e4 LT	307	#ifdef CONFIG_SMP
	308	/* On IA64 in an SMP configuration ITCs are never accurately synchronized.
	309	* Jitter compensation requires a cmpxchg which may limit
	310	* the scalability of the syscalls for retrieving time.
	311	* The ITC synchronization is usually successful to within a few
	312	* ITC ticks but this is not a sure thing. If you need to improve
	313	* timer performance in SMP situations then boot the kernel with the
	314	* "nojitter" option. However, doing so may result in time fluctuating (maybe
	315	* even going backward) if the ITC offsets between the individual CPUs
	316	* are too large.
	317	*/
0aa366f3 TL	318	if (!nojitter)
0aa366f3 TL	319	itc_jitter_data.itc_jitter = 1;
1da177e4	320	#endif
b718f91c CL	321	} else
	322	/*
	323	* ITC is drifty and we have not synchronized the ITCs in smpboot.c.
	324	* ITC values may fluctuate significantly between processors.
	325	* Clock should not be used for hrtimers. Mark itc as only
	326	* useful for boot and testing.
	327	*
	328	* Note that jitter compensation is off! There is no point of
	329	* synchronizing ITCs since they may be large differentials
	330	* that change over time.
	331	*
	332	* The only way to fix this would be to repeatedly sync the
	333	* ITCs. Until that time we have to avoid ITC.
	334	*/
	335	clocksource_itc.rating = 50;
1da177e4 LT	336
	337	/* Setup the CPU local timer tick */
	338	ia64_cpu_local_tick();
0aa366f3 TL	339
	340	if (!itc_clocksource) {
	341	/* Sort out mult/shift values: */
	342	clocksource_itc.mult =
	343	clocksource_hz2mult(local_cpu_data->itc_freq,
	344	clocksource_itc.shift);
	345	clocksource_register(&clocksource_itc);
	346	itc_clocksource = &clocksource_itc;
	347	}
1da177e4 LT	348	}
1da177e4 LT	349
8dc94630	350	static cycle_t itc_get_cycles(void)
0aa366f3 TL	351	{
	352	u64 lcycle, now, ret;
	353
	354	if (!itc_jitter_data.itc_jitter)
	355	return get_cycles();
	356
	357	lcycle = itc_jitter_data.itc_lastcycle;
	358	now = get_cycles();
	359	if (lcycle && time_after(lcycle, now))
	360	return lcycle;
	361
	362	/*
	363	* Keep track of the last timer value returned.
	364	* In an SMP environment, you could lose out in contention of
	365	* cmpxchg. If so, your cmpxchg returns new value which the
	366	* winner of contention updated to. Use the new value instead.
	367	*/
	368	ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
	369	if (unlikely(ret != lcycle))
	370	return ret;
	371
	372	return now;
	373	}
	374
	375
1da177e4 LT	376	static struct irqaction timer_irqaction = {
1da177e4 LT	377	.handler = timer_interrupt,
d217c265	378	.flags = IRQF_DISABLED \| IRQF_IRQPOLL,
1da177e4 LT	379	.name = "timer"
	380	};
	381
	382	void __init
	383	time_init (void)
	384	{
	385	register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
	386	efi_gettimeofday(&xtime);
	387	ia64_init_itm();
	388
	389	/*
	390	* Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
	391	* tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
	392	*/
	393	set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
	394	}
f5899b5d	395
defbb2c9	396	/*
	397	* Generic udelay assumes that if preemption is allowed and the thread
	398	* migrates to another CPU, that the ITC values are synchronized across
	399	* all CPUs.
	400	*/
	401	static void
	402	ia64_itc_udelay (unsigned long usecs)
f5899b5d	403	{
defbb2c9	404	unsigned long start = ia64_get_itc();
defbb2c9	405	unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
f5899b5d	406
defbb2c9	407	while (time_before(ia64_get_itc(), end))
	408	cpu_relax();
	409	}
f5899b5d	410
defbb2c9	411	void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
f5899b5d	412
defbb2c9	413	void
	414	udelay (unsigned long usecs)
	415	{
	416	(*ia64_udelay)(usecs);
f5899b5d JH	417	}
f5899b5d JH	418	EXPORT_SYMBOL(udelay);
d6e56a2a	419
2c622148 TB	420	/* IA64 doesn't cache the timezone */
	421	void update_vsyscall_tz(void)
	422	{
	423	}
	424
0aa366f3 TL	425	void update_vsyscall(struct timespec wall, struct clocksource c)
	426	{
	427	unsigned long flags;
	428
	429	write_seqlock_irqsave(&fsyscall_gtod_data.lock, flags);
	430
	431	/* copy fsyscall clock data */
	432	fsyscall_gtod_data.clk_mask = c->mask;
	433	fsyscall_gtod_data.clk_mult = c->mult;
	434	fsyscall_gtod_data.clk_shift = c->shift;
	435	fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio;
	436	fsyscall_gtod_data.clk_cycle_last = c->cycle_last;
	437
	438	/* copy kernel time structures */
	439	fsyscall_gtod_data.wall_time.tv_sec = wall->tv_sec;
	440	fsyscall_gtod_data.wall_time.tv_nsec = wall->tv_nsec;
	441	fsyscall_gtod_data.monotonic_time.tv_sec = wall_to_monotonic.tv_sec
	442	+ wall->tv_sec;
	443	fsyscall_gtod_data.monotonic_time.tv_nsec = wall_to_monotonic.tv_nsec
	444	+ wall->tv_nsec;
	445
	446	/* normalize */
	447	while (fsyscall_gtod_data.monotonic_time.tv_nsec >= NSEC_PER_SEC) {
	448	fsyscall_gtod_data.monotonic_time.tv_nsec -= NSEC_PER_SEC;
	449	fsyscall_gtod_data.monotonic_time.tv_sec++;
	450	}
	451
	452	write_sequnlock_irqrestore(&fsyscall_gtod_data.lock, flags);
	453	}
	454