[IA64] s/scalibility/scalability/
[deliverable/linux.git] / arch / ia64 / kernel / time.c
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1/*
2 * linux/arch/ia64/kernel/time.c
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * Stephane Eranian <eranian@hpl.hp.com>
6 * David Mosberger <davidm@hpl.hp.com>
7 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
8 * Copyright (C) 1999-2000 VA Linux Systems
9 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
10 */
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11
12#include <linux/cpu.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/profile.h>
17#include <linux/sched.h>
18#include <linux/time.h>
19#include <linux/interrupt.h>
20#include <linux/efi.h>
21#include <linux/profile.h>
22#include <linux/timex.h>
23
24#include <asm/machvec.h>
25#include <asm/delay.h>
26#include <asm/hw_irq.h>
27#include <asm/ptrace.h>
28#include <asm/sal.h>
29#include <asm/sections.h>
30#include <asm/system.h>
31
ff741906 32volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
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33
34#ifdef CONFIG_IA64_DEBUG_IRQ
35
36unsigned long last_cli_ip;
37EXPORT_SYMBOL(last_cli_ip);
38
39#endif
40
41static struct time_interpolator itc_interpolator = {
42 .shift = 16,
43 .mask = 0xffffffffffffffffLL,
44 .source = TIME_SOURCE_CPU
45};
46
47static irqreturn_t
7d12e780 48timer_interrupt (int irq, void *dev_id)
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49{
50 unsigned long new_itm;
51
52 if (unlikely(cpu_is_offline(smp_processor_id()))) {
53 return IRQ_HANDLED;
54 }
55
7d12e780 56 platform_timer_interrupt(irq, dev_id);
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57
58 new_itm = local_cpu_data->itm_next;
59
60 if (!time_after(ia64_get_itc(), new_itm))
61 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
62 ia64_get_itc(), new_itm);
63
7d12e780 64 profile_tick(CPU_PROFILING);
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65
66 while (1) {
7d12e780 67 update_process_times(user_mode(get_irq_regs()));
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68
69 new_itm += local_cpu_data->itm_delta;
70
ff741906 71 if (smp_processor_id() == time_keeper_id) {
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72 /*
73 * Here we are in the timer irq handler. We have irqs locally
74 * disabled, but we don't know if the timer_bh is running on
75 * another CPU. We need to avoid to SMP race by acquiring the
76 * xtime_lock.
77 */
78 write_seqlock(&xtime_lock);
3171a030 79 do_timer(1);
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80 local_cpu_data->itm_next = new_itm;
81 write_sequnlock(&xtime_lock);
82 } else
83 local_cpu_data->itm_next = new_itm;
84
85 if (time_after(new_itm, ia64_get_itc()))
86 break;
accaddb2
JS
87
88 /*
89 * Allow IPIs to interrupt the timer loop.
90 */
91 local_irq_enable();
92 local_irq_disable();
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93 }
94
95 do {
96 /*
97 * If we're too close to the next clock tick for
98 * comfort, we increase the safety margin by
99 * intentionally dropping the next tick(s). We do NOT
100 * update itm.next because that would force us to call
101 * do_timer() which in turn would let our clock run
102 * too fast (with the potentially devastating effect
103 * of losing monotony of time).
104 */
105 while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
106 new_itm += local_cpu_data->itm_delta;
107 ia64_set_itm(new_itm);
108 /* double check, in case we got hit by a (slow) PMI: */
109 } while (time_after_eq(ia64_get_itc(), new_itm));
110 return IRQ_HANDLED;
111}
112
113/*
114 * Encapsulate access to the itm structure for SMP.
115 */
116void
117ia64_cpu_local_tick (void)
118{
119 int cpu = smp_processor_id();
120 unsigned long shift = 0, delta;
121
122 /* arrange for the cycle counter to generate a timer interrupt: */
123 ia64_set_itv(IA64_TIMER_VECTOR);
124
125 delta = local_cpu_data->itm_delta;
126 /*
127 * Stagger the timer tick for each CPU so they don't occur all at (almost) the
128 * same time:
129 */
130 if (cpu) {
131 unsigned long hi = 1UL << ia64_fls(cpu);
132 shift = (2*(cpu - hi) + 1) * delta/hi/2;
133 }
134 local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
135 ia64_set_itm(local_cpu_data->itm_next);
136}
137
138static int nojitter;
139
140static int __init nojitter_setup(char *str)
141{
142 nojitter = 1;
143 printk("Jitter checking for ITC timers disabled\n");
144 return 1;
145}
146
147__setup("nojitter", nojitter_setup);
148
149
150void __devinit
151ia64_init_itm (void)
152{
153 unsigned long platform_base_freq, itc_freq;
154 struct pal_freq_ratio itc_ratio, proc_ratio;
155 long status, platform_base_drift, itc_drift;
156
157 /*
158 * According to SAL v2.6, we need to use a SAL call to determine the platform base
159 * frequency and then a PAL call to determine the frequency ratio between the ITC
160 * and the base frequency.
161 */
162 status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
163 &platform_base_freq, &platform_base_drift);
164 if (status != 0) {
165 printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
166 } else {
167 status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
168 if (status != 0)
169 printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
170 }
171 if (status != 0) {
172 /* invent "random" values */
173 printk(KERN_ERR
174 "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
175 platform_base_freq = 100000000;
176 platform_base_drift = -1; /* no drift info */
177 itc_ratio.num = 3;
178 itc_ratio.den = 1;
179 }
180 if (platform_base_freq < 40000000) {
181 printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
182 platform_base_freq);
183 platform_base_freq = 75000000;
184 platform_base_drift = -1;
185 }
186 if (!proc_ratio.den)
187 proc_ratio.den = 1; /* avoid division by zero */
188 if (!itc_ratio.den)
189 itc_ratio.den = 1; /* avoid division by zero */
190
191 itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
192
193 local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
2ab9391d 194 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
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195 "ITC freq=%lu.%03luMHz", smp_processor_id(),
196 platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
197 itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
198
199 if (platform_base_drift != -1) {
200 itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
201 printk("+/-%ldppm\n", itc_drift);
202 } else {
203 itc_drift = -1;
204 printk("\n");
205 }
206
207 local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
208 local_cpu_data->itc_freq = itc_freq;
209 local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
210 local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
211 + itc_freq/2)/itc_freq;
212
213 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
214 itc_interpolator.frequency = local_cpu_data->itc_freq;
215 itc_interpolator.drift = itc_drift;
216#ifdef CONFIG_SMP
217 /* On IA64 in an SMP configuration ITCs are never accurately synchronized.
218 * Jitter compensation requires a cmpxchg which may limit
c47953cf 219 * the scalability of the syscalls for retrieving time.
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220 * The ITC synchronization is usually successful to within a few
221 * ITC ticks but this is not a sure thing. If you need to improve
222 * timer performance in SMP situations then boot the kernel with the
223 * "nojitter" option. However, doing so may result in time fluctuating (maybe
224 * even going backward) if the ITC offsets between the individual CPUs
225 * are too large.
226 */
227 if (!nojitter) itc_interpolator.jitter = 1;
228#endif
229 register_time_interpolator(&itc_interpolator);
230 }
231
232 /* Setup the CPU local timer tick */
233 ia64_cpu_local_tick();
234}
235
236static struct irqaction timer_irqaction = {
237 .handler = timer_interrupt,
d217c265 238 .flags = IRQF_DISABLED | IRQF_IRQPOLL,
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239 .name = "timer"
240};
241
ff741906
AR
242void __devinit ia64_disable_timer(void)
243{
244 ia64_set_itv(1 << 16);
245}
246
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247void __init
248time_init (void)
249{
250 register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
251 efi_gettimeofday(&xtime);
252 ia64_init_itm();
253
254 /*
255 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
256 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
257 */
258 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
259}
f5899b5d 260
defbb2c9 261/*
262 * Generic udelay assumes that if preemption is allowed and the thread
263 * migrates to another CPU, that the ITC values are synchronized across
264 * all CPUs.
265 */
266static void
267ia64_itc_udelay (unsigned long usecs)
f5899b5d 268{
defbb2c9 269 unsigned long start = ia64_get_itc();
270 unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
f5899b5d 271
defbb2c9 272 while (time_before(ia64_get_itc(), end))
273 cpu_relax();
274}
f5899b5d 275
defbb2c9 276void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
f5899b5d 277
defbb2c9 278void
279udelay (unsigned long usecs)
280{
281 (*ia64_udelay)(usecs);
f5899b5d
JH
282}
283EXPORT_SYMBOL(udelay);
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284
285static unsigned long long ia64_itc_printk_clock(void)
286{
287 if (ia64_get_kr(IA64_KR_PER_CPU_DATA))
288 return sched_clock();
289 return 0;
290}
291
292static unsigned long long ia64_default_printk_clock(void)
293{
294 return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) *
295 (1000000000/HZ);
296}
297
298unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock;
299
300unsigned long long printk_clock(void)
301{
302 return ia64_printk_clock();
303}
304
305void __init
306ia64_setup_printk_clock(void)
307{
308 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT))
309 ia64_printk_clock = ia64_itc_printk_clock;
310}
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