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1da177e4 LT |
1 | /* |
2 | * Architecture-specific trap handling. | |
3 | * | |
4 | * Copyright (C) 1998-2003 Hewlett-Packard Co | |
5 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
6 | * | |
7 | * 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE | |
8 | */ | |
9 | ||
1da177e4 LT |
10 | #include <linux/kernel.h> |
11 | #include <linux/init.h> | |
12 | #include <linux/sched.h> | |
13 | #include <linux/tty.h> | |
14 | #include <linux/vt_kern.h> /* For unblank_screen() */ | |
15 | #include <linux/module.h> /* for EXPORT_SYMBOL */ | |
16 | #include <linux/hardirq.h> | |
1f7ad57b | 17 | #include <linux/kprobes.h> |
b05de01a | 18 | #include <linux/delay.h> /* for ssleep() */ |
1da177e4 LT |
19 | |
20 | #include <asm/fpswa.h> | |
21 | #include <asm/ia32.h> | |
22 | #include <asm/intrinsics.h> | |
23 | #include <asm/processor.h> | |
24 | #include <asm/uaccess.h> | |
7213b252 | 25 | #include <asm/kdebug.h> |
1da177e4 LT |
26 | |
27 | extern spinlock_t timerlist_lock; | |
28 | ||
29 | fpswa_interface_t *fpswa_interface; | |
30 | EXPORT_SYMBOL(fpswa_interface); | |
31 | ||
e041c683 | 32 | ATOMIC_NOTIFIER_HEAD(ia64die_chain); |
7213b252 | 33 | |
9138d581 KO |
34 | int |
35 | register_die_notifier(struct notifier_block *nb) | |
7213b252 | 36 | { |
e041c683 | 37 | return atomic_notifier_chain_register(&ia64die_chain, nb); |
7213b252 | 38 | } |
9138d581 KO |
39 | EXPORT_SYMBOL_GPL(register_die_notifier); |
40 | ||
41 | int | |
42 | unregister_die_notifier(struct notifier_block *nb) | |
43 | { | |
e041c683 | 44 | return atomic_notifier_chain_unregister(&ia64die_chain, nb); |
9138d581 KO |
45 | } |
46 | EXPORT_SYMBOL_GPL(unregister_die_notifier); | |
7213b252 | 47 | |
1da177e4 LT |
48 | void __init |
49 | trap_init (void) | |
50 | { | |
51 | if (ia64_boot_param->fpswa) | |
52 | /* FPSWA fixup: make the interface pointer a kernel virtual address: */ | |
53 | fpswa_interface = __va(ia64_boot_param->fpswa); | |
54 | } | |
55 | ||
56 | /* | |
57 | * Unlock any spinlocks which will prevent us from getting the message out (timerlist_lock | |
58 | * is acquired through the console unblank code) | |
59 | */ | |
60 | void | |
61 | bust_spinlocks (int yes) | |
62 | { | |
63 | int loglevel_save = console_loglevel; | |
64 | ||
65 | if (yes) { | |
66 | oops_in_progress = 1; | |
67 | return; | |
68 | } | |
69 | ||
70 | #ifdef CONFIG_VT | |
71 | unblank_screen(); | |
72 | #endif | |
73 | oops_in_progress = 0; | |
74 | /* | |
75 | * OK, the message is on the console. Now we call printk() without | |
76 | * oops_in_progress set so that printk will give klogd a poke. Hold onto | |
77 | * your hats... | |
78 | */ | |
79 | console_loglevel = 15; /* NMI oopser may have shut the console up */ | |
80 | printk(" "); | |
81 | console_loglevel = loglevel_save; | |
82 | } | |
83 | ||
84 | void | |
85 | die (const char *str, struct pt_regs *regs, long err) | |
86 | { | |
87 | static struct { | |
88 | spinlock_t lock; | |
89 | u32 lock_owner; | |
90 | int lock_owner_depth; | |
91 | } die = { | |
92 | .lock = SPIN_LOCK_UNLOCKED, | |
93 | .lock_owner = -1, | |
94 | .lock_owner_depth = 0 | |
95 | }; | |
96 | static int die_counter; | |
af25e94d | 97 | int cpu = get_cpu(); |
1da177e4 | 98 | |
af25e94d | 99 | if (die.lock_owner != cpu) { |
1da177e4 LT |
100 | console_verbose(); |
101 | spin_lock_irq(&die.lock); | |
af25e94d | 102 | die.lock_owner = cpu; |
1da177e4 LT |
103 | die.lock_owner_depth = 0; |
104 | bust_spinlocks(1); | |
105 | } | |
af25e94d | 106 | put_cpu(); |
1da177e4 LT |
107 | |
108 | if (++die.lock_owner_depth < 3) { | |
109 | printk("%s[%d]: %s %ld [%d]\n", | |
110 | current->comm, current->pid, str, err, ++die_counter); | |
9138d581 | 111 | (void) notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV); |
1da177e4 LT |
112 | show_regs(regs); |
113 | } else | |
114 | printk(KERN_ERR "Recursive die() failure, output suppressed\n"); | |
115 | ||
116 | bust_spinlocks(0); | |
117 | die.lock_owner = -1; | |
118 | spin_unlock_irq(&die.lock); | |
b05de01a H |
119 | |
120 | if (panic_on_oops) { | |
121 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | |
122 | ssleep(5); | |
123 | panic("Fatal exception"); | |
124 | } | |
125 | ||
1da177e4 LT |
126 | do_exit(SIGSEGV); |
127 | } | |
128 | ||
129 | void | |
130 | die_if_kernel (char *str, struct pt_regs *regs, long err) | |
131 | { | |
132 | if (!user_mode(regs)) | |
133 | die(str, regs, err); | |
134 | } | |
135 | ||
136 | void | |
1f7ad57b | 137 | __kprobes ia64_bad_break (unsigned long break_num, struct pt_regs *regs) |
1da177e4 LT |
138 | { |
139 | siginfo_t siginfo; | |
140 | int sig, code; | |
141 | ||
142 | /* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */ | |
143 | siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); | |
144 | siginfo.si_imm = break_num; | |
145 | siginfo.si_flags = 0; /* clear __ISR_VALID */ | |
146 | siginfo.si_isr = 0; | |
147 | ||
148 | switch (break_num) { | |
149 | case 0: /* unknown error (used by GCC for __builtin_abort()) */ | |
7213b252 | 150 | if (notify_die(DIE_BREAK, "break 0", regs, break_num, TRAP_BRKPT, SIGTRAP) |
9138d581 | 151 | == NOTIFY_STOP) |
7213b252 | 152 | return; |
1da177e4 LT |
153 | die_if_kernel("bugcheck!", regs, break_num); |
154 | sig = SIGILL; code = ILL_ILLOPC; | |
155 | break; | |
156 | ||
157 | case 1: /* integer divide by zero */ | |
158 | sig = SIGFPE; code = FPE_INTDIV; | |
159 | break; | |
160 | ||
161 | case 2: /* integer overflow */ | |
162 | sig = SIGFPE; code = FPE_INTOVF; | |
163 | break; | |
164 | ||
165 | case 3: /* range check/bounds check */ | |
166 | sig = SIGFPE; code = FPE_FLTSUB; | |
167 | break; | |
168 | ||
169 | case 4: /* null pointer dereference */ | |
170 | sig = SIGSEGV; code = SEGV_MAPERR; | |
171 | break; | |
172 | ||
173 | case 5: /* misaligned data */ | |
174 | sig = SIGSEGV; code = BUS_ADRALN; | |
175 | break; | |
176 | ||
177 | case 6: /* decimal overflow */ | |
178 | sig = SIGFPE; code = __FPE_DECOVF; | |
179 | break; | |
180 | ||
181 | case 7: /* decimal divide by zero */ | |
182 | sig = SIGFPE; code = __FPE_DECDIV; | |
183 | break; | |
184 | ||
185 | case 8: /* packed decimal error */ | |
186 | sig = SIGFPE; code = __FPE_DECERR; | |
187 | break; | |
188 | ||
189 | case 9: /* invalid ASCII digit */ | |
190 | sig = SIGFPE; code = __FPE_INVASC; | |
191 | break; | |
192 | ||
193 | case 10: /* invalid decimal digit */ | |
194 | sig = SIGFPE; code = __FPE_INVDEC; | |
195 | break; | |
196 | ||
197 | case 11: /* paragraph stack overflow */ | |
198 | sig = SIGSEGV; code = __SEGV_PSTKOVF; | |
199 | break; | |
200 | ||
201 | case 0x3f000 ... 0x3ffff: /* bundle-update in progress */ | |
202 | sig = SIGILL; code = __ILL_BNDMOD; | |
203 | break; | |
204 | ||
205 | default: | |
206 | if (break_num < 0x40000 || break_num > 0x100000) | |
207 | die_if_kernel("Bad break", regs, break_num); | |
208 | ||
209 | if (break_num < 0x80000) { | |
210 | sig = SIGILL; code = __ILL_BREAK; | |
211 | } else { | |
9138d581 KO |
212 | if (notify_die(DIE_BREAK, "bad break", regs, break_num, TRAP_BRKPT, SIGTRAP) |
213 | == NOTIFY_STOP) | |
214 | return; | |
1da177e4 LT |
215 | sig = SIGTRAP; code = TRAP_BRKPT; |
216 | } | |
217 | } | |
218 | siginfo.si_signo = sig; | |
219 | siginfo.si_errno = 0; | |
220 | siginfo.si_code = code; | |
221 | force_sig_info(sig, &siginfo, current); | |
222 | } | |
223 | ||
224 | /* | |
225 | * disabled_fph_fault() is called when a user-level process attempts to access f32..f127 | |
226 | * and it doesn't own the fp-high register partition. When this happens, we save the | |
227 | * current fph partition in the task_struct of the fpu-owner (if necessary) and then load | |
228 | * the fp-high partition of the current task (if necessary). Note that the kernel has | |
229 | * access to fph by the time we get here, as the IVT's "Disabled FP-Register" handler takes | |
230 | * care of clearing psr.dfh. | |
231 | */ | |
232 | static inline void | |
233 | disabled_fph_fault (struct pt_regs *regs) | |
234 | { | |
235 | struct ia64_psr *psr = ia64_psr(regs); | |
236 | ||
237 | /* first, grant user-level access to fph partition: */ | |
238 | psr->dfh = 0; | |
05062d96 PC |
239 | |
240 | /* | |
241 | * Make sure that no other task gets in on this processor | |
242 | * while we're claiming the FPU | |
243 | */ | |
244 | preempt_disable(); | |
1da177e4 LT |
245 | #ifndef CONFIG_SMP |
246 | { | |
247 | struct task_struct *fpu_owner | |
248 | = (struct task_struct *)ia64_get_kr(IA64_KR_FPU_OWNER); | |
249 | ||
05062d96 PC |
250 | if (ia64_is_local_fpu_owner(current)) { |
251 | preempt_enable_no_resched(); | |
1da177e4 | 252 | return; |
05062d96 | 253 | } |
1da177e4 LT |
254 | |
255 | if (fpu_owner) | |
256 | ia64_flush_fph(fpu_owner); | |
257 | } | |
258 | #endif /* !CONFIG_SMP */ | |
259 | ia64_set_local_fpu_owner(current); | |
260 | if ((current->thread.flags & IA64_THREAD_FPH_VALID) != 0) { | |
261 | __ia64_load_fpu(current->thread.fph); | |
262 | psr->mfh = 0; | |
263 | } else { | |
264 | __ia64_init_fpu(); | |
265 | /* | |
266 | * Set mfh because the state in thread.fph does not match the state in | |
267 | * the fph partition. | |
268 | */ | |
269 | psr->mfh = 1; | |
270 | } | |
05062d96 | 271 | preempt_enable_no_resched(); |
1da177e4 LT |
272 | } |
273 | ||
274 | static inline int | |
275 | fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs, | |
276 | struct pt_regs *regs) | |
277 | { | |
278 | fp_state_t fp_state; | |
279 | fpswa_ret_t ret; | |
280 | ||
281 | if (!fpswa_interface) | |
282 | return -1; | |
283 | ||
284 | memset(&fp_state, 0, sizeof(fp_state_t)); | |
285 | ||
286 | /* | |
287 | * compute fp_state. only FP registers f6 - f11 are used by the | |
288 | * kernel, so set those bits in the mask and set the low volatile | |
289 | * pointer to point to these registers. | |
290 | */ | |
291 | fp_state.bitmask_low64 = 0xfc0; /* bit6..bit11 */ | |
292 | ||
293 | fp_state.fp_state_low_volatile = (fp_state_low_volatile_t *) ®s->f6; | |
294 | /* | |
295 | * unsigned long (*EFI_FPSWA) ( | |
296 | * unsigned long trap_type, | |
297 | * void *Bundle, | |
298 | * unsigned long *pipsr, | |
299 | * unsigned long *pfsr, | |
300 | * unsigned long *pisr, | |
301 | * unsigned long *ppreds, | |
302 | * unsigned long *pifs, | |
303 | * void *fp_state); | |
304 | */ | |
305 | ret = (*fpswa_interface->fpswa)((unsigned long) fp_fault, bundle, | |
306 | (unsigned long *) ipsr, (unsigned long *) fpsr, | |
307 | (unsigned long *) isr, (unsigned long *) pr, | |
308 | (unsigned long *) ifs, &fp_state); | |
309 | ||
310 | return ret.status; | |
311 | } | |
312 | ||
313 | /* | |
314 | * Handle floating-point assist faults and traps. | |
315 | */ | |
316 | static int | |
317 | handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr) | |
318 | { | |
319 | long exception, bundle[2]; | |
320 | unsigned long fault_ip; | |
321 | struct siginfo siginfo; | |
322 | static int fpu_swa_count = 0; | |
323 | static unsigned long last_time; | |
324 | ||
325 | fault_ip = regs->cr_iip; | |
326 | if (!fp_fault && (ia64_psr(regs)->ri == 0)) | |
327 | fault_ip -= 16; | |
328 | if (copy_from_user(bundle, (void __user *) fault_ip, sizeof(bundle))) | |
329 | return -1; | |
330 | ||
331 | if (jiffies - last_time > 5*HZ) | |
332 | fpu_swa_count = 0; | |
333 | if ((fpu_swa_count < 4) && !(current->thread.flags & IA64_THREAD_FPEMU_NOPRINT)) { | |
334 | last_time = jiffies; | |
335 | ++fpu_swa_count; | |
336 | printk(KERN_WARNING | |
337 | "%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n", | |
338 | current->comm, current->pid, regs->cr_iip + ia64_psr(regs)->ri, isr); | |
339 | } | |
340 | ||
341 | exception = fp_emulate(fp_fault, bundle, ®s->cr_ipsr, ®s->ar_fpsr, &isr, ®s->pr, | |
342 | ®s->cr_ifs, regs); | |
343 | if (fp_fault) { | |
344 | if (exception == 0) { | |
345 | /* emulation was successful */ | |
346 | ia64_increment_ip(regs); | |
347 | } else if (exception == -1) { | |
348 | printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n"); | |
349 | return -1; | |
350 | } else { | |
351 | /* is next instruction a trap? */ | |
352 | if (exception & 2) { | |
353 | ia64_increment_ip(regs); | |
354 | } | |
355 | siginfo.si_signo = SIGFPE; | |
356 | siginfo.si_errno = 0; | |
357 | siginfo.si_code = __SI_FAULT; /* default code */ | |
358 | siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); | |
359 | if (isr & 0x11) { | |
360 | siginfo.si_code = FPE_FLTINV; | |
361 | } else if (isr & 0x22) { | |
362 | /* denormal operand gets the same si_code as underflow | |
363 | * see arch/i386/kernel/traps.c:math_error() */ | |
364 | siginfo.si_code = FPE_FLTUND; | |
365 | } else if (isr & 0x44) { | |
366 | siginfo.si_code = FPE_FLTDIV; | |
367 | } | |
368 | siginfo.si_isr = isr; | |
369 | siginfo.si_flags = __ISR_VALID; | |
370 | siginfo.si_imm = 0; | |
371 | force_sig_info(SIGFPE, &siginfo, current); | |
372 | } | |
373 | } else { | |
374 | if (exception == -1) { | |
375 | printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n"); | |
376 | return -1; | |
377 | } else if (exception != 0) { | |
378 | /* raise exception */ | |
379 | siginfo.si_signo = SIGFPE; | |
380 | siginfo.si_errno = 0; | |
381 | siginfo.si_code = __SI_FAULT; /* default code */ | |
382 | siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); | |
383 | if (isr & 0x880) { | |
384 | siginfo.si_code = FPE_FLTOVF; | |
385 | } else if (isr & 0x1100) { | |
386 | siginfo.si_code = FPE_FLTUND; | |
387 | } else if (isr & 0x2200) { | |
388 | siginfo.si_code = FPE_FLTRES; | |
389 | } | |
390 | siginfo.si_isr = isr; | |
391 | siginfo.si_flags = __ISR_VALID; | |
392 | siginfo.si_imm = 0; | |
393 | force_sig_info(SIGFPE, &siginfo, current); | |
394 | } | |
395 | } | |
396 | return 0; | |
397 | } | |
398 | ||
399 | struct illegal_op_return { | |
400 | unsigned long fkt, arg1, arg2, arg3; | |
401 | }; | |
402 | ||
403 | struct illegal_op_return | |
404 | ia64_illegal_op_fault (unsigned long ec, long arg1, long arg2, long arg3, | |
405 | long arg4, long arg5, long arg6, long arg7, | |
406 | struct pt_regs regs) | |
407 | { | |
408 | struct illegal_op_return rv; | |
409 | struct siginfo si; | |
410 | char buf[128]; | |
411 | ||
412 | #ifdef CONFIG_IA64_BRL_EMU | |
413 | { | |
414 | extern struct illegal_op_return ia64_emulate_brl (struct pt_regs *, unsigned long); | |
415 | ||
416 | rv = ia64_emulate_brl(®s, ec); | |
417 | if (rv.fkt != (unsigned long) -1) | |
418 | return rv; | |
419 | } | |
420 | #endif | |
421 | ||
422 | sprintf(buf, "IA-64 Illegal operation fault"); | |
423 | die_if_kernel(buf, ®s, 0); | |
424 | ||
425 | memset(&si, 0, sizeof(si)); | |
426 | si.si_signo = SIGILL; | |
427 | si.si_code = ILL_ILLOPC; | |
428 | si.si_addr = (void __user *) (regs.cr_iip + ia64_psr(®s)->ri); | |
429 | force_sig_info(SIGILL, &si, current); | |
430 | rv.fkt = 0; | |
431 | return rv; | |
432 | } | |
433 | ||
1f7ad57b | 434 | void __kprobes |
1da177e4 LT |
435 | ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa, |
436 | unsigned long iim, unsigned long itir, long arg5, long arg6, | |
437 | long arg7, struct pt_regs regs) | |
438 | { | |
439 | unsigned long code, error = isr, iip; | |
440 | struct siginfo siginfo; | |
441 | char buf[128]; | |
442 | int result, sig; | |
443 | static const char *reason[] = { | |
444 | "IA-64 Illegal Operation fault", | |
445 | "IA-64 Privileged Operation fault", | |
446 | "IA-64 Privileged Register fault", | |
447 | "IA-64 Reserved Register/Field fault", | |
448 | "Disabled Instruction Set Transition fault", | |
449 | "Unknown fault 5", "Unknown fault 6", "Unknown fault 7", "Illegal Hazard fault", | |
450 | "Unknown fault 9", "Unknown fault 10", "Unknown fault 11", "Unknown fault 12", | |
451 | "Unknown fault 13", "Unknown fault 14", "Unknown fault 15" | |
452 | }; | |
453 | ||
454 | if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) { | |
455 | /* | |
456 | * This fault was due to lfetch.fault, set "ed" bit in the psr to cancel | |
457 | * the lfetch. | |
458 | */ | |
459 | ia64_psr(®s)->ed = 1; | |
460 | return; | |
461 | } | |
462 | ||
463 | iip = regs.cr_iip + ia64_psr(®s)->ri; | |
464 | ||
465 | switch (vector) { | |
466 | case 24: /* General Exception */ | |
467 | code = (isr >> 4) & 0xf; | |
468 | sprintf(buf, "General Exception: %s%s", reason[code], | |
469 | (code == 3) ? ((isr & (1UL << 37)) | |
470 | ? " (RSE access)" : " (data access)") : ""); | |
471 | if (code == 8) { | |
472 | # ifdef CONFIG_IA64_PRINT_HAZARDS | |
473 | printk("%s[%d]: possible hazard @ ip=%016lx (pr = %016lx)\n", | |
474 | current->comm, current->pid, | |
475 | regs.cr_iip + ia64_psr(®s)->ri, regs.pr); | |
476 | # endif | |
477 | return; | |
478 | } | |
479 | break; | |
480 | ||
481 | case 25: /* Disabled FP-Register */ | |
482 | if (isr & 2) { | |
483 | disabled_fph_fault(®s); | |
484 | return; | |
485 | } | |
486 | sprintf(buf, "Disabled FPL fault---not supposed to happen!"); | |
487 | break; | |
488 | ||
489 | case 26: /* NaT Consumption */ | |
490 | if (user_mode(®s)) { | |
491 | void __user *addr; | |
492 | ||
493 | if (((isr >> 4) & 0xf) == 2) { | |
494 | /* NaT page consumption */ | |
495 | sig = SIGSEGV; | |
496 | code = SEGV_ACCERR; | |
497 | addr = (void __user *) ifa; | |
498 | } else { | |
499 | /* register NaT consumption */ | |
500 | sig = SIGILL; | |
501 | code = ILL_ILLOPN; | |
502 | addr = (void __user *) (regs.cr_iip | |
503 | + ia64_psr(®s)->ri); | |
504 | } | |
505 | siginfo.si_signo = sig; | |
506 | siginfo.si_code = code; | |
507 | siginfo.si_errno = 0; | |
508 | siginfo.si_addr = addr; | |
509 | siginfo.si_imm = vector; | |
510 | siginfo.si_flags = __ISR_VALID; | |
511 | siginfo.si_isr = isr; | |
512 | force_sig_info(sig, &siginfo, current); | |
513 | return; | |
514 | } else if (ia64_done_with_exception(®s)) | |
515 | return; | |
516 | sprintf(buf, "NaT consumption"); | |
517 | break; | |
518 | ||
519 | case 31: /* Unsupported Data Reference */ | |
520 | if (user_mode(®s)) { | |
521 | siginfo.si_signo = SIGILL; | |
522 | siginfo.si_code = ILL_ILLOPN; | |
523 | siginfo.si_errno = 0; | |
524 | siginfo.si_addr = (void __user *) iip; | |
525 | siginfo.si_imm = vector; | |
526 | siginfo.si_flags = __ISR_VALID; | |
527 | siginfo.si_isr = isr; | |
528 | force_sig_info(SIGILL, &siginfo, current); | |
529 | return; | |
530 | } | |
531 | sprintf(buf, "Unsupported data reference"); | |
532 | break; | |
533 | ||
534 | case 29: /* Debug */ | |
535 | case 35: /* Taken Branch Trap */ | |
536 | case 36: /* Single Step Trap */ | |
537 | if (fsys_mode(current, ®s)) { | |
538 | extern char __kernel_syscall_via_break[]; | |
539 | /* | |
15029285 JU |
540 | * Got a trap in fsys-mode: Taken Branch Trap |
541 | * and Single Step trap need special handling; | |
542 | * Debug trap is ignored (we disable it here | |
543 | * and re-enable it in the lower-privilege trap). | |
1da177e4 LT |
544 | */ |
545 | if (unlikely(vector == 29)) { | |
15029285 JU |
546 | set_thread_flag(TIF_DB_DISABLED); |
547 | ia64_psr(®s)->db = 0; | |
548 | ia64_psr(®s)->lp = 1; | |
1da177e4 LT |
549 | return; |
550 | } | |
551 | /* re-do the system call via break 0x100000: */ | |
552 | regs.cr_iip = (unsigned long) __kernel_syscall_via_break; | |
553 | ia64_psr(®s)->ri = 0; | |
554 | ia64_psr(®s)->cpl = 3; | |
555 | return; | |
556 | } | |
557 | switch (vector) { | |
558 | case 29: | |
559 | siginfo.si_code = TRAP_HWBKPT; | |
560 | #ifdef CONFIG_ITANIUM | |
561 | /* | |
562 | * Erratum 10 (IFA may contain incorrect address) now has | |
563 | * "NoFix" status. There are no plans for fixing this. | |
564 | */ | |
565 | if (ia64_psr(®s)->is == 0) | |
566 | ifa = regs.cr_iip; | |
567 | #endif | |
568 | break; | |
569 | case 35: siginfo.si_code = TRAP_BRANCH; ifa = 0; break; | |
9138d581 | 570 | case 36: siginfo.si_code = TRAP_TRACE; ifa = 0; break; |
1da177e4 | 571 | } |
9138d581 KO |
572 | if (notify_die(DIE_FAULT, "ia64_fault", ®s, vector, siginfo.si_code, SIGTRAP) |
573 | == NOTIFY_STOP) | |
574 | return; | |
1da177e4 LT |
575 | siginfo.si_signo = SIGTRAP; |
576 | siginfo.si_errno = 0; | |
577 | siginfo.si_addr = (void __user *) ifa; | |
578 | siginfo.si_imm = 0; | |
579 | siginfo.si_flags = __ISR_VALID; | |
580 | siginfo.si_isr = isr; | |
581 | force_sig_info(SIGTRAP, &siginfo, current); | |
582 | return; | |
583 | ||
584 | case 32: /* fp fault */ | |
585 | case 33: /* fp trap */ | |
586 | result = handle_fpu_swa((vector == 32) ? 1 : 0, ®s, isr); | |
587 | if ((result < 0) || (current->thread.flags & IA64_THREAD_FPEMU_SIGFPE)) { | |
588 | siginfo.si_signo = SIGFPE; | |
589 | siginfo.si_errno = 0; | |
590 | siginfo.si_code = FPE_FLTINV; | |
591 | siginfo.si_addr = (void __user *) iip; | |
592 | siginfo.si_flags = __ISR_VALID; | |
593 | siginfo.si_isr = isr; | |
594 | siginfo.si_imm = 0; | |
595 | force_sig_info(SIGFPE, &siginfo, current); | |
596 | } | |
597 | return; | |
598 | ||
599 | case 34: | |
600 | if (isr & 0x2) { | |
601 | /* Lower-Privilege Transfer Trap */ | |
15029285 JU |
602 | |
603 | /* If we disabled debug traps during an fsyscall, | |
604 | * re-enable them here. | |
605 | */ | |
606 | if (test_thread_flag(TIF_DB_DISABLED)) { | |
607 | clear_thread_flag(TIF_DB_DISABLED); | |
608 | ia64_psr(®s)->db = 1; | |
609 | } | |
610 | ||
1da177e4 | 611 | /* |
15029285 JU |
612 | * Just clear PSR.lp and then return immediately: |
613 | * all the interesting work (e.g., signal delivery) | |
614 | * is done in the kernel exit path. | |
1da177e4 LT |
615 | */ |
616 | ia64_psr(®s)->lp = 0; | |
617 | return; | |
618 | } else { | |
619 | /* Unimplemented Instr. Address Trap */ | |
620 | if (user_mode(®s)) { | |
621 | siginfo.si_signo = SIGILL; | |
622 | siginfo.si_code = ILL_BADIADDR; | |
623 | siginfo.si_errno = 0; | |
624 | siginfo.si_flags = 0; | |
625 | siginfo.si_isr = 0; | |
626 | siginfo.si_imm = 0; | |
627 | siginfo.si_addr = (void __user *) iip; | |
628 | force_sig_info(SIGILL, &siginfo, current); | |
629 | return; | |
630 | } | |
631 | sprintf(buf, "Unimplemented Instruction Address fault"); | |
632 | } | |
633 | break; | |
634 | ||
635 | case 45: | |
636 | #ifdef CONFIG_IA32_SUPPORT | |
637 | if (ia32_exception(®s, isr) == 0) | |
638 | return; | |
639 | #endif | |
640 | printk(KERN_ERR "Unexpected IA-32 exception (Trap 45)\n"); | |
641 | printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n", | |
642 | iip, ifa, isr); | |
643 | force_sig(SIGSEGV, current); | |
644 | break; | |
645 | ||
646 | case 46: | |
647 | #ifdef CONFIG_IA32_SUPPORT | |
648 | if (ia32_intercept(®s, isr) == 0) | |
649 | return; | |
650 | #endif | |
651 | printk(KERN_ERR "Unexpected IA-32 intercept trap (Trap 46)\n"); | |
652 | printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n", | |
653 | iip, ifa, isr, iim); | |
654 | force_sig(SIGSEGV, current); | |
655 | return; | |
656 | ||
657 | case 47: | |
658 | sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16); | |
659 | break; | |
660 | ||
661 | default: | |
662 | sprintf(buf, "Fault %lu", vector); | |
663 | break; | |
664 | } | |
665 | die_if_kernel(buf, ®s, error); | |
666 | force_sig(SIGILL, current); | |
667 | } |