Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
8ea6091f | 6 | * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
7 | */ |
8 | ||
1da177e4 | 9 | #include <asm/sn/types.h> |
1da177e4 | 10 | #include <asm/sn/addrs.h> |
1da177e4 | 11 | #include <asm/sn/io.h> |
f90aa8c4 | 12 | #include <asm/sn/module.h> |
8ea6091f | 13 | #include <asm/sn/intr.h> |
c13cf371 PB |
14 | #include <asm/sn/pcibus_provider_defs.h> |
15 | #include <asm/sn/pcidev.h> | |
c13cf371 | 16 | #include <asm/sn/sn_sal.h> |
c13cf371 | 17 | #include "xtalk/hubdev.h" |
674c6479 | 18 | |
e955d825 | 19 | /* |
8ea6091f JK |
20 | * The code in this file will only be executed when running with |
21 | * a PROM that does _not_ have base ACPI IO support. | |
22 | * (i.e., SN_ACPI_BASE_SUPPORT() == 0) | |
e955d825 MM |
23 | */ |
24 | ||
8ea6091f JK |
25 | static int max_segment_number; /* Default highest segment number */ |
26 | static int max_pcibus_number = 255; /* Default highest pci bus number */ | |
1da177e4 | 27 | |
1da177e4 LT |
28 | |
29 | /* | |
30 | * Retrieve the hub device info structure for the given nasid. | |
31 | */ | |
6d6e4200 | 32 | static inline u64 sal_get_hubdev_info(u64 handle, u64 address) |
1da177e4 | 33 | { |
1da177e4 LT |
34 | struct ia64_sal_retval ret_stuff; |
35 | ret_stuff.status = 0; | |
36 | ret_stuff.v0 = 0; | |
37 | ||
38 | SAL_CALL_NOLOCK(ret_stuff, | |
39 | (u64) SN_SAL_IOIF_GET_HUBDEV_INFO, | |
40 | (u64) handle, (u64) address, 0, 0, 0, 0, 0); | |
41 | return ret_stuff.v0; | |
42 | } | |
43 | ||
44 | /* | |
45 | * Retrieve the pci bus information given the bus number. | |
46 | */ | |
6d6e4200 | 47 | static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address) |
1da177e4 | 48 | { |
1da177e4 LT |
49 | struct ia64_sal_retval ret_stuff; |
50 | ret_stuff.status = 0; | |
51 | ret_stuff.v0 = 0; | |
52 | ||
53 | SAL_CALL_NOLOCK(ret_stuff, | |
54 | (u64) SN_SAL_IOIF_GET_PCIBUS_INFO, | |
55 | (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0); | |
56 | return ret_stuff.v0; | |
57 | } | |
58 | ||
6f09a925 JK |
59 | /* |
60 | * Retrieve the pci device information given the bus and device|function number. | |
61 | */ | |
62 | static inline u64 | |
63 | sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev, | |
64 | u64 sn_irq_info) | |
65 | { | |
66 | struct ia64_sal_retval ret_stuff; | |
67 | ret_stuff.status = 0; | |
68 | ret_stuff.v0 = 0; | |
69 | ||
70 | SAL_CALL_NOLOCK(ret_stuff, | |
71 | (u64) SN_SAL_IOIF_GET_PCIDEV_INFO, | |
72 | (u64) segment, (u64) bus_number, (u64) devfn, | |
73 | (u64) pci_dev, | |
74 | sn_irq_info, 0, 0); | |
75 | return ret_stuff.v0; | |
76 | } | |
77 | ||
5f7f5b0c | 78 | |
1da177e4 | 79 | /* |
8ea6091f JK |
80 | * sn_fixup_ionodes() - This routine initializes the HUB data structure for |
81 | * each node in the system. This function is only | |
82 | * executed when running with a non-ACPI capable PROM. | |
1da177e4 | 83 | */ |
2fcc3db0 | 84 | static void __init sn_fixup_ionodes(void) |
1da177e4 | 85 | { |
8ea6091f | 86 | |
1da177e4 | 87 | struct hubdev_info *hubdev; |
6d6e4200 PB |
88 | u64 status; |
89 | u64 nasid; | |
8ea6091f JK |
90 | int i; |
91 | extern void sn_common_hubdev_init(struct hubdev_info *); | |
1da177e4 | 92 | |
674c6479 CN |
93 | /* |
94 | * Get SGI Specific HUB chipset information. | |
95 | * Inform Prom that this kernel can support domain bus numbering. | |
96 | */ | |
24ee0a6d | 97 | for (i = 0; i < num_cnodes; i++) { |
1da177e4 LT |
98 | hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo); |
99 | nasid = cnodeid_to_nasid(i); | |
674c6479 CN |
100 | hubdev->max_segment_number = 0xffffffff; |
101 | hubdev->max_pcibus_number = 0xff; | |
6d6e4200 | 102 | status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev)); |
1da177e4 LT |
103 | if (status) |
104 | continue; | |
105 | ||
674c6479 CN |
106 | /* Save the largest Domain and pcibus numbers found. */ |
107 | if (hubdev->max_segment_number) { | |
108 | /* | |
109 | * Dealing with a Prom that supports segments. | |
110 | */ | |
111 | max_segment_number = hubdev->max_segment_number; | |
112 | max_pcibus_number = hubdev->max_pcibus_number; | |
113 | } | |
8ea6091f JK |
114 | sn_common_hubdev_init(hubdev); |
115 | } | |
116 | } | |
674c6479 | 117 | |
8ea6091f JK |
118 | /* |
119 | * sn_pci_legacy_window_fixup - Create PCI controller windows for | |
120 | * legacy IO and MEM space. This needs to | |
121 | * be done here, as the PROM does not have | |
122 | * ACPI support defining the root buses | |
123 | * and their resources (_CRS), | |
124 | */ | |
125 | static void | |
126 | sn_legacy_pci_window_fixup(struct pci_controller *controller, | |
127 | u64 legacy_io, u64 legacy_mem) | |
128 | { | |
129 | controller->window = kcalloc(2, sizeof(struct pci_window), | |
130 | GFP_KERNEL); | |
80a03e29 | 131 | BUG_ON(controller->window == NULL); |
8ea6091f JK |
132 | controller->window[0].offset = legacy_io; |
133 | controller->window[0].resource.name = "legacy_io"; | |
134 | controller->window[0].resource.flags = IORESOURCE_IO; | |
135 | controller->window[0].resource.start = legacy_io; | |
136 | controller->window[0].resource.end = | |
137 | controller->window[0].resource.start + 0xffff; | |
138 | controller->window[0].resource.parent = &ioport_resource; | |
139 | controller->window[1].offset = legacy_mem; | |
140 | controller->window[1].resource.name = "legacy_mem"; | |
141 | controller->window[1].resource.flags = IORESOURCE_MEM; | |
142 | controller->window[1].resource.start = legacy_mem; | |
143 | controller->window[1].resource.end = | |
144 | controller->window[1].resource.start + (1024 * 1024) - 1; | |
145 | controller->window[1].resource.parent = &iomem_resource; | |
146 | controller->windows = 2; | |
1da177e4 LT |
147 | } |
148 | ||
3ec829b6 JK |
149 | /* |
150 | * sn_pci_window_fixup() - Create a pci_window for each device resource. | |
8ea6091f JK |
151 | * It will setup pci_windows for use by |
152 | * pcibios_bus_to_resource(), pcibios_resource_to_bus(), | |
153 | * etc. | |
3ec829b6 JK |
154 | */ |
155 | static void | |
156 | sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, | |
53493dcf | 157 | s64 * pci_addrs) |
3ec829b6 JK |
158 | { |
159 | struct pci_controller *controller = PCI_CONTROLLER(dev->bus); | |
160 | unsigned int i; | |
161 | unsigned int idx; | |
162 | unsigned int new_count; | |
163 | struct pci_window *new_window; | |
164 | ||
165 | if (count == 0) | |
166 | return; | |
167 | idx = controller->windows; | |
168 | new_count = controller->windows + count; | |
169 | new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL); | |
80a03e29 | 170 | BUG_ON(new_window == NULL); |
3ec829b6 JK |
171 | if (controller->window) { |
172 | memcpy(new_window, controller->window, | |
173 | sizeof(struct pci_window) * controller->windows); | |
174 | kfree(controller->window); | |
175 | } | |
176 | ||
177 | /* Setup a pci_window for each device resource. */ | |
178 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | |
179 | if (pci_addrs[i] == -1) | |
180 | continue; | |
181 | ||
182 | new_window[idx].offset = dev->resource[i].start - pci_addrs[i]; | |
183 | new_window[idx].resource = dev->resource[i]; | |
184 | idx++; | |
185 | } | |
186 | ||
187 | controller->windows = new_count; | |
188 | controller->window = new_window; | |
189 | } | |
190 | ||
1da177e4 | 191 | /* |
6f09a925 | 192 | * sn_io_slot_fixup() - We are not running with an ACPI capable PROM, |
8ea6091f JK |
193 | * and need to convert the pci_dev->resource |
194 | * 'start' and 'end' addresses to mapped addresses, | |
195 | * and setup the pci_controller->window array entries. | |
1da177e4 | 196 | */ |
8ea6091f | 197 | void |
6f09a925 | 198 | sn_io_slot_fixup(struct pci_dev *dev) |
1da177e4 | 199 | { |
3ec829b6 | 200 | unsigned int count = 0; |
1da177e4 | 201 | int idx; |
53493dcf | 202 | s64 pci_addrs[PCI_ROM_RESOURCE + 1]; |
8ea6091f | 203 | unsigned long addr, end, size, start; |
6f09a925 JK |
204 | struct pcidev_info *pcidev_info; |
205 | struct sn_irq_info *sn_irq_info; | |
206 | int status; | |
207 | ||
208 | pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL); | |
209 | if (!pcidev_info) | |
d4ed8084 | 210 | panic("%s: Unable to alloc memory for pcidev_info", __func__); |
6f09a925 JK |
211 | |
212 | sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL); | |
213 | if (!sn_irq_info) | |
d4ed8084 | 214 | panic("%s: Unable to alloc memory for sn_irq_info", __func__); |
6f09a925 JK |
215 | |
216 | /* Call to retrieve pci device information needed by kernel. */ | |
217 | status = sal_get_pcidev_info((u64) pci_domain_nr(dev), | |
218 | (u64) dev->bus->number, | |
219 | dev->devfn, | |
220 | (u64) __pa(pcidev_info), | |
221 | (u64) __pa(sn_irq_info)); | |
222 | ||
80a03e29 | 223 | BUG_ON(status); /* Cannot get platform pci device information */ |
6f09a925 | 224 | |
3ec829b6 | 225 | |
1da177e4 LT |
226 | /* Copy over PIO Mapped Addresses */ |
227 | for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) { | |
1da177e4 | 228 | |
3ec829b6 JK |
229 | if (!pcidev_info->pdi_pio_mapped_addr[idx]) { |
230 | pci_addrs[idx] = -1; | |
1da177e4 | 231 | continue; |
3ec829b6 | 232 | } |
1da177e4 LT |
233 | |
234 | start = dev->resource[idx].start; | |
235 | end = dev->resource[idx].end; | |
236 | size = end - start; | |
3ec829b6 JK |
237 | if (size == 0) { |
238 | pci_addrs[idx] = -1; | |
239 | continue; | |
240 | } | |
241 | pci_addrs[idx] = start; | |
242 | count++; | |
243 | addr = pcidev_info->pdi_pio_mapped_addr[idx]; | |
1da177e4 LT |
244 | addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET; |
245 | dev->resource[idx].start = addr; | |
246 | dev->resource[idx].end = addr + size; | |
64715725 BW |
247 | |
248 | /* | |
249 | * if it's already in the device structure, remove it before | |
250 | * inserting | |
251 | */ | |
252 | if (dev->resource[idx].parent && dev->resource[idx].parent->child) | |
253 | release_resource(&dev->resource[idx]); | |
254 | ||
1da177e4 | 255 | if (dev->resource[idx].flags & IORESOURCE_IO) |
64715725 | 256 | insert_resource(&ioport_resource, &dev->resource[idx]); |
1da177e4 | 257 | else |
64715725 | 258 | insert_resource(&iomem_resource, &dev->resource[idx]); |
d7ad2254 JK |
259 | /* |
260 | * If ROM, set the actual ROM image size, and mark as | |
261 | * shadowed in PROM. | |
262 | */ | |
263 | if (idx == PCI_ROM_RESOURCE) { | |
264 | size_t image_size; | |
265 | void __iomem *rom; | |
266 | ||
267 | rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE), | |
268 | size + 1); | |
97c44836 | 269 | image_size = pci_get_rom_size(dev, rom, size + 1); |
d7ad2254 JK |
270 | dev->resource[PCI_ROM_RESOURCE].end = |
271 | dev->resource[PCI_ROM_RESOURCE].start + | |
272 | image_size - 1; | |
273 | dev->resource[PCI_ROM_RESOURCE].flags |= | |
274 | IORESOURCE_ROM_BIOS_COPY; | |
275 | } | |
1da177e4 | 276 | } |
3ec829b6 JK |
277 | /* Create a pci_window in the pci_controller struct for |
278 | * each device resource. | |
279 | */ | |
280 | if (count > 0) | |
281 | sn_pci_window_fixup(dev, count, pci_addrs); | |
6f09a925 JK |
282 | |
283 | sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info); | |
1da177e4 LT |
284 | } |
285 | ||
6f09a925 JK |
286 | EXPORT_SYMBOL(sn_io_slot_fixup); |
287 | ||
1da177e4 LT |
288 | /* |
289 | * sn_pci_controller_fixup() - This routine sets up a bus's resources | |
8ea6091f | 290 | * consistent with the Linux PCI abstraction layer. |
1da177e4 | 291 | */ |
d3a307f3 | 292 | static void __init |
8ea6091f | 293 | sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) |
1da177e4 | 294 | { |
8ea6091f | 295 | s64 status = 0; |
1da177e4 LT |
296 | struct pci_controller *controller; |
297 | struct pcibus_bussoft *prom_bussoft_ptr; | |
8ea6091f | 298 | |
1da177e4 | 299 | |
6f354b01 PB |
300 | status = sal_get_pcibus_info((u64) segment, (u64) busnum, |
301 | (u64) ia64_tpa(&prom_bussoft_ptr)); | |
302 | if (status > 0) | |
303 | return; /*bus # does not exist */ | |
1da177e4 | 304 | prom_bussoft_ptr = __va(prom_bussoft_ptr); |
1da177e4 | 305 | |
8ea6091f | 306 | controller = kzalloc(sizeof(*controller), GFP_KERNEL); |
80a03e29 | 307 | BUG_ON(!controller); |
674c6479 | 308 | controller->segment = segment; |
6f354b01 | 309 | |
1da177e4 | 310 | /* |
8ea6091f JK |
311 | * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup(). |
312 | * (platform_data will be overwritten later in sn_common_bus_fixup()) | |
1da177e4 | 313 | */ |
8ea6091f | 314 | controller->platform_data = prom_bussoft_ptr; |
1da177e4 | 315 | |
8ea6091f JK |
316 | bus = pci_scan_bus(busnum, &pci_root_ops, controller); |
317 | if (bus == NULL) | |
318 | goto error_return; /* error, or bus already scanned */ | |
e955d825 | 319 | |
c1ffb910 | 320 | bus->sysdata = controller; |
6f354b01 PB |
321 | |
322 | return; | |
323 | ||
324 | error_return: | |
325 | ||
8ea6091f | 326 | kfree(controller); |
6f354b01 PB |
327 | return; |
328 | } | |
329 | ||
8ea6091f JK |
330 | /* |
331 | * sn_bus_fixup | |
332 | */ | |
333 | void | |
334 | sn_bus_fixup(struct pci_bus *bus) | |
6f354b01 | 335 | { |
8ea6091f JK |
336 | struct pci_dev *pci_dev = NULL; |
337 | struct pcibus_bussoft *prom_bussoft_ptr; | |
8ea6091f JK |
338 | |
339 | if (!bus->parent) { /* If root bus */ | |
340 | prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data; | |
341 | if (prom_bussoft_ptr == NULL) { | |
342 | printk(KERN_ERR | |
343 | "sn_bus_fixup: 0x%04x:0x%02x Unable to " | |
344 | "obtain prom_bussoft_ptr\n", | |
345 | pci_domain_nr(bus), bus->number); | |
346 | return; | |
347 | } | |
348 | sn_common_bus_fixup(bus, prom_bussoft_ptr); | |
349 | sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus), | |
350 | prom_bussoft_ptr->bs_legacy_io, | |
351 | prom_bussoft_ptr->bs_legacy_mem); | |
352 | } | |
353 | list_for_each_entry(pci_dev, &bus->devices, bus_list) { | |
6f09a925 | 354 | sn_io_slot_fixup(pci_dev); |
8ea6091f | 355 | } |
6f354b01 | 356 | |
1da177e4 LT |
357 | } |
358 | ||
359 | /* | |
8ea6091f JK |
360 | * sn_io_init - PROM does not have ACPI support to define nodes or root buses, |
361 | * so we need to do things the hard way, including initiating the | |
362 | * bus scanning ourselves. | |
1da177e4 LT |
363 | */ |
364 | ||
8ea6091f | 365 | void __init sn_io_init(void) |
1da177e4 | 366 | { |
8ed9b2c7 | 367 | int i, j; |
e955d825 | 368 | |
1da177e4 | 369 | sn_fixup_ionodes(); |
1da177e4 | 370 | |
6f354b01 | 371 | /* busses are not known yet ... */ |
674c6479 CN |
372 | for (i = 0; i <= max_segment_number; i++) |
373 | for (j = 0; j <= max_pcibus_number; j++) | |
374 | sn_pci_controller_fixup(i, j, NULL); | |
1da177e4 | 375 | } |