[deliverable/linux.git] / arch / ia64 / sn / kernel / io_init.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
 */

#include <linux/slab.h>
#include <linux/export.h>
#include <asm/sn/types.h>
#include <asm/sn/addrs.h>
#include <asm/sn/io.h>
#include <asm/sn/module.h>
#include <asm/sn/intr.h>
#include <asm/sn/pcibus_provider_defs.h>
#include <asm/sn/pcidev.h>
#include <asm/sn/sn_sal.h>
#include "xtalk/hubdev.h"

/*
 * The code in this file will only be executed when running with
 * a PROM that does _not_ have base ACPI IO support.
 * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
 */

static int max_segment_number;		 /* Default highest segment number */
static int max_pcibus_number = 255;	/* Default highest pci bus number */


/*
 * Retrieve the hub device info structure for the given nasid.
 */
static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
{
	struct ia64_sal_retval ret_stuff;
	ret_stuff.status = 0;
	ret_stuff.v0 = 0;

	SAL_CALL_NOLOCK(ret_stuff,
			(u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
			(u64) handle, (u64) address, 0, 0, 0, 0, 0);
	return ret_stuff.v0;
}

/*
 * Retrieve the pci bus information given the bus number.
 */
static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
{
	struct ia64_sal_retval ret_stuff;
	ret_stuff.status = 0;
	ret_stuff.v0 = 0;

	SAL_CALL_NOLOCK(ret_stuff,
			(u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
			(u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
	return ret_stuff.v0;
}

/*
 * Retrieve the pci device information given the bus and device|function number.
 */
static inline u64
sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
		    u64 sn_irq_info)
{
	struct ia64_sal_retval ret_stuff;
	ret_stuff.status = 0;
	ret_stuff.v0 = 0;

	SAL_CALL_NOLOCK(ret_stuff,
			(u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
			(u64) segment, (u64) bus_number, (u64) devfn,
			(u64) pci_dev,
			sn_irq_info, 0, 0);
	return ret_stuff.v0;
}


/*
 * sn_fixup_ionodes() - This routine initializes the HUB data structure for
 *			each node in the system. This function is only
 *			executed when running with a non-ACPI capable PROM.
 */
static void __init sn_fixup_ionodes(void)
{

	struct hubdev_info *hubdev;
	u64 status;
	u64 nasid;
	int i;
	extern void sn_common_hubdev_init(struct hubdev_info *);

	/*
	 * Get SGI Specific HUB chipset information.
	 * Inform Prom that this kernel can support domain bus numbering.
	 */
	for (i = 0; i < num_cnodes; i++) {
		hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
		nasid = cnodeid_to_nasid(i);
		hubdev->max_segment_number = 0xffffffff;
		hubdev->max_pcibus_number = 0xff;
		status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
		if (status)
			continue;

		/* Save the largest Domain and pcibus numbers found. */
		if (hubdev->max_segment_number) {
			/*
			 * Dealing with a Prom that supports segments.
			 */
			max_segment_number = hubdev->max_segment_number;
			max_pcibus_number = hubdev->max_pcibus_number;
		}
		sn_common_hubdev_init(hubdev);
	}
}

/*
 * sn_pci_legacy_window_fixup - Setup PCI resources for
 *				legacy IO and MEM space. This needs to
 *				be done here, as the PROM does not have
 *				ACPI support defining the root buses
 *				and their resources (_CRS),
 */
static void
sn_legacy_pci_window_fixup(struct resource *res,
		u64 legacy_io, u64 legacy_mem)
{
		res[0].name = "legacy_io";
		res[0].flags = IORESOURCE_IO;
		res[0].start = legacy_io;
		res[0].end = res[0].start + 0xffff;
		res[0].parent = &ioport_resource;
		res[1].name = "legacy_mem";
		res[1].flags = IORESOURCE_MEM;
		res[1].start = legacy_mem;
		res[1].end = res[1].start + (1024 * 1024) - 1;
		res[1].parent = &iomem_resource;
}

/*
 * sn_io_slot_fixup() -   We are not running with an ACPI capable PROM,
 *			  and need to convert the pci_dev->resource
 *			  'start' and 'end' addresses to mapped addresses,
 *			  and setup the pci_controller->window array entries.
 */
void
sn_io_slot_fixup(struct pci_dev *dev)
{
	int idx;
	unsigned long addr, end, size, start;
	struct pcidev_info *pcidev_info;
	struct sn_irq_info *sn_irq_info;
	int status;

	pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
	if (!pcidev_info)
		panic("%s: Unable to alloc memory for pcidev_info", __func__);

	sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
	if (!sn_irq_info)
		panic("%s: Unable to alloc memory for sn_irq_info", __func__);

	/* Call to retrieve pci device information needed by kernel. */
	status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
		(u64) dev->bus->number,
		dev->devfn,
		(u64) __pa(pcidev_info),
		(u64) __pa(sn_irq_info));

	BUG_ON(status); /* Cannot get platform pci device information */


	/* Copy over PIO Mapped Addresses */
	for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {

		if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
			continue;
		}

		start = dev->resource[idx].start;
		end = dev->resource[idx].end;
		size = end - start;
		if (size == 0) {
			continue;
		}
		addr = pcidev_info->pdi_pio_mapped_addr[idx];
		addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
		dev->resource[idx].start = addr;
		dev->resource[idx].end = addr + size;

		/*
		 * if it's already in the device structure, remove it before
		 * inserting
		 */
		if (dev->resource[idx].parent && dev->resource[idx].parent->child)
			release_resource(&dev->resource[idx]);

		if (dev->resource[idx].flags & IORESOURCE_IO)
			insert_resource(&ioport_resource, &dev->resource[idx]);
		else
			insert_resource(&iomem_resource, &dev->resource[idx]);
		/*
		 * If ROM, set the actual ROM image size, and mark as
		 * shadowed in PROM.
		 */
		if (idx == PCI_ROM_RESOURCE) {
			size_t image_size;
			void __iomem *rom;

			rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
				      size + 1);
			image_size = pci_get_rom_size(dev, rom, size + 1);
			dev->resource[PCI_ROM_RESOURCE].end =
				dev->resource[PCI_ROM_RESOURCE].start +
				image_size - 1;
			dev->resource[PCI_ROM_RESOURCE].flags |=
						 IORESOURCE_ROM_BIOS_COPY;
		}
	}

	sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
}

EXPORT_SYMBOL(sn_io_slot_fixup);

/*
 * sn_pci_controller_fixup() - This routine sets up a bus's resources
 *			       consistent with the Linux PCI abstraction layer.
 */
static void __init
sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
{
	s64 status = 0;
	struct pci_controller *controller;
	struct pcibus_bussoft *prom_bussoft_ptr;
	struct resource *res;
	LIST_HEAD(resources);

 	status = sal_get_pcibus_info((u64) segment, (u64) busnum,
 				     (u64) ia64_tpa(&prom_bussoft_ptr));
 	if (status > 0)
		return;		/*bus # does not exist */
	prom_bussoft_ptr = __va(prom_bussoft_ptr);

	controller = kzalloc(sizeof(*controller), GFP_KERNEL);
	BUG_ON(!controller);
	controller->segment = segment;

	res = kcalloc(2, sizeof(struct resource), GFP_KERNEL);
	BUG_ON(!res);

	/*
	 * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
	 * (platform_data will be overwritten later in sn_common_bus_fixup())
	 */
	controller->platform_data = prom_bussoft_ptr;

	sn_legacy_pci_window_fixup(res,
			prom_bussoft_ptr->bs_legacy_io,
			prom_bussoft_ptr->bs_legacy_mem);
	pci_add_resource_offset(&resources,	&res[0],
			prom_bussoft_ptr->bs_legacy_io);
	pci_add_resource_offset(&resources,	&res[1],
			prom_bussoft_ptr->bs_legacy_mem);

	bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller,
				&resources);
 	if (bus == NULL) {
		kfree(res);
		kfree(controller);
		return;
	}
	pci_bus_add_devices(bus);
}

/*
 * sn_bus_fixup
 */
void
sn_bus_fixup(struct pci_bus *bus)
{
	struct pci_dev *pci_dev = NULL;
	struct pcibus_bussoft *prom_bussoft_ptr;

	if (!bus->parent) {  /* If root bus */
		prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
		if (prom_bussoft_ptr == NULL) {
			printk(KERN_ERR
			       "sn_bus_fixup: 0x%04x:0x%02x Unable to "
			       "obtain prom_bussoft_ptr\n",
			       pci_domain_nr(bus), bus->number);
			return;
		}
		sn_common_bus_fixup(bus, prom_bussoft_ptr);
        }
        list_for_each_entry(pci_dev, &bus->devices, bus_list) {
                sn_io_slot_fixup(pci_dev);
        }

}

/*
 * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
 *		so we need to do things the hard way, including initiating the
 *		bus scanning ourselves.
 */

void __init sn_io_init(void)
{
	int i, j;

	sn_fixup_ionodes();

	/* busses are not known yet ... */
	for (i = 0; i <= max_segment_number; i++)
		for (j = 0; j <= max_pcibus_number; j++)
			sn_pci_controller_fixup(i, j, NULL);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
8ea6091f	6	* Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
1da177e4 LT	7	*/
1da177e4 LT	8
5a0e3ad6	9	#include <linux/slab.h>
bd3ff194	10	#include <linux/export.h>
1da177e4	11	#include <asm/sn/types.h>
1da177e4	12	#include <asm/sn/addrs.h>
1da177e4	13	#include <asm/sn/io.h>
f90aa8c4	14	#include <asm/sn/module.h>
8ea6091f	15	#include <asm/sn/intr.h>
c13cf371 PB	16	#include <asm/sn/pcibus_provider_defs.h>
c13cf371 PB	17	#include <asm/sn/pcidev.h>
c13cf371	18	#include <asm/sn/sn_sal.h>
c13cf371	19	#include "xtalk/hubdev.h"
674c6479	20
e955d825	21	/*
8ea6091f JK	22	* The code in this file will only be executed when running with
	23	* a PROM that does _not_ have base ACPI IO support.
	24	* (i.e., SN_ACPI_BASE_SUPPORT() == 0)
e955d825 MM	25	*/
e955d825 MM	26
8ea6091f JK	27	static int max_segment_number; /* Default highest segment number */
8ea6091f JK	28	static int max_pcibus_number = 255; /* Default highest pci bus number */
1da177e4	29
1da177e4 LT	30
	31	/*
	32	* Retrieve the hub device info structure for the given nasid.
	33	*/
6d6e4200	34	static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
1da177e4	35	{
1da177e4 LT	36	struct ia64_sal_retval ret_stuff;
	37	ret_stuff.status = 0;
	38	ret_stuff.v0 = 0;
	39
	40	SAL_CALL_NOLOCK(ret_stuff,
	41	(u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
	42	(u64) handle, (u64) address, 0, 0, 0, 0, 0);
	43	return ret_stuff.v0;
	44	}
	45
	46	/*
	47	* Retrieve the pci bus information given the bus number.
	48	*/
6d6e4200	49	static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
1da177e4	50	{
1da177e4 LT	51	struct ia64_sal_retval ret_stuff;
	52	ret_stuff.status = 0;
	53	ret_stuff.v0 = 0;
	54
	55	SAL_CALL_NOLOCK(ret_stuff,
	56	(u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
	57	(u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
	58	return ret_stuff.v0;
	59	}
	60
6f09a925 JK	61	/*
	62	* Retrieve the pci device information given the bus and device\|function number.
	63	*/
	64	static inline u64
	65	sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
	66	u64 sn_irq_info)
	67	{
	68	struct ia64_sal_retval ret_stuff;
	69	ret_stuff.status = 0;
	70	ret_stuff.v0 = 0;
	71
	72	SAL_CALL_NOLOCK(ret_stuff,
	73	(u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
	74	(u64) segment, (u64) bus_number, (u64) devfn,
	75	(u64) pci_dev,
	76	sn_irq_info, 0, 0);
	77	return ret_stuff.v0;
	78	}
	79
5f7f5b0c	80
1da177e4	81	/*
8ea6091f JK	82	* sn_fixup_ionodes() - This routine initializes the HUB data structure for
	83	* each node in the system. This function is only
	84	* executed when running with a non-ACPI capable PROM.
1da177e4	85	*/
2fcc3db0	86	static void __init sn_fixup_ionodes(void)
1da177e4	87	{
8ea6091f	88
1da177e4	89	struct hubdev_info *hubdev;
6d6e4200 PB	90	u64 status;
6d6e4200 PB	91	u64 nasid;
8ea6091f JK	92	int i;
8ea6091f JK	93	extern void sn_common_hubdev_init(struct hubdev_info *);
1da177e4	94
674c6479 CN	95	/*
	96	* Get SGI Specific HUB chipset information.
	97	* Inform Prom that this kernel can support domain bus numbering.
	98	*/
24ee0a6d	99	for (i = 0; i < num_cnodes; i++) {
1da177e4 LT	100	hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
1da177e4 LT	101	nasid = cnodeid_to_nasid(i);
674c6479 CN	102	hubdev->max_segment_number = 0xffffffff;
674c6479 CN	103	hubdev->max_pcibus_number = 0xff;
6d6e4200	104	status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
1da177e4 LT	105	if (status)
	106	continue;
	107
674c6479 CN	108	/* Save the largest Domain and pcibus numbers found. */
	109	if (hubdev->max_segment_number) {
	110	/*
	111	* Dealing with a Prom that supports segments.
	112	*/
	113	max_segment_number = hubdev->max_segment_number;
	114	max_pcibus_number = hubdev->max_pcibus_number;
	115	}
8ea6091f JK	116	sn_common_hubdev_init(hubdev);
	117	}
	118	}
674c6479	119
8ea6091f	120	/*
2ead66b5	121	* sn_pci_legacy_window_fixup - Setup PCI resources for
8ea6091f JK	122	* legacy IO and MEM space. This needs to
	123	* be done here, as the PROM does not have
	124	* ACPI support defining the root buses
	125	* and their resources (_CRS),
	126	*/
	127	static void
2ead66b5 YW	128	sn_legacy_pci_window_fixup(struct resource *res,
2ead66b5 YW	129	u64 legacy_io, u64 legacy_mem)
8ea6091f	130	{
2ead66b5 YW	131	res[0].name = "legacy_io";
	132	res[0].flags = IORESOURCE_IO;
	133	res[0].start = legacy_io;
	134	res[0].end = res[0].start + 0xffff;
	135	res[0].parent = &ioport_resource;
	136	res[1].name = "legacy_mem";
	137	res[1].flags = IORESOURCE_MEM;
	138	res[1].start = legacy_mem;
	139	res[1].end = res[1].start + (1024 * 1024) - 1;
	140	res[1].parent = &iomem_resource;
1da177e4 LT	141	}
	142
	143	/*
6f09a925	144	* sn_io_slot_fixup() - We are not running with an ACPI capable PROM,
8ea6091f JK	145	* and need to convert the pci_dev->resource
	146	* 'start' and 'end' addresses to mapped addresses,
	147	* and setup the pci_controller->window array entries.
1da177e4	148	*/
8ea6091f	149	void
6f09a925	150	sn_io_slot_fixup(struct pci_dev *dev)
1da177e4 LT	151	{
1da177e4 LT	152	int idx;
8ea6091f	153	unsigned long addr, end, size, start;
6f09a925 JK	154	struct pcidev_info *pcidev_info;
	155	struct sn_irq_info *sn_irq_info;
	156	int status;
	157
	158	pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
	159	if (!pcidev_info)
d4ed8084	160	panic("%s: Unable to alloc memory for pcidev_info", __func__);
6f09a925 JK	161
	162	sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
	163	if (!sn_irq_info)
d4ed8084	164	panic("%s: Unable to alloc memory for sn_irq_info", __func__);
6f09a925 JK	165
	166	/* Call to retrieve pci device information needed by kernel. */
	167	status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
	168	(u64) dev->bus->number,
	169	dev->devfn,
	170	(u64) __pa(pcidev_info),
	171	(u64) __pa(sn_irq_info));
	172
80a03e29	173	BUG_ON(status); /* Cannot get platform pci device information */
6f09a925	174
3ec829b6	175
1da177e4 LT	176	/* Copy over PIO Mapped Addresses */
1da177e4 LT	177	for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
1da177e4	178
3ec829b6	179	if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
1da177e4	180	continue;
3ec829b6	181	}
1da177e4 LT	182
	183	start = dev->resource[idx].start;
	184	end = dev->resource[idx].end;
	185	size = end - start;
3ec829b6	186	if (size == 0) {
3ec829b6 JK	187	continue;
3ec829b6 JK	188	}
3ec829b6	189	addr = pcidev_info->pdi_pio_mapped_addr[idx];
1da177e4 LT	190	addr = ((addr << 4) >> 4) \| __IA64_UNCACHED_OFFSET;
	191	dev->resource[idx].start = addr;
	192	dev->resource[idx].end = addr + size;
64715725 BW	193
	194	/*
	195	* if it's already in the device structure, remove it before
	196	* inserting
	197	*/
	198	if (dev->resource[idx].parent && dev->resource[idx].parent->child)
	199	release_resource(&dev->resource[idx]);
	200
1da177e4	201	if (dev->resource[idx].flags & IORESOURCE_IO)
64715725	202	insert_resource(&ioport_resource, &dev->resource[idx]);
1da177e4	203	else
64715725	204	insert_resource(&iomem_resource, &dev->resource[idx]);
d7ad2254 JK	205	/*
	206	* If ROM, set the actual ROM image size, and mark as
	207	* shadowed in PROM.
	208	*/
	209	if (idx == PCI_ROM_RESOURCE) {
	210	size_t image_size;
	211	void __iomem *rom;
	212
	213	rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
	214	size + 1);
97c44836	215	image_size = pci_get_rom_size(dev, rom, size + 1);
d7ad2254 JK	216	dev->resource[PCI_ROM_RESOURCE].end =
	217	dev->resource[PCI_ROM_RESOURCE].start +
	218	image_size - 1;
	219	dev->resource[PCI_ROM_RESOURCE].flags \|=
	220	IORESOURCE_ROM_BIOS_COPY;
	221	}
1da177e4	222	}
6f09a925 JK	223
6f09a925 JK	224	sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
1da177e4 LT	225	}
1da177e4 LT	226
6f09a925 JK	227	EXPORT_SYMBOL(sn_io_slot_fixup);
6f09a925 JK	228
1da177e4 LT	229	/*
1da177e4 LT	230	* sn_pci_controller_fixup() - This routine sets up a bus's resources
8ea6091f	231	* consistent with the Linux PCI abstraction layer.
1da177e4	232	*/
d3a307f3	233	static void __init
8ea6091f	234	sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
1da177e4	235	{
8ea6091f	236	s64 status = 0;
1da177e4 LT	237	struct pci_controller *controller;
1da177e4 LT	238	struct pcibus_bussoft *prom_bussoft_ptr;
2ead66b5	239	struct resource *res;
f920b55d	240	LIST_HEAD(resources);
1da177e4	241
6f354b01 PB	242	status = sal_get_pcibus_info((u64) segment, (u64) busnum,
	243	(u64) ia64_tpa(&prom_bussoft_ptr));
	244	if (status > 0)
	245	return; /bus # does not exist /
1da177e4	246	prom_bussoft_ptr = __va(prom_bussoft_ptr);
1da177e4	247
8ea6091f	248	controller = kzalloc(sizeof(*controller), GFP_KERNEL);
80a03e29	249	BUG_ON(!controller);
674c6479	250	controller->segment = segment;
6f354b01	251
2ead66b5 YW	252	res = kcalloc(2, sizeof(struct resource), GFP_KERNEL);
	253	BUG_ON(!res);
	254
1da177e4	255	/*
8ea6091f JK	256	* Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
8ea6091f JK	257	* (platform_data will be overwritten later in sn_common_bus_fixup())
1da177e4	258	*/
8ea6091f	259	controller->platform_data = prom_bussoft_ptr;
1da177e4	260
2ead66b5 YW	261	sn_legacy_pci_window_fixup(res,
	262	prom_bussoft_ptr->bs_legacy_io,
	263	prom_bussoft_ptr->bs_legacy_mem);
	264	pci_add_resource_offset(&resources, &res[0],
	265	prom_bussoft_ptr->bs_legacy_io);
	266	pci_add_resource_offset(&resources, &res[1],
	267	prom_bussoft_ptr->bs_legacy_mem);
	268
f920b55d BH	269	bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller,
f920b55d BH	270	&resources);
862f0012 LT	271	if (bus == NULL) {
862f0012 LT	272	kfree(res);
a649dbfe	273	kfree(controller);
b97ea289	274	return;
862f0012	275	}
b97ea289	276	pci_bus_add_devices(bus);
6f354b01 PB	277	}
6f354b01 PB	278
8ea6091f JK	279	/*
	280	* sn_bus_fixup
	281	*/
	282	void
	283	sn_bus_fixup(struct pci_bus *bus)
6f354b01	284	{
8ea6091f JK	285	struct pci_dev *pci_dev = NULL;
8ea6091f JK	286	struct pcibus_bussoft *prom_bussoft_ptr;
8ea6091f JK	287
	288	if (!bus->parent) { /* If root bus */
	289	prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
	290	if (prom_bussoft_ptr == NULL) {
	291	printk(KERN_ERR
	292	"sn_bus_fixup: 0x%04x:0x%02x Unable to "
	293	"obtain prom_bussoft_ptr\n",
	294	pci_domain_nr(bus), bus->number);
	295	return;
	296	}
	297	sn_common_bus_fixup(bus, prom_bussoft_ptr);
8ea6091f JK	298	}
8ea6091f JK	299	list_for_each_entry(pci_dev, &bus->devices, bus_list) {
6f09a925	300	sn_io_slot_fixup(pci_dev);
8ea6091f	301	}
6f354b01	302
1da177e4 LT	303	}
	304
	305	/*
8ea6091f JK	306	* sn_io_init - PROM does not have ACPI support to define nodes or root buses,
	307	* so we need to do things the hard way, including initiating the
	308	* bus scanning ourselves.
1da177e4 LT	309	*/
1da177e4 LT	310
8ea6091f	311	void __init sn_io_init(void)
1da177e4	312	{
8ed9b2c7	313	int i, j;
e955d825	314
1da177e4	315	sn_fixup_ionodes();
1da177e4	316
6f354b01	317	/* busses are not known yet ... */
674c6479 CN	318	for (i = 0; i <= max_segment_number; i++)
	319	for (j = 0; j <= max_pcibus_number; j++)
	320	sn_pci_controller_fixup(i, j, NULL);
1da177e4	321	}