Commit | Line | Data |
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ad71860a | 1 | /* |
1da177e4 LT |
2 | * This file is subject to the terms and conditions of the GNU General Public |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
8ea6091f | 6 | * Copyright (C) 2000-2003, 2006 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/module.h> | |
8ea6091f | 10 | #include <linux/acpi.h> |
1da177e4 LT |
11 | #include <asm/io.h> |
12 | #include <asm/delay.h> | |
a9f9de73 | 13 | #include <asm/vga.h> |
1da177e4 LT |
14 | #include <asm/sn/nodepda.h> |
15 | #include <asm/sn/simulator.h> | |
16 | #include <asm/sn/pda.h> | |
17 | #include <asm/sn/sn_cpuid.h> | |
18 | #include <asm/sn/shub_mmr.h> | |
19 | ||
a9f9de73 MM |
20 | #define IS_LEGACY_VGA_IOPORT(p) \ |
21 | (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df)) | |
22 | ||
1da177e4 LT |
23 | /** |
24 | * sn_io_addr - convert an in/out port to an i/o address | |
25 | * @port: port to convert | |
26 | * | |
27 | * Legacy in/out instructions are converted to ld/st instructions | |
ad71860a | 28 | * on IA64. This routine will convert a port number into a valid |
1da177e4 LT |
29 | * SN i/o address. Used by sn_in*() and sn_out*(). |
30 | */ | |
ad71860a AS |
31 | |
32 | extern int sn_acpi_base_support(); | |
33 | ||
1da177e4 LT |
34 | void *sn_io_addr(unsigned long port) |
35 | { | |
36 | if (!IS_RUNNING_ON_SIMULATOR()) { | |
a9f9de73 | 37 | if (IS_LEGACY_VGA_IOPORT(port)) |
8ea6091f | 38 | return (__ia64_mk_io_addr(port)); |
1da177e4 LT |
39 | /* On sn2, legacy I/O ports don't point at anything */ |
40 | if (port < (64 * 1024)) | |
41 | return NULL; | |
ad71860a | 42 | if (sn_acpi_base_support()) |
8ea6091f JK |
43 | return (__ia64_mk_io_addr(port)); |
44 | else | |
45 | return ((void *)(port | __IA64_UNCACHED_OFFSET)); | |
1da177e4 LT |
46 | } else { |
47 | /* but the simulator uses them... */ | |
48 | unsigned long addr; | |
49 | ||
50 | /* | |
51 | * word align port, but need more than 10 bits | |
52 | * for accessing registers in bedrock local block | |
53 | * (so we don't do port&0xfff) | |
54 | */ | |
55 | addr = (is_shub2() ? 0xc00000028c000000UL : 0xc0000087cc000000UL) | ((port >> 2) << 12); | |
56 | if ((port >= 0x1f0 && port <= 0x1f7) || port == 0x3f6 || port == 0x3f7) | |
57 | addr |= port; | |
58 | return (void *)addr; | |
59 | } | |
60 | } | |
61 | ||
62 | EXPORT_SYMBOL(sn_io_addr); | |
63 | ||
64 | /** | |
65 | * __sn_mmiowb - I/O space memory barrier | |
66 | * | |
67 | * See include/asm-ia64/io.h and Documentation/DocBook/deviceiobook.tmpl | |
68 | * for details. | |
69 | * | |
70 | * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear. | |
71 | * See PV 871084 for details about the WAR about zero value. | |
72 | * | |
73 | */ | |
74 | void __sn_mmiowb(void) | |
75 | { | |
76 | volatile unsigned long *adr = pda->pio_write_status_addr; | |
77 | unsigned long val = pda->pio_write_status_val; | |
78 | ||
79 | while ((*adr & SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK) != val) | |
80 | cpu_relax(); | |
81 | } | |
82 | ||
83 | EXPORT_SYMBOL(__sn_mmiowb); |