Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Platform dependent support for SGI SN | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
2fcc3db0 | 8 | * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. |
1da177e4 LT |
9 | */ |
10 | ||
11 | #include <linux/irq.h> | |
cb4cb2cb | 12 | #include <linux/spinlock.h> |
2fcc3db0 | 13 | #include <linux/init.h> |
1da177e4 LT |
14 | #include <asm/sn/addrs.h> |
15 | #include <asm/sn/arch.h> | |
c13cf371 PB |
16 | #include <asm/sn/intr.h> |
17 | #include <asm/sn/pcibr_provider.h> | |
9b08ebd1 MM |
18 | #include <asm/sn/pcibus_provider_defs.h> |
19 | #include <asm/sn/pcidev.h> | |
1da177e4 LT |
20 | #include <asm/sn/shub_mmr.h> |
21 | #include <asm/sn/sn_sal.h> | |
22 | ||
23 | static void force_interrupt(int irq); | |
24 | static void register_intr_pda(struct sn_irq_info *sn_irq_info); | |
25 | static void unregister_intr_pda(struct sn_irq_info *sn_irq_info); | |
26 | ||
d0d59b98 | 27 | int sn_force_interrupt_flag = 1; |
1da177e4 | 28 | extern int sn_ioif_inited; |
83821d3f | 29 | struct list_head **sn_irq_lh; |
34af946a | 30 | static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */ |
1da177e4 | 31 | |
83821d3f MM |
32 | u64 sn_intr_alloc(nasid_t local_nasid, int local_widget, |
33 | struct sn_irq_info *sn_irq_info, | |
1da177e4 LT |
34 | int req_irq, nasid_t req_nasid, |
35 | int req_slice) | |
36 | { | |
37 | struct ia64_sal_retval ret_stuff; | |
38 | ret_stuff.status = 0; | |
39 | ret_stuff.v0 = 0; | |
40 | ||
41 | SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT, | |
42 | (u64) SAL_INTR_ALLOC, (u64) local_nasid, | |
83821d3f | 43 | (u64) local_widget, __pa(sn_irq_info), (u64) req_irq, |
1da177e4 | 44 | (u64) req_nasid, (u64) req_slice); |
83821d3f | 45 | |
1da177e4 LT |
46 | return ret_stuff.status; |
47 | } | |
48 | ||
83821d3f | 49 | void sn_intr_free(nasid_t local_nasid, int local_widget, |
1da177e4 LT |
50 | struct sn_irq_info *sn_irq_info) |
51 | { | |
52 | struct ia64_sal_retval ret_stuff; | |
53 | ret_stuff.status = 0; | |
54 | ret_stuff.v0 = 0; | |
55 | ||
56 | SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT, | |
57 | (u64) SAL_INTR_FREE, (u64) local_nasid, | |
58 | (u64) local_widget, (u64) sn_irq_info->irq_irq, | |
59 | (u64) sn_irq_info->irq_cookie, 0, 0); | |
60 | } | |
61 | ||
62 | static unsigned int sn_startup_irq(unsigned int irq) | |
63 | { | |
64 | return 0; | |
65 | } | |
66 | ||
67 | static void sn_shutdown_irq(unsigned int irq) | |
68 | { | |
69 | } | |
70 | ||
71 | static void sn_disable_irq(unsigned int irq) | |
72 | { | |
73 | } | |
74 | ||
75 | static void sn_enable_irq(unsigned int irq) | |
76 | { | |
77 | } | |
78 | ||
79 | static void sn_ack_irq(unsigned int irq) | |
80 | { | |
2fcc3db0 | 81 | u64 event_occurred, mask; |
1da177e4 LT |
82 | |
83 | irq = irq & 0xff; | |
2fcc3db0 | 84 | event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)); |
be539c73 | 85 | mask = event_occurred & SH_ALL_INT_MASK; |
2fcc3db0 | 86 | HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask); |
1da177e4 LT |
87 | __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); |
88 | ||
689388bb | 89 | move_native_irq(irq); |
1da177e4 LT |
90 | } |
91 | ||
92 | static void sn_end_irq(unsigned int irq) | |
93 | { | |
1da177e4 | 94 | int ivec; |
0aa2c72e | 95 | u64 event_occurred; |
1da177e4 LT |
96 | |
97 | ivec = irq & 0xff; | |
98 | if (ivec == SGI_UART_VECTOR) { | |
0aa2c72e | 99 | event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED)); |
cb4cb2cb | 100 | /* If the UART bit is set here, we may have received an |
1da177e4 LT |
101 | * interrupt from the UART that the driver missed. To |
102 | * make sure, we IPI ourselves to force us to look again. | |
103 | */ | |
104 | if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) { | |
105 | platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR, | |
106 | IA64_IPI_DM_INT, 0); | |
107 | } | |
108 | } | |
109 | __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs); | |
110 | if (sn_force_interrupt_flag) | |
111 | force_interrupt(irq); | |
112 | } | |
113 | ||
cb4cb2cb PB |
114 | static void sn_irq_info_free(struct rcu_head *head); |
115 | ||
83821d3f MM |
116 | struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info, |
117 | nasid_t nasid, int slice) | |
1da177e4 | 118 | { |
83821d3f MM |
119 | int vector; |
120 | int cpuphys; | |
121 | int64_t bridge; | |
122 | int local_widget, status; | |
123 | nasid_t local_nasid; | |
124 | struct sn_irq_info *new_irq_info; | |
125 | struct sn_pcibus_provider *pci_provider; | |
126 | ||
127 | new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC); | |
128 | if (new_irq_info == NULL) | |
129 | return NULL; | |
130 | ||
131 | memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info)); | |
132 | ||
133 | bridge = (u64) new_irq_info->irq_bridge; | |
134 | if (!bridge) { | |
135 | kfree(new_irq_info); | |
136 | return NULL; /* irq is not a device interrupt */ | |
137 | } | |
1da177e4 | 138 | |
83821d3f | 139 | local_nasid = NASID_GET(bridge); |
1da177e4 | 140 | |
83821d3f MM |
141 | if (local_nasid & 1) |
142 | local_widget = TIO_SWIN_WIDGETNUM(bridge); | |
143 | else | |
144 | local_widget = SWIN_WIDGETNUM(bridge); | |
1da177e4 | 145 | |
83821d3f MM |
146 | vector = sn_irq_info->irq_irq; |
147 | /* Free the old PROM new_irq_info structure */ | |
148 | sn_intr_free(local_nasid, local_widget, new_irq_info); | |
149 | /* Update kernels new_irq_info with new target info */ | |
150 | unregister_intr_pda(new_irq_info); | |
1da177e4 | 151 | |
83821d3f MM |
152 | /* allocate a new PROM new_irq_info struct */ |
153 | status = sn_intr_alloc(local_nasid, local_widget, | |
154 | new_irq_info, vector, | |
155 | nasid, slice); | |
1da177e4 | 156 | |
83821d3f MM |
157 | /* SAL call failed */ |
158 | if (status) { | |
159 | kfree(new_irq_info); | |
160 | return NULL; | |
161 | } | |
cb4cb2cb | 162 | |
83821d3f MM |
163 | cpuphys = nasid_slice_to_cpuid(nasid, slice); |
164 | new_irq_info->irq_cpuid = cpuphys; | |
165 | register_intr_pda(new_irq_info); | |
1da177e4 | 166 | |
83821d3f | 167 | pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type]; |
cb4cb2cb | 168 | |
83821d3f MM |
169 | /* |
170 | * If this represents a line interrupt, target it. If it's | |
171 | * an msi (irq_int_bit < 0), it's already targeted. | |
172 | */ | |
173 | if (new_irq_info->irq_int_bit >= 0 && | |
174 | pci_provider && pci_provider->target_interrupt) | |
175 | (pci_provider->target_interrupt)(new_irq_info); | |
cb4cb2cb | 176 | |
83821d3f MM |
177 | spin_lock(&sn_irq_info_lock); |
178 | list_replace_rcu(&sn_irq_info->list, &new_irq_info->list); | |
179 | spin_unlock(&sn_irq_info_lock); | |
180 | call_rcu(&sn_irq_info->rcu, sn_irq_info_free); | |
1da177e4 LT |
181 | |
182 | #ifdef CONFIG_SMP | |
83821d3f | 183 | set_irq_affinity_info((vector & 0xff), cpuphys, 0); |
1da177e4 | 184 | #endif |
83821d3f MM |
185 | |
186 | return new_irq_info; | |
187 | } | |
188 | ||
189 | static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask) | |
190 | { | |
191 | struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; | |
192 | nasid_t nasid; | |
193 | int slice; | |
194 | ||
195 | nasid = cpuid_to_nasid(first_cpu(mask)); | |
196 | slice = cpuid_to_slice(first_cpu(mask)); | |
197 | ||
198 | list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, | |
199 | sn_irq_lh[irq], list) | |
200 | (void)sn_retarget_vector(sn_irq_info, nasid, slice); | |
1da177e4 LT |
201 | } |
202 | ||
203 | struct hw_interrupt_type irq_type_sn = { | |
cb4cb2cb PB |
204 | .typename = "SN hub", |
205 | .startup = sn_startup_irq, | |
206 | .shutdown = sn_shutdown_irq, | |
207 | .enable = sn_enable_irq, | |
208 | .disable = sn_disable_irq, | |
209 | .ack = sn_ack_irq, | |
210 | .end = sn_end_irq, | |
211 | .set_affinity = sn_set_affinity_irq | |
1da177e4 LT |
212 | }; |
213 | ||
214 | unsigned int sn_local_vector_to_irq(u8 vector) | |
215 | { | |
216 | return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector)); | |
217 | } | |
218 | ||
219 | void sn_irq_init(void) | |
220 | { | |
221 | int i; | |
222 | irq_desc_t *base_desc = irq_desc; | |
223 | ||
10083072 MM |
224 | ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR; |
225 | ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; | |
226 | ||
1da177e4 | 227 | for (i = 0; i < NR_IRQS; i++) { |
d1bef4ed IM |
228 | if (base_desc[i].chip == &no_irq_type) { |
229 | base_desc[i].chip = &irq_type_sn; | |
1da177e4 LT |
230 | } |
231 | } | |
232 | } | |
233 | ||
234 | static void register_intr_pda(struct sn_irq_info *sn_irq_info) | |
235 | { | |
236 | int irq = sn_irq_info->irq_irq; | |
237 | int cpu = sn_irq_info->irq_cpuid; | |
238 | ||
239 | if (pdacpu(cpu)->sn_last_irq < irq) { | |
240 | pdacpu(cpu)->sn_last_irq = irq; | |
241 | } | |
242 | ||
2fcc3db0 | 243 | if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq) |
1da177e4 | 244 | pdacpu(cpu)->sn_first_irq = irq; |
1da177e4 LT |
245 | } |
246 | ||
247 | static void unregister_intr_pda(struct sn_irq_info *sn_irq_info) | |
248 | { | |
249 | int irq = sn_irq_info->irq_irq; | |
250 | int cpu = sn_irq_info->irq_cpuid; | |
251 | struct sn_irq_info *tmp_irq_info; | |
252 | int i, foundmatch; | |
253 | ||
cb4cb2cb | 254 | rcu_read_lock(); |
1da177e4 LT |
255 | if (pdacpu(cpu)->sn_last_irq == irq) { |
256 | foundmatch = 0; | |
cb4cb2cb PB |
257 | for (i = pdacpu(cpu)->sn_last_irq - 1; |
258 | i && !foundmatch; i--) { | |
259 | list_for_each_entry_rcu(tmp_irq_info, | |
260 | sn_irq_lh[i], | |
261 | list) { | |
1da177e4 | 262 | if (tmp_irq_info->irq_cpuid == cpu) { |
cb4cb2cb | 263 | foundmatch = 1; |
1da177e4 LT |
264 | break; |
265 | } | |
1da177e4 LT |
266 | } |
267 | } | |
268 | pdacpu(cpu)->sn_last_irq = i; | |
269 | } | |
270 | ||
271 | if (pdacpu(cpu)->sn_first_irq == irq) { | |
272 | foundmatch = 0; | |
cb4cb2cb PB |
273 | for (i = pdacpu(cpu)->sn_first_irq + 1; |
274 | i < NR_IRQS && !foundmatch; i++) { | |
275 | list_for_each_entry_rcu(tmp_irq_info, | |
276 | sn_irq_lh[i], | |
277 | list) { | |
1da177e4 | 278 | if (tmp_irq_info->irq_cpuid == cpu) { |
cb4cb2cb | 279 | foundmatch = 1; |
1da177e4 LT |
280 | break; |
281 | } | |
1da177e4 LT |
282 | } |
283 | } | |
284 | pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i); | |
285 | } | |
cb4cb2cb | 286 | rcu_read_unlock(); |
1da177e4 LT |
287 | } |
288 | ||
cb4cb2cb | 289 | static void sn_irq_info_free(struct rcu_head *head) |
1da177e4 LT |
290 | { |
291 | struct sn_irq_info *sn_irq_info; | |
1da177e4 | 292 | |
cb4cb2cb | 293 | sn_irq_info = container_of(head, struct sn_irq_info, rcu); |
1da177e4 LT |
294 | kfree(sn_irq_info); |
295 | } | |
296 | ||
297 | void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info) | |
298 | { | |
299 | nasid_t nasid = sn_irq_info->irq_nasid; | |
300 | int slice = sn_irq_info->irq_slice; | |
301 | int cpu = nasid_slice_to_cpuid(nasid, slice); | |
302 | ||
cb4cb2cb | 303 | pci_dev_get(pci_dev); |
1da177e4 LT |
304 | sn_irq_info->irq_cpuid = cpu; |
305 | sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev); | |
306 | ||
307 | /* link it into the sn_irq[irq] list */ | |
cb4cb2cb PB |
308 | spin_lock(&sn_irq_info_lock); |
309 | list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]); | |
10083072 | 310 | reserve_irq_vector(sn_irq_info->irq_irq); |
cb4cb2cb | 311 | spin_unlock(&sn_irq_info_lock); |
1da177e4 | 312 | |
2fcc3db0 | 313 | register_intr_pda(sn_irq_info); |
1da177e4 LT |
314 | } |
315 | ||
cb4cb2cb PB |
316 | void sn_irq_unfixup(struct pci_dev *pci_dev) |
317 | { | |
318 | struct sn_irq_info *sn_irq_info; | |
319 | ||
320 | /* Only cleanup IRQ stuff if this device has a host bus context */ | |
321 | if (!SN_PCIDEV_BUSSOFT(pci_dev)) | |
322 | return; | |
323 | ||
324 | sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info; | |
8b34ff42 PB |
325 | if (!sn_irq_info) |
326 | return; | |
327 | if (!sn_irq_info->irq_irq) { | |
6f354b01 | 328 | kfree(sn_irq_info); |
cb4cb2cb | 329 | return; |
6f354b01 | 330 | } |
cb4cb2cb PB |
331 | |
332 | unregister_intr_pda(sn_irq_info); | |
333 | spin_lock(&sn_irq_info_lock); | |
334 | list_del_rcu(&sn_irq_info->list); | |
335 | spin_unlock(&sn_irq_info_lock); | |
10083072 MM |
336 | if (list_empty(sn_irq_lh[sn_irq_info->irq_irq])) |
337 | free_irq_vector(sn_irq_info->irq_irq); | |
cb4cb2cb | 338 | call_rcu(&sn_irq_info->rcu, sn_irq_info_free); |
cb4cb2cb | 339 | pci_dev_put(pci_dev); |
10083072 | 340 | |
cb4cb2cb PB |
341 | } |
342 | ||
735e60f4 MM |
343 | static inline void |
344 | sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info) | |
345 | { | |
346 | struct sn_pcibus_provider *pci_provider; | |
347 | ||
348 | pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; | |
349 | if (pci_provider && pci_provider->force_interrupt) | |
350 | (*pci_provider->force_interrupt)(sn_irq_info); | |
351 | } | |
352 | ||
1da177e4 LT |
353 | static void force_interrupt(int irq) |
354 | { | |
355 | struct sn_irq_info *sn_irq_info; | |
356 | ||
357 | if (!sn_ioif_inited) | |
358 | return; | |
cb4cb2cb PB |
359 | |
360 | rcu_read_lock(); | |
735e60f4 MM |
361 | list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list) |
362 | sn_call_force_intr_provider(sn_irq_info); | |
363 | ||
cb4cb2cb | 364 | rcu_read_unlock(); |
1da177e4 LT |
365 | } |
366 | ||
367 | /* | |
368 | * Check for lost interrupts. If the PIC int_status reg. says that | |
369 | * an interrupt has been sent, but not handled, and the interrupt | |
370 | * is not pending in either the cpu irr regs or in the soft irr regs, | |
371 | * and the interrupt is not in service, then the interrupt may have | |
372 | * been lost. Force an interrupt on that pin. It is possible that | |
373 | * the interrupt is in flight, so we may generate a spurious interrupt, | |
374 | * but we should never miss a real lost interrupt. | |
375 | */ | |
376 | static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info) | |
377 | { | |
53493dcf | 378 | u64 regval; |
1da177e4 LT |
379 | struct pcidev_info *pcidev_info; |
380 | struct pcibus_info *pcibus_info; | |
381 | ||
735e60f4 MM |
382 | /* |
383 | * Bridge types attached to TIO (anything but PIC) do not need this WAR | |
384 | * since they do not target Shub II interrupt registers. If that | |
385 | * ever changes, this check needs to accomodate. | |
386 | */ | |
387 | if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC) | |
388 | return; | |
389 | ||
1da177e4 LT |
390 | pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; |
391 | if (!pcidev_info) | |
392 | return; | |
393 | ||
394 | pcibus_info = | |
395 | (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info-> | |
396 | pdi_pcibus_info; | |
397 | regval = pcireg_intr_status_get(pcibus_info); | |
398 | ||
9a4e5549 | 399 | if (!ia64_get_irr(irq_to_vector(irq))) { |
735e60f4 MM |
400 | if (!test_bit(irq, pda->sn_in_service_ivecs)) { |
401 | regval &= 0xff; | |
402 | if (sn_irq_info->irq_int_bit & regval & | |
403 | sn_irq_info->irq_last_intr) { | |
404 | regval &= ~(sn_irq_info->irq_int_bit & regval); | |
405 | sn_call_force_intr_provider(sn_irq_info); | |
1da177e4 LT |
406 | } |
407 | } | |
408 | } | |
409 | sn_irq_info->irq_last_intr = regval; | |
410 | } | |
411 | ||
412 | void sn_lb_int_war_check(void) | |
413 | { | |
cb4cb2cb | 414 | struct sn_irq_info *sn_irq_info; |
1da177e4 LT |
415 | int i; |
416 | ||
417 | if (!sn_ioif_inited || pda->sn_first_irq == 0) | |
418 | return; | |
cb4cb2cb PB |
419 | |
420 | rcu_read_lock(); | |
1da177e4 | 421 | for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) { |
cb4cb2cb | 422 | list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) { |
735e60f4 | 423 | sn_check_intr(i, sn_irq_info); |
1da177e4 LT |
424 | } |
425 | } | |
cb4cb2cb PB |
426 | rcu_read_unlock(); |
427 | } | |
428 | ||
2fcc3db0 | 429 | void __init sn_irq_lh_init(void) |
cb4cb2cb PB |
430 | { |
431 | int i; | |
432 | ||
433 | sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL); | |
434 | if (!sn_irq_lh) | |
435 | panic("SN PCI INIT: Failed to allocate memory for PCI init\n"); | |
436 | ||
437 | for (i = 0; i < NR_IRQS; i++) { | |
438 | sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL); | |
439 | if (!sn_irq_lh[i]) | |
440 | panic("SN PCI INIT: Failed IRQ memory allocation\n"); | |
441 | ||
442 | INIT_LIST_HEAD(sn_irq_lh[i]); | |
443 | } | |
1da177e4 | 444 | } |